Service Manuals, User Guides, Schematic Diagrams or docs for : Compal Compal_LA-7571P
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A B C D E
www.qdzbwx.com
1 1
QOQAE
2 Ontario 10AS 2
LA-7571P REV 1.0 Schematic
3 3
AMD Llano FS1 Processor / Hudson M2/M3
2011-05-04 Rev 1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/01/11 Deciphered Date 2011/11/11 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A7571
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019D7
Date: Monday, May 09, 2011 Sheet 1 of 41
A B C D E
A B C D E
EC SMBus HDMI-CEC
www.qdzbwx.com PWM Fan Control
page 5
page 20 PCI-Express X4 5GHz AMD APU
HDMI Conn.
FS1 Processor
page 20
Memory BUS(DDRIII)
1 200pin DDRIII-SO-DIMM X2 1
Llano uPGA-722 Dual Channel BANK 0, 1, 2, 3 page 10,11
35mm*35mm
1.5V DDRIII 1066/1333 MT/s
page 5,6,7,8,9
DP0 DP1
LVDS Translator (X1) (X4) PCIe X1 X1 USB Conn USB 3.0 FingerPrinter
UMI X4 1.1V 5GT/s
ANX3110 2.5GT/s USB port 0,1 USB port 10 USB port 7
PCIe port4 page 21 page 26 page 22
page 17
PCIe X1
1.1V 5GT/s Int. Camera
USB port 5
USB page 18
LVDS Conn.
5V 480MHz
page 18
PCIeMini Card PCIeMini Card SIM
2
USB WLAN 3G USB port 6
page 23 2
5V 480MHz page 23
CRT PCIeMini Card
USB port 8
page19 page 23
APU PCIe port 1
JET APU PCIe port 2
AMD FCH page 23 page 23
RTL8105E 10/100M Hudson M2/M3
RJ45 SATA port 0 SATA HDD
page 24
RTL8111E 1G 5V 6GHz(600MB/s) SATA port 0
APU PCIe port 0 page 21
page 24
FCBGA-656 SATA port 1 SATA ODD
24.5mm*24.5mm
5V 6GHz(600MB/s) SATA port 1
page 21
Cardreader PCIe X1
JMB389C 1.1V 5GT/s
USB 3.0 port0 USB 3.0
FCH PCIe port2 page 12,13,14,15,16 5GHz USB3.0 port0
page 25 page 26
3 RTC CKT. PCIe X1 USB3.0 3
SPI Bus 1.1V 5GT/s UPD720200AF1-DAP-A
page 12 3.3V 33 MHz FCH PCIe port1
page 26
LPC Bus HD Audio 3.3V 24MHz
DC/DC Interface 3.3V 33 MHz
page 32
HDA Codec
ALC269
Power Circuit DC/DC SPI ROM Debug Port ENE KB930 page27
page 30 page 29
page 33~40 (2MB)
page14
NBQAA Sub-board Conn Int. MIC Conn HP CONN SPK CONN
page 28 page 28 page 28
MIC Conn
page 18
Power Membrane Touch Pad Touch Pad Int.KBD EC ROM G-Sensor
page 22 page 28' page 30
page 31 FP/LOGO LED (128KB) 30
page
4 page 22 4
Slot ODD
page 21
Cap Sensor
TP LED
Security Classification Compal Secret Data Compal Electronics, Inc.
page 22 Issued Date 2011/01/11 Deciphered Date 2011/11/11 Title
page 22 SCHEMATIC MB A7571
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019D7
Date: Monday, May 09, 2011 Sheet 2 of 41
A B C D E
5 4 3 2 1
B+
Ipeak=5A, Imax=3.5A, Iocp min=7.9A
DESIGN CURRENT 0.1A
DESIGN CURRENT 0.1A
DESIGN CURRENT 5A
+3VL
+5VL
+5VALW
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SUSP
N-CHANNEL DESIGN CURRENT 5A +5VS
SI4800
KB_LED
DESIGN CURRENT 400mA +5VS_LED
P-CHANNEL
D AO-3413 D
+5VS
DESIGN CURRENT 300mA +3VS_HDP
LDO
G9191
ODD_PWR
TPS51125A DESIGN CURRENT 1.6A
P-CHANNEL
+5VS_ODD
AO-3413
Ipeak=5A, Imax=3.5A, Iocp min=7.7A DESIGN CURRENT 5A +3VALW
WOL_EN
P-CHANNEL DESIGN CURRENT 330mA +3V_LAN
AO-3413
SYSON
DESIGN CURRENT 0.2A +3V
P-CHANNEL
AO-3413
SUSP
N-CHANNEL DESIGN CURRENT 5A +3VS
SI4800
LCD_ENVDD
C C
P-CHANNEL DESIGN CURRENT 1.5A +LCD_VDD
AO-3413
+3VS
LDO DESIGN CURRENT 1A +2.5VS
APL5508-25DC
POK
DESIGN CURRENT 5.3A +1.1VALW
G5603RU1U
SUSP
N-CHANNEL DESIGN CURRENT 4A +1.1VS
FDS6676AS
VR_ON
Ipeak=94A, Imax=52A, Iocp min=122A DESIGN CURRENT 50A +CPU_CORE
ISL6267HRZ-T Ipeak=33A, Imax=21.5A, Iocp min=40A DESIGN CURRENT 23A
B
+CPU_CORE_NB B
VR_ON
DESIGN CURRENT 6.5A +1.2VS
G5603RU1U
SYSON
Ipeak=16A, Imax=11.2A, Iocp min=22.46A DESIGN CURRENT 20A +1.5V
G5603RU1U SUSP
N-CHANNEL DESIGN CURRENT 2A +1.5VS
FDS6676AS
+3V
LDO DESIGN CURRENT 1A +1.05V
APL5930KAI-TRG
SUSP
DESIGN CURRENT 1.5A +0.75VS
G2992F1U
A A
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/01/11 Deciphered Date 2011/11/11 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A7571
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019D7
Date: Monday, May 09, 2011 Sheet 3 of 41
5 4 3 2 1
A B C D E
Voltage Rails ( O MEANS ON X MEANS OFF )
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+5VS BTO Option Table
+RTCVCC B+ +5VL +5VALW +1.5V
+3VS
+3VL +3VALW +3V Function HDMI-CEC LAN CAM+MIC KB LED Renesas USB3.0
+2.5VS
+1.1VALW +1.05V
power +1.5VS description Y U V X K Reserved
1 plane +VSB 1
+1.2VS
explain HDMI HDMI+CEC 10/100 10/100/1000 CAM KB LED Renesas USB3.0
+1.1VS
+0.75VS BTO CEC@ 8105E@ 8111E@ CAM@ KBL@ RENE@
+CPU_CORE
+CPU_CORE_NB
Function ODD Mini Card Chipset EC
State
description T G J FCH N/A Reserved
explain Normal Slot 3G JET 3G/JET Hudson-M3 KB-930 KB-9012
BTO ODD0@ ODD1@ 3G@ JET@ 3GJET@ HUDM3R1@ HUDM3R3@ KB930@ KB9012@
S0
O O O O O O Function FCH UMA
S1 description HM2 HM3 UM
O O O O O O
2 explain Hudson-M2 Hudson-M3 2
S3
O O O O O X
BTO M2@ M3@
S5 S4/AC
O O O O X X
S5 S4/ Battery only
O O O X X X SIGNAL
STATE SLP_S3# SLP_S5#
S5 S4/AC & Battery
don't exist
O X X X X X Full ON HIGH HIGH
S1(Power On Suspend) HIGH HIGH
S3 (Suspend to RAM) LOW HIGH
S4 (Suspend to Disk) LOW HIGH
FCH SM Bus Address (SCL0/SDA0)
S5 (Soft OFF) LOW LOW
Power Device HEX Address G3 LOW LOW
3 3
+3VS DDR SO-DIMM 0 A0 H 1010 0000 b
+3VS DDR SO-DIMM 1 A4 H 1010 0100 b
+3VS WLAN
+3VS 3G
EC SM Bus1 Address EC SM Bus2 Address
Power Device HEX Address Power Device HEX Address
+3VL Smart Battery 16 H 0001 0110 b +3VS G-Sensor 40 H 0100 0000 b
+3VL HDMI-CEC 34 H 0011 0100 b
4
Power Device HEX Address 4
+3VL Cap. Sensor Virtual I2C
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/01/11 Deciphered Date 2011/11/11 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC MB A7571
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
Custom B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019D7
Date: Monday, May 09, 2011 Sheet 4 of 41
A B C D E
A B C D E
www.qdzbwx.com
FAN Control Circuit +3VS
1
R13
JAPUA @ 10K_0402_5% JFAN
1 1
PCI EXPRESS FANPWM 2
<29> FANPWM
2
2
AA8 P_GFX_RXP0 P_GFX_TXP0 AA2 <29> FAN_SPEED1 3 3
1 +FAN1 4
C7 4
AA9 P_GFX_RXN0 P_GFX_TXN0 AA3
0.01U_0402_25V7K ACES_85204-0400N
Y7 Y2 +5VS @ @
P_GFX_RXP1 P_GFX_TXP1 2
1 1
Y8 P_GFX_RXN1 P_GFX_TXN1 Y1
40 mils
W5 P_GFX_RXP2 P_GFX_TXP2 Y4 1A
+FAN1 +5VS
1 2 Close to Connector
W6 Y5 2 R14 0_0603_5% D7
P_GFX_RXN2 P_GFX_TXN2
1 1 2 2
10U_0805_10V6K
10U_0805_10V6K
1000P_0402_50V7K
W8 W2 C6
P_GFX_RXP3 P_GFX_TXP3
1
10U_0805_10V6K 1SS355TE-17_SOD323-2 2 1
1 @ D8 C5 C8
W9 P_GFX_RXN3 P_GFX_TXN3 W3
V7 V2 BAS16_SOT23-3
P_GFX_RXP4 P_GFX_TXP4 1 2
2
V8 P_GFX_RXN4 P_GFX_TXN4 V1
U5 P_GFX_RXP5 P_GFX_TXP5 V4
U6 P_GFX_RXN5 P_GFX_TXN5 V5
U8 P_GFX_RXP6 P_GFX_TXP6 U2
GRAPHICS
U9 P_GFX_RXN6 P_GFX_TXN6 U3
T7 P_GFX_RXP7 P_GFX_TXP7 T2
T8 P_GFX_RXN7 P_GFX_TXN7 T1
R5 P_GFX_RXP8 P_GFX_TXP8 T4 UMA_HDMI_TX2+ <20>
R6 P_GFX_RXN8 P_GFX_TXN8 T5 UMA_HDMI_TX2- <20>
R8 P_GFX_RXP9 P_GFX_TXP9 R2 UMA_HDMI_TX1+ <20>
2 2
R9 P_GFX_RXN9 P_GFX_TXN9 R3 UMA_HDMI_TX1- <20>
P7 P_GFX_RXP10 P_GFX_TXP10 P2 UMA_HDMI_TX0+ <20>
P8 P_GFX_RXN10 P_GFX_TXN10 P1 UMA_HDMI_TX0- <20>
N5 P_GFX_RXP11 P_GFX_TXP11 P4 UMA_HDMI_TXC+ <20>
N6 P_GFX_RXN11 P_GFX_TXN11 P5 UMA_HDMI_TXC- <20>
N8 P_GFX_RXP12 P_GFX_TXP12 N2
N9 P_GFX_RXN12 P_GFX_TXN12 N3
M7 P_GFX_RXP13 P_GFX_TXP13 M2
M8 P_GFX_RXN13 P_GFX_TXN13 M1
L5 P_GFX_RXP14 P_GFX_TXP14 M4
L6 P_GFX_RXN14 P_GFX_TXN14 M5
L8 P_GFX_RXP15 P_GFX_TXP15 L2
L9 P_GFX_RXN15 P_GFX_TXN15 L3
PCIE_FRX_C_LANTX_P0 AC5 AD4 PCIE_FTX_LANRX_P0 C49 1 2 0.1U_0402_16V7K
<24> PCIE_FRX_C_LANTX_P0 P_GPP_RXP0 P_GPP_TXP0 PCIE_FTX_C_LANRX_P0 <24>
PCIE_FRX_C_LANTX_N0 AC6 PCIE_FTX_LANRX_N0 C50
LAN
<24> PCIE_FRX_C_LANTX_N0 P_GPP_RXN0 P_GPP_TXN0 AD5 1 2 0.1U_0402_16V7K PCIE_FTX_C_LANRX_N0 <24>
3 PCIE_FRX_WLANTX_P1 PCIE_FTX_WLANRX_P1 C51 3
<23> PCIE_FRX_WLANTX_P1 AC8 P_GPP_RXP1 P_GPP_TXP1 AC2 1 2 0.1U_0402_16V7K PCIE_FTX_C_WLANRX_P1 <23>
PCIE_FRX_WLANTX_N1 PCIE_FTX_WLANRX_N1 C52
WLAN
2 0.1U_0402_16V7K
GPP
<23> PCIE_FRX_WLANTX_N1 AC9 P_GPP_RXN1 P_GPP_TXN1 AC3 1 PCIE_FTX_C_WLANRX_N1 <23>
T29 AB7 AB2 PCIE_FTX_JETRX_P2 C53 1 2 0.1U_0402_16V7K
P_GPP_RXP2 P_GPP_TXP2 PCIE_FTX_C_JETRX_P2 <23>
T28 PCIE_FTX_JETRX_N2 C54
JET
AB8 P_GPP_RXN2 P_GPP_TXN2 AB1 1 2 0.1U_0402_16V7K PCIE_FTX_C_JETRX_N2 <23>
AA5 P_GPP_RXP3 P_GPP_TXP3 AB4
AA6 P_GPP_RXN3 P_GPP_TXN3 AB5
UMI_MTX_C_FRX_P0 AF8 AF1 UMI_FTX_MRX_P0 C55 1 2 0.1U_0402_16V7K
<12> UMI_MTX_C_FRX_P0 P_UMI_RXP0 P_UMI_TXP0 UMI_FTX_C_MRX_P0 <12>
UMI_MTX_C_FRX_N0 AF7 AF2 UMI_FTX_MRX_N0 C56 1 2 0.1U_0402_16V7K
<12> UMI_MTX_C_FRX_N0 P_UMI_RXN0 P_UMI_TXN0 UMI_FTX_C_MRX_N0 <12>
UMI-LINK
UMI_MTX_C_FRX_P1 AE6 AF5 UMI_FTX_MRX_P1 C57 1 2 0.1U_0402_16V7K
<12> UMI_MTX_C_FRX_P1 P_UMI_RXP1 P_UMI_TXP1 UMI_FTX_C_MRX_P1 <12>
UMI_MTX_C_FRX_N1 AE5 AF4 UMI_FTX_MRX_N1 C58 1 2 0.1U_0402_16V7K
<12> UMI_MTX_C_FRX_N1 P_UMI_RXN1 P_UMI_TXN1 UMI_FTX_C_MRX_N1 <12>
UMI_MTX_C_FRX_P2 AE9 AE3 UMI_FTX_MRX_P2 C59 1 2 0.1U_0402_16V7K
<12> UMI_MTX_C_FRX_P2 P_UMI_RXP2 P_UMI_TXP2 UMI_FTX_C_MRX_P2 <12>
UMI_MTX_C_FRX_N2 AE8 AE2 UMI_FTX_MRX_N2 C60 1 2 0.1U_0402_16V7K
<12> UMI_MTX_C_FRX_N2 P_UMI_RXN2 P_UMI_TXN2 UMI_FTX_C_MRX_N2 <12>
UMI_MTX_C_FRX_P3 AD8 AD1 UMI_FTX_MRX_P3 C61 1 2 0.1U_0402_16V7K
<12> UMI_MTX_C_FRX_P3 P_UMI_RXP3 P_UMI_TXP3 UMI_FTX_C_MRX_P3 <12>
UMI_MTX_C_FRX_N3 AD7 AD2 UMI_FTX_MRX_N3 C62 1 2 0.1U_0402_16V7K
<12> UMI_MTX_C_FRX_N3 P_UMI_RXN3 P_UMI_TXN3 UMI_FTX_C_MRX_N3 <12>
+1.2VS 1 2 P_ZVDDP K5 K4 P_ZVSS 1 2
4 R9 196_0402_1% P_ZVDDP P_ZVSS R10 196_0402_1% 4
close to APU AMD_TOPEDO_FS-1 close to APU
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/01/11 Deciphered Date 2011/11/11 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
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