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DlOl A
Digital Input/Output Module
The DIOlA Digital Input Output Module provides 32 module, and is functionally compatible with the older
digital input or output channels at TTL levels. These module. The older DIOl module has hardware switches
channels are grouped into four &bit ports which can be for port configuration, while this function is performed
individually programmed for input or output by soft- through software for the DIOlA.
ware commands. The inputs are read directly by the host
computer, and the outputs are latched. A power on reset
circuit automatically configures all ports as inputs when
the DIOlA module is powered up. User Connections
User connections can be made to either the quick discon-
nect terminal blocks at the top of the module, or to the
I/O connections are made to on-card quick disconnect mass termination connector located at one end of the
screw terminal blocks, which accept 16-24 gauge wire board o(91 BASIC's PEEK command, or the equivalent
10 xxx92 xxx93 memory read function of other languages.
xXx=1 ;t 3 digits of IEUN addn s,e.g. "CFF This WAS NOT a capability of the older DIOl
module, and should not be attempted using
the older module.
SELECT/CONFIGURE PORT operations
DIGITAL INPUT/OUTPUT operations
Location: Slot dependent CMDA write
Location: Slot-dependent CMDB read or write
The CODA write command is used to configure the ports A CMDB read is used to accessdata from a selected port
for input or output, and to select the port that data is to be when that port is configured as an input port. A CMDB
written to or read from. Refer to Figure 4 for the follow- write is used to write data to the selected port when that
ing discussion of the CMDA write data byte. port is configured as an output port. Note that each of the
four ports can be individually programmed as either an
input or output port, as discussed above.
Bits D3 through D7 are used to configure the ports for in-
put or output. Bit D7must be set to a logic 1 to enable bits When a port is configured as an input port, the CMDB
D3 through D6 to set their appropriate port to an input or command location is read to accessthe status of the chan-
an output port. When bit D7 is set to a logic 0, bits D3 nels associated with the port. Reading this location will
through D6 are ignored. Bits D3 through D6 are used for return an 8 bit binary number, with the DO thru D7 lines
PORT A through PORT D, respectively. Setting the ap- representing the input lines for the selected port as indi-
propriate bit to a logic 1 sets that port and all associated cated in Table 3. Since the inputs are not latched, the data
channels, to a digital output. Setting the appropriate bit will reflect the condition of the input channels at the in-
to a logic 0 sets that port, and all associated channels, to a stant that the read operation is performed. Note that the
digital input. channels being read will depend on the port selected
with the CMDA write command discussed above.
NOTE If you need to know the status of a particular channel, a
Upon power up, all ports are set to be digital logical AND instruction can be used to "mask oft?' the un-
inputs. necessary bit positions. The mask should contain zeros in
the irrelevant bit positions and logic ones in the bit posi-
tions representing the channels in question. The result of
ANDingthemaskwiththeinputdatawillthenbean8bit
Bits DO and Dl are used to select a particular port for in- binary number with each bit in an irrelevant position
put or output. A value from 0 to 3 will select port A equal to zero. The relevant channels will contain a 1 or a 0
through port D respectively. Port selection will always depending on the status of the corresponding bit in the
occur with a CMDA write to the DIOlA module, regard- masked byte (a 1 if the object bit is high, a 0 if the object bit
less of the logic value of bit D7. is low).
DIOlA-5
DIOZA
Dig&z2 Input/Output Module
When reading a DIOlA port with the BASIC PEEK com- rectly from the port using the readback feature (and
mand, the returned value will be a decimal number be- stored in a variable). When the current status of all the
tween 0 and 255, depending on the status of the input channels on the particular port is known, the value of the
channels. The status of a particular channel can be deter- variable can be changed to correspond to the desired
mined by ANDing the returned value with the decimal status of the selected port, and this new value written to
weighting for that particular channel. If the ANDed re- the CMDB location.
sult is nonkero, the channel is high (logic 1).
In assembly language, this modification can be per-
EXAMPLE The status of channel 6 on port A is to be de- formed by using logical AND and logical OR instruc-
telmlin~ tions. When turning a single channel on (high) the vari-
able representing the current port status should should
100 POKE CMDA,O be ORed with a number equivalent to an 8 bit binary
110 STATUS6 = PEEK(CMDB) AND 64 value with zeros in the bit positions to remain unchanged
and ones in the bit positions to be turned on. When turn-
ing a channel off, the port status variable should be
If the value returned in variable STATUS6 is non-zero, ANDed with an 8 bit binary value with ones in the bit po-
then channel 6 is high. sitions to remain unchanged and zeros in the positions to
be turned off
If a DIOl A port is configured as output, the value written
to CMDB should be the equivalent of an 8 bit binarynum-
ber, with the status of the 8 bits (1 or 0) representing the From BASIC, the decimal weight of the bit to be turned on
status of the 8 channels of the selected port (high or low). or off should be added to (off to on) or subtracted from
The channels affected will depend on the selected port, as (on to off) the decimal number that represents the current
- - r+-k.r I`"I rwrm,rle
er.d- 3LaLUJ. Cr." GvuAyAc, Lrr Lr.... #.a.,.......-1 A -CL :r-..#...lA
outied hi `I'abie 3. Data wr&en to a port will be iatched y"Lr I." LULLI uLcul.LLtzL tt vu, IL W"l.uU
into the outputs and will remain unchanged until the be necessary to subtract 8 from the decimal value repre-
port is written to again, or the port is configured as an in- senting the port status. To turn on channel 8, it would be
put port. From BASIC, the value written to the port using necessary to add 128 to the status.
the POKE command will be a decimal value in the range
from 0 to 255.
It should be noted that the DIOlA module is command
compatible with the older DIOl module, with the added
To change the status of one output channel while leaving programmability of the port configuration versus the
the others unchanged, you must know the status of all of switch selectability of the older module. Programs writ-
the channels. To accomplish this, a variable in the con- ten for the older module can be modified for use with the
troiiing program could be assigned to the current status new module by simply issuing a CMDA WRlTE to con-
of the port in question (and updated every time the port is figure the ports before any input or output is accom-
written to), or the output on the port could be read di- plished.
Table 3. Digital I/O Channels and Bit Values
Bit Position 1 D7 1 D6 D5 D4 D3 D2
Weighting 128 64 32 16 8 4
I
Port A ChanNos. 7 6 5 4 3 2
Port B Chan Nos. 15 14 13 12 11 10
Port CChanNos. 23 22 21 20 19 18
Port D Chan Nos. 31 30 29 28 27 26
DIOlA-6
DIOlA
Digital Input/Output Module
Theory of Operation Input/Output selection is performed by triple 3 input
nor gate Ul(74LS27) and quad latch U3 (74LS175). When
a CMDA write is issued (bit D7 high) the data on lines D3
A schematic drawing of the DIOlA module is located on to D6 is latched into the inverting outputs of U3. A low to
drawing number 501-206. the output control of the output latches US, US, UlO, and
U12 (74LS374) allows the Read/Write line to clock the
data from the bus to the port. When D3 to D6 are low, the
output latches t&state and the select port registers of U4
The DIOlA circuitry may be divided into six sections: enable the input buffer for the selected port.
data bus buffering circuitry, port selection circuitry, port
configuration circuitry, channel input buffers, channel
output latches, and power up reset circuitry.
The Self-ID resistor (R40) connected between pins 4 and
41 of the card edge connector allow the mainframe to
identify the module by reading the value of the resistor
with an A/D conversion circuit and generating a code
Data from the baseboard bus circuitry is applied to the based on the value of the resistor. The ID resistor has a
octal bus transceiver U13 (74LS245). Bus transmission di-
value of 4.53 kilohms, with a tolerance of 0.1%.
rection of U13 is controlled by the baseboard Read/Write
line, while the CMDB line is used to enable the device
when reading or writing data to one of the 4 ports on the
module using the DIGITAL I/O command. The power up reset circuitry is used to ensure that all out-
puts power up in a high impedance state by holding the
clear line of U3 low until power up is complete, forcing all
inverting outputs of the quad latch high.
The two least significant bits of the data bus (DOand Dl)
are also applied to the port selection circuitry made up of
a dual D type flip flop U2 (74LS75) and a 3 to 8 line de- Troubleshooting Information
coder U4 (74LS138). When a CMDA write is issued in the
select port mode, the values on the DO, Dl, and Read/ Troubleshoot the DIOlA by using the procedure out-
Write lines are latched into U4. When the CMDB line lined in Table 4. This process is fairly straightforward, as
next goes low, U4 decodes the input from U2 into an ena- signal tracing is simply a matter of checking for the cor-
bling signal to go to only 1 of the 4 ports (either the input rect digital logic level throughout the module.
buffer or the output latch, depending upon the state of
the Read/Write line). For example, if 11 (binary) were
present at DOand Dl, and the Read/ Write line was active If a defective part is found, a replacement can be ordered
(low), executing a CMDA write would latch the data into from Keithley Data Acquisition and Control. Refer to the
U4; then the Y7 output of U4 would go low with the next Service Section of the hardware manual for ordering de-
CMDB write, latching the data present on the bus at'that tails. Part numbers for the module are located on the
time to the output of the port. component layout drawing (501-200).
DIOlA-7
DIOIA
Digital Input/Output Module
Table 4. DIOlA Troubleshooting Information
Step Component Required Condition Remarks
1 DIOlA module Install in slot 10 turn power on
2 channel O-31 apply logic high (+Rr) apply to inputs
3 computer program ah ports as inputs and select port A use CMDA write DATA 11111X00
4 computer read back 255 from port A use CMDB read
5 ports B-D repeat steps 4 and 5 to test ports ED
6 channel O-31 apply logic low (WI apply to inputs
7 computer select port A use CMDA write
8 computer read back 0 from port A use CMDB read
9 ports ED repeat steps 8 and 9 to test ports ED
10 computer program all ports as outputs and select port A use CMDA write
11 computer write 255 to port DATA 10000X00
12 channelO-7 all outputs high use CMDB write
13 ports B-D repeat steps 13 and 14 use logic probe/DMM
14 computer select port A to test ports B-D
15 computer write 0 to port use CMDA write
channelO-7 all outputs low use CMDB write
:; ports ED repeat steps 17 and 18 use logic probe/DMM to test ports B-D
1
I\Tote:Slot 10 locations CMDAXXX92
CMDBXXX93
DlOl A Specifications General: AII inputs and outputs referenced to system
ground
Channels: 32, software programmable in groups of 8 for
input or output
AU inputs and outputs power up in high impedance state
as inputs for safety
Signal connection: Quick disconnect screw terminal
blocks, 40 pin receptacle for ribbon cable assembly
Accessories: Ribbon cable assembly, 6 foot, 40 conduc-
tor; one end mates with 40 pin receptacle on DIOIA,
other end is unterminated. KeithIey part number
Input characteristics: 5OO-cA3.
T&-compatible, high-true
High-level Input Current: 2OpA Cable ribbon plug, only - 3M part number 3417.
Low-level Input Current: -0.4mA
Parts List
Output characteristics:
The following components are used in the DIOlA mod-
TI'L-compatible, high true ule. Spares can be ordered from the repair department of
Drive capacity: 60 IS-TIT, loads or 15 standard `ITL KeithIey Instruments, Inc., 28775 Aurora Road, Ueve-
loads; 24mA sink at 0.5V Iand, OH 44139. Please supply the part number, descrip-
Self-ID: resistor value - 4.53kQ zt.1%. ID code 52 tion, and quantity when ordering.
DIOlA-8
DIOIA
Digital Input/Output Module
Part No. Quantity Description Designation
C-365-.1 7 Cap, .l@?, 20%, 50V Ceramic Cl-C7
Cs-368-40 1 Corm, 40-pin ribbon J6
(X-521-2 2 corm, strip, IO-pin JL J4
(X-521-4 2 Conn, Strip, 8-pin JZ J3
IC-157 1 IC, Quad D Flip-flop, 74LS175 u3
IC-173 1 IC, Comparator, LM311N u14
IC-182 1 IC, Decoder/DEMUX, 74LS138 u4
IC-230 4 IC, Octal Buffer/Line Driver, 74LS244 us, u7, u9, Ull
IC-233 1 IC, Triple 3-input NOR, 74LS27 Ul
IC-242 4 IC, Octal D-type Latch, 74LS374 US, U8, UlO, U12
IC-356 1 IC, Octal Bus Transceiver, 74LS245 u13
IC-366 1 IC, 4-bit B&able Latch, 74LS75 u2
R-176-4.53K 1 Res, 4.53K, .I%, 1/8W, Metal Film R2
R-76-39K Res, 39K, 5%, 1/4W, Comp. or Film
R-76-4.7K : Res, 4.7K, 5%, 1/4W, Comp. or Film E
R-76-47OK 1 Res, 47OK,5%, 1/4W, Comp. or Film R4
R-76-37.4K 1 Res, 37.4K, I%, 1/8W, Metal Film R2
R-76-4.99K 1 Res, 4.99K, I%, 1/SW, Metal Film R3
W-28 2 Diode, Silicon, lN4148 0X-35) Dl, D2
6-32xl/2PPH 2 Screw
500-323 1 Cable Clamp Assembly
500-321 1 Cable Clamp
500-322 1 Strip Rubber
501-916-OlA 1 DIOlA Manual
DIOlA-9
I-
-
Using the DIOlA and
KDAC500 Software
The DIOlA digital I/O module 2-5 volts to drive a DIOlA input
can be used in a variety of control high.
and monitoring applications to
source and sense digital logic levels. A DIOlA output can drive up to
The module's 32 channels can be 60 IS-TTL inputs, or 15 standard
configured for input or output in TTL inputs. This corresponds to a
groups of 8 channels. Each group of current sink capability of 24mA at O-
8 channels is a called a "port". Port 0.5 volts. Drive current available
A consists of channels O-7,port B from a high output is approximately
consists of channels 8-15, and so on. 1mA at 2-5 volts.
The DIOlA channels can be read or
written individually, or as ports. Do not connect signals of less than
OV or greater than 5V to the DIOlA
The DIOlA channels are non- or you may damage the module.
isolated, meaning that DIOlA digital
ground is connected to earth
ground. Therefore, the low side of
any circuitry connected to the
Connection to Digital
DIOlA must also be at ground po- Logic
tential or the circuitry, DIOlA, or The DIOlA can interface many
data acquisition system may be types of digital circuitry and logic
damaged. families. However, it is important
that any external voltages applied to
DIOlA inputs and outputs are the DIOlA inputs or outputs be
compatible with low-power within the range of 0-5V. Any input
Schottky transistor-transistor logic signal connected to the DIOlA must
(IS-`ITLJ. This defines the voltage have sufficient sink and source capa-
and current levels associated with bility to drive at least one IS-ITL
logical high and low. When con- load. Any load connected to a
figured for input, each DIOlA chan- DIOlA output must not cause the
nel presents one IS-TTL load to an DIOlA output to sink more than
external circuit. The external circuit 24mA. Review the input and output
must be able to absorb (sink) at least specifications for the type of logic
0.4mA at O-O.5 volts for the DIOlA connected to the DIOlA to deter-
to recognize an input signal as a mine what conditioning, if any, may
logic low. The same input must be be required. This information is
capable of sourcing at least 20@ at readily available in IC
manufacturers' data books.
Using
the DIOIA and
KDAC500 Software
The DIOlA can usually be typically being 3-15 volts according
connected to standard T-l-L logic to the circuit supply voltage. These
without concern for voltage levels. devices usually require level trans- , Current
However, the total current loading is lation or buffering to interface Load 2S :; Limiting
important where one lTL output is DIOlA channels. Integrated circuits Resistor
connected to several DIOlA inputs, such as the 4049 and 4050 buffer ICs
or where several external loads are are available for CMOS-to-TTL
connected to one DIOlA output. A buffering; Buffering circuits based lo 0 b
variety of TTL sub-families exist, GND +!3V CH 0
on discrete components can also be
including low- medium- and high- used.
power types. Each sub-family has
different current sink and source
specifications associated with input
Note: For reliable operation, a
DIOlA input must be actively
I L1
I
I
DIOlA
and output. Make sure that a DIOlA
channel and the external logic can
each sink and source sufficient
driven to 2-5 volts when the signal
is high. Hardware switches, open-
collector logic, and some other
I Figure 2. Switching Small Loads with
DIOlA Output
current to control each other. types of signals may allow a
DIOlA input to "float" then they trolling higher-current DC or AC
Open-collector digital circuitry is switch high. A floating DIOlA loads which are beyond the DIOlA's
another type of TTL logic which input may be susceptible to false capacity. In this case, an AC or DC
requires special consideration. As triggering. A 2k pull-up resistor solid state relay can be used between
with standard TI'L, an open- should be connected between a the load and a DIOlA output. Nor-
collector logic low sinks some DIOlA input and +5V if the signal mally, these relays are energized by
current at O-O.5 volts. However, a does not actively drive the input switching a control terminal on the
logic high simply floats, and cannot high. relay to ground, although some may
actively drive an input. In contrast, a require application of a 3-5V control
standard TTL gate contains internal voltage. A typical control current is
circuitry to actively set a high output Controlling External 5-15 mA, which is well within the
to at least 2V. To assure that an sink capability of a DIOlA output.
open-collector output will reliably Loads with the DIOlA The Keithley/DAC PROTO module
control a DIOlA input, connect a 2k A DIOlA output can sink 24mA at can be used for assembling one or
pull-up resistor between the DIOlA 05V when at logic low. The same two auxiliary relay circuits for use
input and +5 volts. output can source about one mill& with the DIOIA. If several relays are
amp when at logic high. Thus, the needed, it may be more cost-
CMOS and other low-power logic DIOlA is better used as a switchable effective to use a PCM2 or PCM3
families operate at extremely low ground point, rather than a power module which can control up to 16
current levels, with logic high source for controlling external loads. relays.
For example, a DIOlA output chan-
nel lacks sufficient current to light an Caution: The DIOlA should not
LED indicator. For sufficient bright- be operated beyond the specified
ness, the anode of the LED should be ratings or the module will be
2K connected to an external source of damaged.
I
voltage, and the cathode connected
06c$ to a DIOlA channel configured for Where signals with relatively high
5V ]CHO output. When the DIOlA output is voltages are involved, or where
switched low, current flows through isolation is needed, an opto-isolator
Open Collector the LED to ground, completing the or other conditioning circuitry can
DlOlA circuit. A 5V supply terminal is in-
Driver be used between the DIOlA and the
cluded on the DIOlA connector for external circuit. The user must
such applications. choose the conditioning method
Figure 1. Pull-up Resistor for Open according to the application, taking
Connector Input Applications may require con- care that the signal ultimately
Using the DIOlA and
KDAC500 Software
from a DIOlA input to ground.
However, this method will allow the
Current Limiting DIOlA input to float when the
switch is opened. The channel may
be susceptible to noise or activity on
~~$g-~Lk+v other channels. The solution is to
also connect a 2%pull-up resistor
between the DIOlA input channel
and +5V (Figure 4). When the switch
opens, the channel will be pulled to
+5V through the resistor, and be
immune to noise and false
triggering.
Second, mechanical switch
contacts usually exhibit `bounce", in
which electrical continuity rapidly
makes and breaks several times at
Figure 3. Opto-Isolator for Controlling Loads the instant the contacts close. In
some digital applications, this
bounce may be unacceptable. The
applied to the DIOlA is within Monitoring the status of .
solution is to use a "debouncing"
acceptable limits. Where many mechanical switches presents two
circuit between the switch and
channels are involved, Keithley's problems. Where an application
DIOlA input. A flip-flop circuit
DIM1 and DOMl digital I/O must detect a contact closure, it is a
suitable for debouncing SPDT limit
modules offer 16 channels each, with simple matter to connect the switch
switches is shown below. A second
optical isolation and the ability to
interface voltages up to 2SV and
loads up to 50&L Both modules
maintain isolation of up to 500V +5v
between channels, or from channel Switoh at
^., 1 position 2
to ground.
Connection to
Mechanical Switches
2K
I
lo 6 0
GND +5V CHO
Release
Figure 4. Mechanical SPST Switch with
Pull-up Resistor Figure 5. Debouncing Circuits
Using
the DIOAI and
KDAC500 Software
remedy, ideal for debouncing some calculation method. used. BGREAD will automatically
momentary push-button switches, allocate and store the data in a
uses a circuit which generates a KDAC5OOmemory array. If single
single pulse when triggered by the Software Considerations channels are being read, a KDAC500
switch. The pulse must be longer bit array should be specified in the
The DIOlA powers up with all
than the time it takes the contacts to BGREAD command. If ports are
ports configured for input. Any
settle (typically a matter of milli- being read, a KDACSOObyte array
software used with the DIOlA must
seconds). A 555 timer integrated cir- should be specified in BGREAD.
be able to configure the module's
cuit or various types of one-shot ICs
ports for output if the application
can be used for this application. See The BGREAD command will
requires digital output.
IC manufacturers' data books for begin taking data when the
more information. KDAC5OOINTON command is
Keithley's KDAC5OO software
provides complete control of all executed. One data value will be
DIOlA functions. The following read when each interrupt fires. A
Reading BCD Outputs suggestions cover programming in a BGSTATUS command should be
Before IEEE488 and RS232-C BASIC or QuickBASIC environment, used after the lNTON to determine
serial interfaces became the pre- but are equally useful in all when all the data points have been
ferred method, binary-coded KDAC500 versions. Most appli- collected. Afterward, the individual
decimal (BCD) outputs were in- cations of KDAC500 and the DIOlA data values can be read from the
cluded on some instruments to make are simple in concept, and can be array by using an ARGET command
digitized data available to com- summarized as follows: nested in a FOR-NEXT loop. If the
puters, calculators, or other digital array is a byte array, the values of
equipment. In principle, BCD uses 1. Where one digital input reading individual bits in each byte can be
four lines to represent the numerals is required, a foreground read extracted by ANDing the byte
O-9,but the actual encoding method (FGREAD) command can be used. values with bit weights as described
and number of digits varied among FGREAD will return the bit value above.
manufacturers and instruments. A representing a single input channel,
multi-digit BCD readout might use or the byte value representing an 3. Where one digital value must be
four separate lines for each digit, input port (8 channels). programmed to a DIOlA output
resulting in many lines but relatively channel or port, a foreground write
simple decoding. Alternately, an Where a port is read, the values of (FGWRITE) command is most con-
instrument might multiplex several an individual bit within the byte can venient. FGWRITE can write a 0 or 1
digits onto four lines plus a few be extracted by "ANDing" the byte to a single channel, or a byte value O-
additional digit select lines, resulting value with the weight of the bit's 255 to a port. The value of the byte
in fewer lines but more complicated position. For example, the weight of can be calculated by adding up the
decoding. the most significant bit (MSB) in a weights of all the high bits in the
byte is 128. To test the value of the byte. For example, a port is to be
MSB in the byte value "BV", one programmed with the bit values
With attention to signal levels and
would execute the BASIC statement: 11010011:
the BCD encoding method, a DIOlA
can be used to read BCD lines. The
easiest method is to read the DIOlA BT=BVAND128
inputs as ports. This will return
. eight data bits at one time. The If BT equals 0, the MSB value is 0,
DIOlA's 32 inputs can thus deal otherwise the MSB value is 1. BYTE
WEIGHT
with 6-8 BCD digits. If the digits are Channel and bit values are covered MSB LSB
multiplexed, the DIOlA can read an in more detail in the DIOlA manual. 0 1 1
unlimited number of digits, but the 1:s d4 2 1'6 : 4 2 1
requisite program will be more com- 2. Where values must be read 128+64+0+16+0+0 +2+ 1
plex. The decoding of the signals from a digital input channel at TOTAL -211
must be done in software, and may regular intervals, a background read
be based upon a look-up table or (BGREAD) command should be
Using the DIOAl and
KDAC500Software
The byte value 211 should be The data values should be written should be calculated as shown in the
written to the port. to the array using an AR??UTcom- weighting example above, and then
mand. A FOR-NEXT loop around written to the array with ARMJT.
4. Where several values must be ARPTJT may be helpful in reducing
written to a digital output channel or the number of program lines need to In all casesfor BGWRlTE, output
port, a background write fill the array. will commence when interrupts are
(BGWRITE) command should be turned on with INTON. One data
used. If the desired output is a simple value will be written from the array
digital square wave, a single 1 and 0 each time an interrupt fires. Note
Before BGWRlTE, a KDACSOO can be written with ARPUT to a that one complete cycle through an
array must be allocated with two-deep, KDAC500 bit array. array may require many interrupts,
ARMAKE to hold the output data. If so the period of square waves and
the data values are intended for a If the output involves a more com- other pulses will probably not equal
single channel, the array must be a plex pattern of pulses, ARRJT can the interrupt rate. BGWRITE's
bit array, and the data will consist ot be used to fill a longer KDAC500 bit cycling parameter can be set for a
l's and 0's. If the data values are array with the necessary order of l's specific number of repeats, or for
intended for a port, the array should and 0's. continuous output of the array. If
be a byte array, and the data will cycling is not continuous, a
consist of values O-255.The array If the output involves a digital BGSTATUS command should be
must be long enough to hold the port, a KDAC500 byte array must be used after INTON to determine
desired number of data points. used. The values of individual bytes when all the data points have been
written.
Data Acquisition and Control Division
Keithley Instrumegs, Inc. 28775 Aurora Road
l l Cleveland, Ohio 44139 (216) 2484400
l l Fax: 349-4569
WEST GERMANY: Keithley Instruments GmbH l Heiglhofstr. 5 l Miinchen 70 l 089-71002-0l Telex: 52-12160 l Fax: 089~7lOO25Q
GREAT BRITAIN: Keithley Instruments,Ltd. l 1 Boulton Road l Reading, E&shire RG 2 ONL l 0734-861287l Telex: 847 047 l Fax: 0734-863665
FRAXE Keithley Instruments SARL 03 All&z des Garays*B.P. 60 091124 Palaiseau/ZL l l-6-0115 155 l Telexz600 933.F~ 1-6-0117726
NETHERLANDS: Keithley Instruments BV* Avelingen West 49 04202MS GorincherwP.0. Box 559*42&l AN Gorinchan*OlS30-m*T& 24 684*Fax: 01830-30821
SWITZERLAND: Keithley Instruments SA l Kriesbachstr. 4 l 86CODiibendorf l 01-8219444 l Telex: 828 472 l Faxz0222-315366
AUSTRIA; Keithley Instruments GesmbH l Rosenhiigelstrasse 12 0 A-1120 Vienna l (0222) 84 65 48 l Telex: 131677 l Fax: (0222) 84 35 97
ITALYz Keithley Instruments SRL l Viale S. Giignano 4/A l 20146 Milan0 l 024120360 or 02-4156540l Fax: 024121249
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