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AMD GeodeTM GX1 Processor
Memory Timings for Maximum
Performance

1.0       Scope
There are many variables and trade-offs that the system       2.2       SDRAM Clock Considerations
designer must consider to achieve maximum memory per-
                                                              The SDRAM clocks generated by the GX1 processor are
formance in a design. This document provides memory
                                                              not perfectly periodic; some clock periods can be slightly
timings and the factors affecting them for systems based
                                                              longer and others slightly shorter. The memory settings
on the AMD GeodeTM GX1 processor.
                                                              must account for these shorter periods. This jitter is the
In addition to this document, the system designer should      reason for requiring PC133 memory devices for speeds of
also refer to the application note AMD GeodeTM GX1 Pro-       90 MHz and higher.
cessor PC133 Layout Recommendations for recom-
mended layout methodologies and guidelines. Following         2.2.1     Loading Restrictions Between 78 and
those guidelines is of utmost importance for designs sup-               100 MHz
porting processor core and memory speeds of 300/100           To support speeds between 78 and 100 MHz, loading must
MHz and 333/111 MHz. Designers who do not follow those        be restricted to a maximum of 16 devices. There are four
recommendations are at high risk of producing an unstable     SDRAM clocks generated by the GX1, each of which must
motherboard, with the only corrective action being a rede-    be restricted to a maximum of four loads each, to support
sign.                                                         speeds over 78 MHz. These 16 loads can take the form of
Note:   This is revision 4.0 of this document. The change     one DIMM, two SODIMMs, or discrete memory. Total mem-
        made from revision 3.0 (dated September 2000) is      ory achieved by 16 devices is a function of the SDRAM
        the additional timings and data to support a GX1      technology used.
        333 MHz based system with a memory speed of
        111 MHz.                                              2.2.2     Loading Restrictions at 111 MHz
                                                              To support the 111 MHz speed, loading must be further
                                                              restricted to a maximum of eight devices. These eight
2.0       Discussion                                          loads can take the form of one SODIMM, or discrete mem-
                                                              ory. Total memory achieved by eight devices is a function of
The GX1 processor has a very flexible memory architec-        the SDRAM technology used. The four SDRAM clocks
ture in that it can be configured to support many different   generated by the GX1 should be restricted to a maximum
SDRAM clock frequencies and timing parameters. Timing         of two loads. For the SODIMM, this requirement can be
parameters can vary between memory devices, even within       met by connecting SDCLK0 to SDCLK1 and SDCLK2 to
the PC100 and PC133 specifications. Consequently, there       SDCLK3 as close to the processor as possible. It should be
are several variables to consider in order to achieve maxi-   noted that the SP4GX10 platform (used to validate this
mum memory performance. For any given core speed, it is       configuration) did not meet the clock loading requirement.
important for the BIOS to set the optimum memory settings
based upon the memory devices being used.                     2.2.3     SDCLK_OUT to SDCLK_IN Length
                                                              The application note titled AMD GeodeTM GX1 Processor
2.1       Validation Testing                                  PC 133 Layout Recommendations describes the
The AMD GeodeTM SP4GX10 (GX1/CS5530A-based) sys-              SDCLK_OUT to SDCLK_IN length to have three selectable
tem platform was used to validate the memory subsystem.       loop lengths. Testing on the SP4GX10 platform indicates
Proper power supply design and sufficient decoupling of       the shortest loop to be the best setting for the 333 MHz
the GX1 processor is of extreme importance in the system      memory configuration. All other configurations should use
design. That is why the SP4GX10 was used for validation.      the large loop.
It is designed with proportionate power and decoupling
margin.




Revision 4.0 - February 2001 - Confidential                                                                             1
                                                                                                          Application Note

                                                                                Revision 4.0 - February 2001 - Confidential



2.3         Memory Speed and Timing
Three registers are used for programming memory speed        

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