Service Manuals, User Guides, Schematic Diagrams or docs for : Microstar MS-6700
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8 7 6 5 4 3 2 1
Cover Sheet 1
Block Diagram 2
D
MAIN CLOCK GEN & DDR CLOCK BUFFER 3 D
mPGA478-B INTEL CPU Sockets 4-5
MS6700 VERSION:100 SIS 648 NORTH BRIDGE
DDR SLOT
6-9
10
SIS 648 CHIPSET
Willamette/Northwood 478pin mPGA-B Processor Schematics DDR TERMINATOR 11
SIS 963 SOUTH BRIDGE 12 - 14
AGP SLOT 15
CPU:
PCI SLOTS 16
C Willamette/Northwood mPGA-478B Processor C
LAN CONTROLLER 17
System Brookdale Chipset: RJ45 CONNECTOR 18
IDE CONNECTOR 19
SIS 648 (North Bridge)+963/963L (South Bridge)
USB CONNECTOR 20
On Board Chipset:
AC'97 CODEC 21
LPC Super I/O -- W83697HF AUDIO CONNECTOR 22
REALTEK 1394 PHY 6 CHANNEL & FAN 23
LPC I/O(W83697HF) 24
B
Expansion Slots: B
PARALLEL & SERIAL PORT 25
AGP2.0 SLOT * 1
VRM 9.X 26
PCI2.2 SLOT* 3
ACPI CONTROLLER 27
ATX POWER CON 28
FRONT PANEL 29
IEEE 1394 30
Decoupling Capacitor 31
A A
MICRO-STAR INT'L CO.,LTD.
Title
COVER PAGE
Size Document Number Rev
MS-6700 100
Date: Friday, October 25, 2002 Sheet 1 of 30
8 7 6 5 4 3 2 1
5 4 3 2 1
System Block Diagram GPIO Table on SIS963
GPIO_0 I/O MAIN Pull-Down
D GPIO_1 I/O MAIN Pull-Down D
GPIO_2 I/O MAIN THERM#
GPIO_3 I/O MAIN EXTSMI#
SOCKET 478
GPIO_4 I/O MAIN Pull-Down
GPIO_5 I/O MAIN PREQ#5(Pull-Up)
GPIO_6 I/O MAIN PGNT#5(Pull-Up)
GPI_7 I/O RESUME LAN_WAKE#
Host Bus
GPI_8 I RESUME RING
GPI_9 I RESUME RESERVED
GPI_10 I RESUME RESERVED
Support Dual Monitor GPIO_11 I/O RESUME RESERVED
AGP SLOT GPIO_12 I/O RESUME Pull-Down
VGA DDR SDRAM
GPIO_13 I/O RESUME Flash Rom protection H: Disable, L: Enable
1.5 V ONLY
GPIO_14 I/O RESUME Pull-Down
SIS 648
DDR1 DDR2 RTT GPIO_15 I/O RESUME KBDAT
C
GPIO_16 I/O RESUME KBCLK C
GPIO_17 I/O RESUME MSDAT
GPIO_18 I/O RESUME MSCLK
HYPERZIP GPIO_19 I/O RESUME SMBCLK
GPIO_20 I/O RESUME SMBDAT
ANALOG IN
Support Max to six-PCI Devices
AC'97 ANALOG OUT
Lan PCI SLOT 3 PCI SLOT 2 PCI SLOT 1 AUDIO CODEC
SIS 963 6 CHANNEL
IDE 1 IDE 2
KEYBOARD PS/2
/MOUSE
USB 0 USB 2 USB 3
B B
USB 1 USB 5 USB 4
RTL8801B LPC BUS
IEEE 1394A
1394_1
1394_2
1394_3
FAN CONTROL
FAN1 FAN2 FAN3
H/W MONITOR
LPC SUPER I/O
LEGACY
ROM
GPIOS IR/CIR GAME/MIDI COM PRINTER FLOPPY
A A
MICRO-STAR INT'L CO.,LTD.
Title
System Block Diagram
Size Document Number Rev
MS-6700 100
Date: Friday, October 25, 2002 Sheet 2 of 30
5 4 3 2 1
5 4 3 2 1
VCC3
Main Clock Generator
C229
CB83
4.7U/0805 CPUCLK0 R232 49.9
VCC3 0.1u CPUCLK-0 R233 49.9
VCC3 CPUCLK1 R234 49.9
CPUCLK-1 R235 49.9
U15
D RTM360-648R D
SDCLK C194 10p_0603
1
VDDREF CB136 CB137
11
VDDZ AGPCLK0 C190 10p_0603
13
VDDPCI 0.1u 0.1u
19
CB77 CB86 CB75 CB87 CB74 CB90 CB88 VDDPCI AGPCLK1 C191 10p
28
VDD48
29
VDDAGP
42
0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u VDDCPU R244 CPUCLK1 ZCLK0 C232 10p_0603
48 40 33 CPUCLK1 (6)
VDDSD CPUCLK0 R247 CPUCLK-1
CPUCLK#0
39 33 CPUCLK-1 (6) EMI
12 ZCLK1 C233 10p_0603
PCI_STOP# R245 CPUCLK0
45 44 33 CPUCLK0 (4)
CPU_STOP# CPUCLK1 R246 CPUCLK-0
43 33 CPUCLK-0 (4)
CPUCLK#1 8P4C_10p
5 47 SDCLK CN25
VSSREF SDCLK PCICLK2
8 1 2
VSSZ R240 AGPCLK0 PCICLK1
18 31 33 AGPCLK0 (6) 3 4
VSSPCI AGPCLK0
24
VSSPCI AGPCLK1
30 R241 33 AGPCLK1
AGPCLK1 (14) MULTISEL internal Pull-Up 120K SIOPCLK 5 6
25 96XPCLK 7 8
VSS48 R263 ZCLK0
32 9 22 ZCLK0 (8)
VSSAGP ZCLK0 R264 ZCLK1
41 10 22 ZCLK1 (11)
VSSCPU ZCLK1
46
VSSSD FS3 RN53 7
14 8 8P4R-33 96XPCLK 96XPCLK (11)
MULTISEL R255 X_4.7K
VCC3 VCC3 PCICLK_F0/FS3 FS4 SIOPCLK PCICLK4 C231 10p_0603
15 5 6 SIOPCLK (23)
PCICLK_F1/FS4 MODE0 PCICLK1 PCICLK3 C230 10p_0603
16 3 4 PCICLK1 (15)
PCICLK0 PCICLK2
17 1 2 PCICLK2 (15)
PCICLK1
20
R239 R238 PCICLK2 R265 PCICLK3
21 33 PCICLK3 (15)
10K 10K PCICLK3 R266 PCICLK4
22 33 PCICLK4 (16)
PCICLK4 REFCLK2 CN26 1
23 2 8P4C_10p
C NPN-MBT3904LT1-S-SOT23 PCICLK5 APICCLK C
3 4
33 2 FS0 RN54 7 8 8P4R-33 REFCLK1 REFCLK1 5 6
PD#/VTT_PWRGD REF0/FS0 REFCLK1 (12) VCC3
VCCP 3 FS1 5 6 APICCLK 7 8
REF1/FS1 APICCLK (12)
R237 4 FS2 3 4 REFCLK2
REF2/FS2 REFCLK2 (20)
Q30 Q29 R229 475 38 1 2 R277 X_10K MODE0
IREF
27
48M MODE0:
10K 26
D15 24_48M/MULTISEL MODE1 R230 UCLK48M 1 : pin12=PCICLK UCLK48M C192 10p
22 UCLK48M (13)
C A C189 NPN-MBT3904LT1-S-SOT23 MULTISEL R243 22 SIO48M 0 : pin12=PCI_STOP#
SIO48M (23) (internal pull-up 120K resistor) SIO48M C195 10p
10p SMBCLK
35 SMBCLK (9,12,26)
X_1N4148-S-LL34-75V VCC3 SCLK SMBDAT
34 SMBDAT (9,12,26)
SDATA 10K MODE1
R242
36
VDDA MODE1:
0 : Pin45=CPU_STOP# ,Pin33=PD#/VTT_PWRGD
1 : Pin33=CPU_STOP# ,Pin45=PD#/VTT_PWRGD
CB70 CB73 VCC3
F0~F4 internal Pull-Down 120K (internal pull-up 120K resistor)
0.1u 102P
37 BSEL0 (4)
VSSA XOUT
R278 2.7K R268 10K FS2 DDRCLK0 C52 X_10p
XIN
R267 X_2.7K FS4 DDRCLK1 C36 X_10p
DDRCLK2 C44 X_10p
6
7
VCCM
C211 Y1 C201 DDRCLK3 C53 X_10p
FS4 FS3 FS2 FS1 FS0 CPU SDRAM ZCLK AGP PCI
B B
12p 14M-16pf-HC49S-D 12p 0 0 0 0 0 100 100 80 66 33
CB48 C42 CB54 CB53
0.1u 0.1u 0.1u 0 0 1 0 0 133 100 80 66 33
4.7U/0805 DDRCLK8 C35 X_10p
DDRCLK7 C33 X_10p
U3 Clock Buffer (DDR) DDRCLK-0 C51 X_10p
RTM680-627
DDRCLK-1 C37 X_10p
CBVDD 3
VDD DDRCLK0 DDRCLK-2 C45 X_10p
12 2
VDD CLK0 DDRCLK3 DDRCLK[0..8]
23 4 DDRCLK[0..8] (9)
VDD CLK1 DDRCLK2 DDRCLK-3 C54 X_10p
13
CLK2 DDRCLK1 DDRCLK-[0..8]
17 DDRCLK-[0..8] (9)
CLK3 DDRCLK8
10 24
VCCM AVDD CLK4 DDRCLK7
26
CB50 CB52 CLK5
7 1 DDRCLK-0
0.1u X_0.01u SCLK CLK#0 DDRCLK-3 DDRCLK-8 C34 X_10p
22 5
SDATA CLK#1 DDRCLK-2 VCC3
14
CLK#2 DDRCLK-1 DDRCLK-7 C32 X_10p
8
CLK_IN CLK#3
16 FOR EMI
SMBCLK 25 DDRCLK-8
SMBDAT CLK#4 DDRCLK-7
27
CLK#5
A 20 A
FWDSDCLKO FB_IN
(7) FWDSDCLKO
9 19 R65 10 FB_OUT CB47 CB55 CB42 CB58
NC FB_OUT
18
NC C38 0.1u 0.1u 0.1u 0.1u
21
NC MICRO-STAR INT'L CO.,LTD.
GND
GND
GND
GND
10p
Title
11
15
28
MAIN CLOCK GEN & BUFFER
6
Size Document Number Rev
MS-6700 100
Date: Wednesday, November 06, 2002 Sheet 3 of 30
5 4 3 2 1
8 7 6 5 4 3 2 1
CPU GTL REFERNCE VOLTAGE BLOCK
VCCP
Length < 1.5inch.
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