Service Manuals, User Guides, Schematic Diagrams or docs for : Microstar MS-6720
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Cover Sheet
Block Diagram
1
2
MS6720 VERSION:0A
SIS 645DX/651 CHIPSET
MAIN CLOCK GEN & DDR CLOCK BUFFER 3 Willamette/Northwood 478pin mPGA-B Processor Schematics
mPGA478-B INTEL CPU Sockets 4-5
SIS 645DX/651 NORTH BRIDGE 6-9
DDR SLOT 10 CPU:
Willamette/Northwood mPGA-478B Processor
DDR TERMINATOR 11
SIS 962 SOUTH BRIDGE 12 - 14
System Brookdale Chipset:
AGP SLOT 15
SIS 645DX/651 (North Bridge)+962 (South Bridge)
PCI SLOTS 16
LAN CONTROLLER (RTL8201BL MII PHY) 17 On Board Chipset:
KB/MS Conn & FAN Conn. 18 LPC Super I/O -- W83697HF
IDE CONNECTORS 19 RTL8201BL MII PHY
USB CONNECTOR 20
Expansion Slots:
AC'97 CODEC & AUDIO Conn. 21
AGP2.0 SLOT * 1
LPC I/O(W83697HF) 22
PCI2.2 SLOT* 2
PARALLEL & SERIAL PORTS 23
VRM 9.0 24
MS-5 ACPI CONTROLLER 25
ATX POWER CON & VGA CON 26
FRONT PANEL 27
Decoupling Capacitor 28
Micro Star Restricted Secret
Title Rev
BLOCK DIAGRAM
Document Number 0A
MS-6720
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
Monday, September 30, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 1 of 28
System Block Diagram GPIO Table on SIS962
GPIO_0 I/O MAIN Pull-Down
GPIO_1 I/O MAIN Pull-Down
GPIO_2 I/O MAIN THERM#
SOCKET 478
GPIO_3 I/O MAIN EXTSMI#
GPIO_4 I/O MAIN Pull-Down
GPIO_5 I/O MAIN PREQ#5(Pull-Up)
Host Bus GPIO_6 I/O MAIN PGNT#5(Pull-Up)
S upport Dual Monitor GPI_7 I/O RESUME LAN_WAKE#
AGP SLOT GPI_8 I RESUME RING
VGA DDR SDRAM
GPI_9 I RESUME RESERVED
UNIVERSAL
GPI_10 I RESUME RESERVED
VGA CONNECTOR SIS 645DX/651 DDR1 DDR2 RTT GPIO_11 I/O RESUME RESERVED
VGA CON.
GPIO_12 I/O RESUME Pull-Down
GPIO_13 I/O RESUME Flash Rom protection H: Disable, L: Enable
GPIO_14 I/O RESUME Pull-Down
HYPERZIP GPIO_15 I/O RESUME KBDAT
GPIO_16 I/O RESUME KBCLK
ANALOG IN
S u p port Max to six-PCI Devices GPIO_17 I/O RESUME MSDAT
GPIO_18 I/O RESUME MSCLK
GPIO_19 I/O RESUME SMBCLK
AC'97 ANALOG OUT
GPIO_20 I/O RESUME SMBDAT
PCI SLOT 2 PCI SLOT 1 AUDIO CODEC
SIS 962
IDE 1
KEYBOARD PS/2
/MOUSE
USB 0 USB 2 USB 3
USB 1 USB 5 USB 4
LPC BUS
Lan
FAN CONT ROL
FAN1 FAN2 FAN3
H/W MONITOR
LPC SUPER I/O
LEGACY
ROM
GPIOS IR/CIR GAME/MI DI COM PRINTER FLOP PY
Micro Star Restricted Secret
Title Rev
BLOCK DIAGRAM
Document Number 0A
MS-6720
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
Monday, September 30, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 2 of 28
VCC3
Main Clock Generator
CPUCLK0 R262 49.9
CP32 CPUCLK-0 R263 49.9
L50
X_COPPER
CPUCLK1 R266 49.9
X_80_0805 CPUCLK-1 R267 49.9
U15
CY28352-SSOP48
SDCLK C158 X_10p_0603
VCC3_CLK 1
11 VDDREF
13 VDDZ AGPCLK0 C154 X_10p_0603
19 VDDPCI
CB153 CB174 CB161 CB176 28 VDDPCI
C162 CB160 CB157 CB175 CB159 29 VDD48 AGPCLK1 C155 10p
42 VDDAGP
4.7U/0805 0.01u 0.1u 0.01u 0.1u 0.01u 0.1u 0.01u 0.1u 48 VDDCPU 40 R276 CPUCLK1
33 CPUCLK1 (6)
VDDSD CPUCLK0 39 R272 CPUCLK-1
33 CPUCLK-1 (6)
12 CPUCLK#0 ZCLK0 C201 X_10p_0603
45 PCI_STOP# 44 R274 33 CPUCLK0
CPU_STOP# CPUCLK1 43 R275 CPUCLK-0 CPUCLK0 (4)
33 CPUCLK-0 (4)
CPUCLK#1 ZCLK1 C202 X_10p_0603
5 47 R273 22 SDCLK
VSSREF SDCLK S D C L K (7)
8
18 VSSZ 31 R277 33 AGPCLK0
VSSPCI AGPCLK0 AGPCLK0 (6)
24
VSSPCI AGPCLK1
30 R278 33 AGPCLK1
AGPCLK1 (15) M ULTISEL internal Pull-Up 120K
25 C N 1 1 X_8P4C_10p
32 VSS48 9 R309 ZCLK0 PCICLK2 1 2
22 ZCLK0 (8)
41 VSSAGP ZCLK0 10 R310 22 ZCLK1 PCICLK1 3 4
46 VSSCPU ZCLK1 ZCLK1 (12) 5 6
SIOPCLK
VSSSD 14 FS3 RN89 7 8 8P4R-33 96XPCLK MULTISEL R264 X_4.7K 96XPCLK 7 8
PCICLK_F0/FS3 96XPCLK (12)
VCC3 VCC3 15 FS4 5 6 SIOPCLK
PCICLK_F1/FS4 SIOPCLK (22)
16 3 4 PCICLK1
PCICLK0 PCICLK1 (16)
17 1 2 PCICLK2
PCICLK1 20 PCICLK2 (16)
R268 R265 PCICLK2 21
10K 10K PCICLK3 22 C N 1 2 X_8P4C_10p
PCICLK4 23 REFCLK2 1 2
NPN-MBT3904LT1-S-SOT23 PCICLK5 APICCLK 3 4
CLK_PD# 33 2 FS0 RN90 7 8 8P4R-22 REFCLK0 REFCLK1 5 6
VCCP PD#/VTT_PWRGD REF0/FS0 3 FS1 5 6 REFCLK1 REFCLK0 (8) REFCLK0 7 8
REF1/FS1 REFCLK1 (13)
R256 R259 4 FS2 3 4 APICCLK
REF2/FS2 APICCLK (13)
Q31 Q27 CLK_IREF 38 1 2 REFCLK2
IREF REFCLK2 (21)
27
10K 475 48M 26
D16 24_48M/MULTISEL R279 UCLK48M UCLK48M C156 10p
22 UCLK48M (14)
C A C153 NPN-MBT3904LT1-S-SOT23 MULTISEL R280 22 SIO48M
SIO48M (22)
SIO48M C157 10p
10p
CP33 X_COPPER 35 SMBCLK
SCLK 34 SMBCLK (10,13,25)
1N4148-S-LL34-75V VCC3 SMBDAT
SDATA SMBDAT (10,13,25)
L51
CLK_VDDA 36
X_80_0805 VDDA
CB165 CB158
F0~F4 internal Pull-Down 120K
VCC3
DDRCLK0 C57 10p
0.1u 102P
37 DDRCLK1 C41 10p
VSSA FS2 BSEL0 (4)
R307 X_2.7K
DDRCLK2 C61 10p
R325 10K FS0
XOUT
2.7K R314
XIN
DDRCLK3 C59 10p
R324 2.7K R326 10K FS1
CP2 X_COPPER
Cypress CY28342 Frequency Table
6
7
VCC2_5
L10 Y1
Y1_I Y1_O FS4 FS3 FS2 FS1 FS0 CPU SDRAM ZCLK AGP PCI DDRCLK8 C39 10p
X_80_0805
14M-16pf-HC49S-D 0 0 0 0 0 100 100 66 66 33 DDRCLK7 C37 10p
CB61 C44 CB71
C177 C171
CB64 CB63 0.1u 0.1u CB73
16p 16p 0 0 0 1 1 133 100 66 66 33
X_4.7U/0805 0.01u
0.1u X_0.01u DDRCLK-0 C49 10p
Realtek 360-654R Frequency Table DDRCLK-1 C42 10p
U4
CY68352-SOIC28
Clock Buffer (DDR) FS4 FS3 FS2 FS1 FS0 CPU SDRAM ZCLK AGP PCI
DDRCLK-2
DDRCLK-3
C62
C60
10p
10p
0 0 0 0 1 100 100 66 66 33
CP5 X_COPPER CBVDD 3
VDD
12 2
DDRCLK0 (10) 1 0 1 0 1 133 100 66 66 33
23 VDD CLK0 4
VDD CLK1 DDRCLK3 (10)
13
L17 CLK2 17 DDRCLK2 (10)
DDRCLK-8 C38 10p
CLK3 DDRCLK1 (10)
VCC2_5
CB_AVDD 10
AVDD CLK4
24
DDRCLK8 (10) Clock combination:
26 DDRCLK-7 C36 10p
X_80_0805 C48 CB68 CB72 CLK5 DDRCLK7 (10) CY28342 + CY28352
7
SCLK CLK#0
1
DDRCLK-0 (10) RTM360-645R + RTM680-628
X_4.7U/0805 0.1u 0.01u 22 5
SDATA CLK#1 14 DDRCLK-3 (10)
CLK#2 DDRCLK-2 (10)
8 16
CLK_IN CLK#3 DDRCLK-1 (10)
SMBCLK 25
CLK#4 DDRCLK-8 (10)
SMBDAT 27
20 CLK#5 DDRCLK-7 (10)
FWDSDCLKO FB_IN
(7) FWDSDCLKO
R63
9
18 NC FB_OUT
19 FB_OUT2 FB_OUT Micro Star Restricted Secret
21 NC 22 C40
Title Rev
NC CLOCK GEN & DDR CLOCK BUFFER
GND
GND
GND
GND
10p
Document Number 0A
MS-6720
11
15
28
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
6
Monday, September 30, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 3 of 28
CPU SIGNAL BLOCK
CPU GTL REFERNCE VOLTAGE BLOCK
(6) HA#[3..31] VCCP
VID[0..4] (24) Length < 1.5inch.
HA#27
HA#24
HA#22
HA#17
HA#14
HA#12
HA#31
HA#28
HA#25
HA#21
HA#18
HA#15
HA#11
R51
HA#30
HA#29
HA#26
HA#23
HA#20
HA#19
HA#16
HA#13
HA#10
HA#8
HA#7
HA#5
HA#4
HA#9
HA#6
HA#3
2/3*Vccp 49.9RST
AE5 VID0
AE3 VID2
AE4 VID1
AE1 VID4
AE2 VID3
GTLREF1
AD26
AC26
AE25
C24 C32 R52
AB1
M1
M4
M3
M6
W2
W1
U4
R6
U3
U1
R3
R2
N5
N4
N2
N1
Y1
V3
V2
P6
P4
P3
K1
K4
K2
A5
A4
T5
T4
T2
T1
L2
L3
L6
220p 1u 100RST
U2A
DBR#
ITP_CLK1
ITP_CLK0
VID4#
VID3#
VID2#
VID1#
VID0#
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
A18#
A17#
A16#
A15#
A14#
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