Service Manuals, User Guides, Schematic Diagrams or docs for : Clevo CLEVO_M1110Q-C_M1115-6-7P-M1114-001
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Schematic Diagrams http://hobi-elektronika.net
System Block Diagram
VDD3,VDD5
AC-IN,CHARGER CLEVO Tigerhill- Pineview System Block Diagram
DDR3 One Channel 3.3V,5V,3VS,5VS,1.8VS
14.318 MHz 1GB & 2GB
Colck Generator Memory Termination
SLG8SP510T
17.1mm*8.1mm*1.2mm DDR3 SO-DIMM0 1.05VS,1.5VS,0.89_GFX
TSSOP 64PIN
1.5V,0.75VS(VTT_MEM)
Intel
B.Schematic Diagrams
Pineview 45nm
VCORE
C0/C1/C2/C3/C4
1280x800
Sheet 1 of 26 LCD CONNECTOR <8" PROCESSOR 667MT/s
System Block CLICK BOARD
FCBGA 559 pin
Diagram TOUCH PAD 1400x1050
22mm*22mm*2.35mm MIC
IN
HP
OUT
CRT OUT
Direct X9
INT SPK R
X2-GEN1
32.768 KHz 10 Gbits/s Azalia Codec
EC DMI VT1812
<=8" INT SPK L
ITE 8502E 48pins QFN
128pins LQFP
SYSTEM SMBUS 9*9*1.6mm
14*14*1.6mm
0.1"~13
SOUTH BRIDGE INT MIC
INT. K/B AZALIA LINK 24 MHz
LPC 33 MHz
0.5"~11" Tiger Point
EC SMBUS
360 MMAP
PCIE 100 MHz <12"
LPC ROM THERMAL SMART SMART 17mm*17mm*1.06mm
SENSOR FAN BATTERY
32.768KHz
EMC1402
Mini Card JMC251/ JMC261
WLAN
LAN 25
Bluetooth(USB5) MHz
SATA I/II 3.0Gb/s <12" CARD READER
USB2.0 480 Mbps 1"~16"
(USB2) Mini PCIE (USB7) (USB0) (USB1) Card Reader
SATA HDD RJ-45
Port_2 3G CARD (USB4) CCD Port_0 Port_1 Socket
B - 2 System Block Diagram
http://hobi-elektronika.net Schematic Diagrams
Pineview CPU Part-D
(1)
LV DS Clock & Data Signal Group
Zdiff = 90 Ohm ? 0%
1.05VS
signal / s pace : 4 / 5 m ils
R7 62_04 CPU_RSVD_01 le ngth < 7850 m ils U13D
R115 51_04 H_TDI
R103 *51_04 H_TDO REV = 1.1
R114 51_04 H_TMS U25 E7 LAYOUT NOTE: 1.05VS
[12] LVDS-LCLKN U26 LVD_A_CLKM SMI_B H7 H_SMI# [9]
[12] LVDS-LCLKP R23 LVD_A_CLKP A20M_B H6 H_A20M# [9]
R106 51_04 H_BPM5_PREQ# Place ne ar GTLREF'S pin
[12] LVDS-L0N R24 LVD_A_DATAM_0 FERR_B F10 H_FERR# [9]
R5 *51_04 H_BPM4_PRDY#
H_BPM_1_N0 [12] LVDS-L0P N26 LVD_A_DATAP_0 ICH LINT00 F11 H_INTR [9] Zo = 50 Ohm ? 5%
R15 *51_04 R101
R105 *51_04 H_BPM_1_N1 (1) [12] LVDS-L1N N27 LVD_A_DATAM_1 LINT10 E5 H_NMI [9]
Signal : 5 m ils
H_BPM_1_N2 [12] LVDS-L1P R26 LVD_A_DATAP_1 IGNNE_B F8 H_IGNNE# [9]
R13 *51_04 length < 500 m ils 1K_1%_04
H_BPM_1_N3 [12] LVDS-L2N R27 LVD_A_DATAM_2 STPCLK_B H_STPCLK# [9]
R8 *51_04
H_BPM_2_N0 [12] LVDS-L2P LVD_A_DATAP_2 CPU_GTLREF
R117 *51_04
1u_6.3V_X5R _06
G6
*220p_50V_NPO_04
R118 *51_04 H_BPM_2_N1
H_BPM_2_N2 LVD_IBG R22 DPRSTP_B G10 H_DPRSTP# [10,21]
R108 *51_04 LVDS
H_BPM_2_N3 TP_LVD_VBG J28 LVD_IBG DPSLP_B G8 H_DPSLP# [10]
R119 *51_04 R102
T7 LVD_VREFH_OUT_R N22 LVD_VBG INIT_B E11 H_BPM4_PRDY # H_INIT# [9]
LVD_VREFH PRDY _B
C166
N23 F15 H_BPM5_PREQ#
C173
EM I LVD_VREFL_OUT_R 2K_1%_04
L27 LVD_VREFL PREQ_B
[12] MCH_BLON LBKLT_EN
C167 R22 *0_04 Z0201 L26
[15] MCH_BLCTL LCTLA_CLK L23 LBKLT_CTL E13
LCTLB_DATA K25 LCTLA_CLK THERMTRIP_B H_THERMTRIP# [9]
0.1u_16V_Y 5V_04
K23 LCTLB_DATA
B.Schematic Diagrams
[12] L_DDC_CLK K24 LDDC_CLK
[12] L_DDC_DATA H26 LDDC_DATA
R104 51_04 H_TCK
H_TRST# [12] LVDD_EN LVDD_EN C18 H_PROCHOT#
R116 51_04
R29 2.37K_1%_04 LVD_IBG PROCHOT_B W1
LVD_VREFH_OUT_R CPUPWRGOOD H_PWRGD [10]
R24 *10mil_short (2) 1.05VS
R23 *10mil_short LVD_VREFL_OUT_R
LV DS Control Signal Group
LAYOUT NOTE:
LBKLT_CTL,LBKLT_EN,LV DD_EN A13 CPU_GTLREF
GTLREF R21
Zo = 50 Ohm ? 0% GTLREF M AX trace le ngth of
LAYOUT NOTE: H27
signal : 5 m ils PINE_VIEW_M VSS 500 m ils and 5 m ils s pacing 976_1%_04
Place te rm ination near CPU le ngth < 6000 m ils
RSVD
L6 CPU_RSVD_02
T10
EXTBGREF Sheet 2 of 26
1u_6.3V_X5R _06
E17 CPU_RSVD_03
H_BPM_1_N0 G11 RSVD T5
3.3VS RN1
H_BPM_1_N1
H_BPM_1_N2
E15
G13
F13
BPM_1B_0
BPM_1B_1
BPM_1B_2
BCLKN
BCLKP
H10
J10 CLK_CPU_BCLK# [7]
CLK_CPU_BCLK [7]
R27
Pineview CPU Part-
C17
2.2K_4P2R_04 H_BPM_1_N3 3.32K_1%_04
BPM_1B_3
1
2
4
3
LCTLA_CLK
LCTLB_DATA H_BPM_2_N0
H_BPM_2_N1
B18
B20 BPM_2B_0#/RSVD
BPM_2B_1#/RSVD
CPU
BSEL_0
BSEL_1
BSEL_2
K5
H5
K6
CLK_BSEL0 [3,7]
CLK_BSEL1 [3,7]
CLK_BSEL2 [3,7]
D
H_BPM_2_N2 C20
H_BPM_2_N3 B21 BPM_2B_2#/RSVD H30
BPM_2B_3#/RSVD VID_0 H29 H_VID0 [21]
VID_1 H28 H_VID1 [21]
VID_2 G30 H_VID2 [21]
1.05VS
CPU_RSVD_01 G5 VID_3 G29 H_VID3 [21]
H_TDI D14 RSVD VID_4 F29 H_VID4 [21] H_SMI# R6 *1K_04
H_TDO D13 TDI VID_5 E29 H_VID5 [21] H_A20M# R14 *1K_04
H_TCK B14 TDO VID_6 H_VID6 [21] H_INTR R100 *1K_04
H_TMS C14 TCK L7 H_NMI R9 *1K_04
H_TRST# C16 TMS RSVD D20 CPU_RSVD_05 H_IGNNE# R109 *1K_04
TRST_B RSVD H13 CPU_RSVD_06 T2 H_PWRGD R30 *1K_04
RSVD D18 CPU_RSVD_07 T6 H_INIT# R12 *1K_04
H_THERMDA D30 RSVD T3
H_THERMDC E30 THRMDA_1 K9 CPU_RSVD_TP_01 H_PROCHOT# R107 68_04
THRMDC_1 RSVD_TP D19 CPU_RSVD_TP_02 T8
RSVD_TP K7 EXTBGREF T4
EXTBGREF PROCHOT# m us t be term inated w ith a 56-O,
pull-up res is tor to V CCP e ve n if it is not us ed.
CLK_BSEL0 R17 470_04
CLK_BSEL1 R110 470_04
CLK_BSEL2 R11 470_04
C30
D31 RSVD_C30
RSVD_D31 4 OF 6
PINEVIEW-M
Thermal IC
3.3V 3.3VS
C13 R4
3/18 0.1u_16V_Y5V_04
U3
10K_04
1 4
H_THERMDA 2 VDD THERM 6 THERM_ALERT# [10,15]
D+ ALERT
C12
1000p_50V_X7R_04
3 7
H_THERMDC 5 D- SDATA 8 SMD_CPU_THERM [15]
GND SCLK SMC_CPU_THERM [15]
[8,10,11,12,13,17,18,19] 3.3V
EMC1402
[3,5,6,7,8,9,10,11,12,13,14,15,17,20,21] 3.3VS
[5,7,9,10,11,20] 1.05VS
LAYOUT NOTE: LAYOUT NOTE:
Route H_THERM DA and Clos e to Therm al IC
H_THERM DC on sam e layer.
10 m ils trace and 10 m ils spacing.
Pineview CPU Part-D B - 3
Schematic Diagrams http://hobi-elektronika.net
Pineview CPU Part A-C-F
DMI Signal Group
Zdiff = 85 Ohm ? 0%
U13F s ignal / s pace : 6 / 6 m ils
A11 REV = 1.1 F24 le ngth < 6400 m ils U13A
A16 VSS VSS F28 REV = 1.1
A19 VSS VSS F4
A29 VSS VSS G15 C176 0.1u_10V_X7R_04 DMI_RXP_0 F3 G2 DMI_TXP_0 R120 *10mil_short
A3 RSVD_NCTF VSS G17 [8] DMI_ICH_IT_MR0_DP DMI_RXN_0 F2 DMI_RXP_0 DMI_TXP_0 G1 DMI_TXN_0 DMI_ICH_MT_IR0_DP [8]
C177 0.1u_10V_X7R_04 R121 *10mil_short
A30 RSVD_NCTF VSS G22 [8] DMI_ICH_IT_MR0_DN DMI_RXP_1 H4 DMI_RXN_0 DMI_TXN_0 H3 DMI_TXP_1 DMI_ICH_MT_IR0_DN [8]
C179 0.1u_10V_X7R_04 DMI R123 *10mil_short
A4 RSVD_NCTF VSS G27 [8] DMI_ICH_IT_MR1_DP DMI_RXN_1 G3 DMI_RXP_1 DMI_TXP_1 J2 DMI_TXN_1 DMI_ICH_MT_IR1_DP [8]
C178 0.1u_10V_X7R_04 R125 *10mil_short
AA13 RSVD_NCTF VSS G31 [8] DMI_ICH_IT_MR1_DN DMI_RXN_1 DMI_TXN_1 DMI_ICH_MT_IR1_DN [8]
AA14 VSS VSS H11
AA16 VSS VSS H15
AA18 VSS VSS H2
AA2 VSS VSS H21
AA22 VSS VSS H25 N7 L10 EXP_RCOMPO
AA25 VSS VSS H8 [7] CLK_CPU_EXP# N6 EXP_CLKINN EXP_RCOMPO L9
AA26 VSS VSS J11 [7] CLK_CPU_EXP EXP_CLKINP EXP_ICOMPI L8 EXP_RBIAS
AA29 VSS VSS J13 R10 EXP_RBIAS
AA8 VSS VSS J15 R9 RSVD N11
AB19 VSS VSS J4 N10 RSVD PINE_VIEW_M RSVD_TP P11
LAYOUT NOTE: R26 R25
AB21 VSS VSS K11 N9 RSVD RSVD_TP
AB28 VSS VSS K13 RSVD 750_1%_04 49.9_1%_04
VSS VSS < 500 m ils to MCH ball
AB29 K19
AB30 VSS VSS K26
AC10 VSS VSS K27 K2 K3
AC11 VSS VSS K28 J1 RSVD_K2 RSVD_K3 L2
AC19 VSS PINE_VIEW_MVSS K30 M4 RSVD_J1 RSVD_L2 M2
B.Schematic Diagrams
AC2 VSS VSS K4 L3 RSVD_M4 RSVD_M2 N2
VSS VSS RSVD_L3 1 OF 6 RSVD_N2
AC21 K8
AC28 VSS GND VSS L1
(2) (1) (3)
AC30 VSS VSS L13 CRT Sync Signal Group CRT DAC Signal Group CRT Contr ol Signal Group
AD26 VSS VSS L18 PINEVIEW-M DAC_HSYNC,DAC_VSYNC CRT_RED,CRT_GREEN,CRT_BLUE CRT_DDC_CLK,CRT_DDC_DATA
AD5 VSS VSS L22
VSS VSS Zo = 50 Ohm ? 5% VGA RGB re s is tors cols e to M CH ball Zo = 50 Ohm ? 5%
AE1 L24
AE11 VSS VSS L25 signal : 5 m ils Zo = 37.5 Ohm ? 5% s ignal : 5 m ils
AE13 VSS VSS L29 le ngth < 14500 m ils s ignal : 9 m ils le ngth < 15100 m ils
AE15 VSS VSS M28
AE17 VSS VSS M3 length < 800 m ils
AE22 VSS VSS N1 Tw o VGA RGB res istors be tw e en
AE31 VSS VSS N13
AF11 VSS VSS N18
Zo = 50 Ohm ? 5%
s ignal : 5 m ils
Sheet 3 of 26 AF17
AF21
AF24
VSS
VSS
VSS
VSS
VSS
VSS
N24
N25
N28
U13C
REV = 1.1
length < 14000 m ils
AF28 VSS VSS N4
Pineview CPU Part AG10
AG3
VSS
VSS
VSS
VSS
N5
N8 [2,7] CLK_BSEL0
[2,7] CLK_BSEL1
R16
R111
*1K_04 Z0301
*1K_04 Z0302
D12
A7 XDP_RSVD_00 CRT_HSY NC
M30
M29 DAC_HSY NC [13]
DAC_VSY NC [13] (2)
AH18 VSS VSS P13 R10 *1K_04 Z0303 D6 XDP_RSVD_01 CRT_VSY NC 3.3VS
A-C-F AH23
AH28
AH4
VSS
VSS
VSS
VSS
VSS
VSS
P14
P16
P18
[2,7] CLK_BSEL2
T29
T1
XDP_RSVD_03
XDP_RSVD_04
C5
C7
C6
XDP_RSVD_02
XDP_RSVD_03
XDP_RSVD_04 CRT_RED
N31 DAC_RED
P30 DAC_GREEN DAC_RED [13]
PM_EXTTS#0 R122 10K_04
XDP_RSVD_05
VSS VSS XDP_RSVD_05 CRT_GREEN DAC_GREEN [13]
AH6
AH8 VSS VSS
P19
P21 XDP_RSVD_07
D8
B7 XDP_RSVD_06 CRT_BLUE
P29 DAC_BLUE
N30 DAC_BLUE [13] (1) PM_DPRSLPVR
T30 R129 *10K_04
AJ1 VSS VSS P3 A9 XDP_RSVD_07 CRT_IRTN
AJ16 RSVD_NCTF VSS P4 XDP_RSVD_09 D9 XDP_RSVD_08
VGA
AJ31
AK1
VSS
VSS
VSS
VSS
R25
R7 XDP_RSVD_11
C8
B8
XDP_RSVD_09
XDP_RSVD_10 L31
3/18
RSVD_NCTF VSS XDP_RSVD_11 CRT_DDC_DATA DAC_DDCADATA [13]
AK2
AK23 RSVD_NCTF VSS
R8
T11
C10
D10 XDP_RSVD_12 CRT_DDC_CLK
L30
DAC_DDCACLK [13] (3)
AK30 VSS VSS U22 B11 XDP_RSVD_13 P28 DACREFSET DAC_RED R124 150_1%_04
AK31 RSVD_NCTF VSS U23 B10 XDP_RSVD_14 DAC_IREF
AL13 RSVD_NCTF VSS U24 XDP_RSVD_16 B12 XDP_RSVD_15 Y 30 DAC_GREEN R127 150_1%_04
AL19 VSS VSS U27 T31 C11 XDP_RSVD_16 DPL_REFCLKINP Y 29 CLK_DREF [7]
XDP_RSVD_17
AL2 VSS VSS V14 XDP_RSVD_17 DPL_REFCLKINN AA30 CLK_DREF# [7] DAC_BLUE R126 150_1%_04
AL23 RSVD_NCTF VSS V16 DPL_REFSSCLKINP AA31 CLK_DREFSS [7]
AL29 VSS VSS V18 DPL_REFSSCLKINN CLK_DREFSS# [7]
RSVD_NCTF VSS LAYOUT NOTE:
AL3 V28
AL30 RSVD_NCTF VSS V29
AL9 RSVD_NCTF VSS W13 L11
Place VGA RGB res istors clos e to M CH
Z0304
B13 VSS VSS W2 T9 RSVD PINE_VIEW_M < 800 m ils to M CH ball
B16 VSS VSS W23 K29 PM_DPRSLPVR
B19 VSS VSS W25 PM_EXTTS#_1/DPRSLPVR J30 PM_EXTTS#0 PM_DPRSLPVR [10,21]
B22 VSS VSS W26 PM_EXTTS#_0 L5 PM_EXTTS#0 [6]
B30 VSS VSS W◦ Jabse Service Manual Search 2024 ◦ Jabse Pravopis ◦ onTap.bg ◦ Other service manual resources online : Fixya ◦ eServiceinfo