Service Manuals, User Guides, Schematic Diagrams or docs for : Compal COMPAL_LA-4241P_JHXXX-REV_1.0
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A B C D E
ZZZ1 ZZZ3 ZZZ4 ZZZ5 ZZZ6 PJP1 PJP1
PCB LA-4241P LS-4243P LS-4244P LS-4249P 14W_DCIN 15W_DCIN
14WDAZ@ 14WDA@ 14WDA@ 14WDA@ 14WDA@
14W_45@ 15W_45@
1 1
12/21 Add PJP1 for DCIN Cable on 45 Level
ZZZ2 ZZZ8 ZZZ9 ZZZ10 ZZZ11 ZZZ12 ZZZ13
One for 14W DCIN , PN: DC301001Y00
Another for 15W DCIN , PN: DC301001V00
PCB LA-4241P LS-4242P LS-4243P LS-4244P LS-4245P LS-4246P
15WDAZ@ 15WDA@ 15WDA@ 15WDA@ 15WDA@ 15WDA@ 15WDA@
05/20 Add DAZ PCB Panel P/N
Compal Confidential
2
JHXXX Schematics Document 2
Intel Penryn Processor with Cantiga + DDRII + ICH9M
(With nVIDIA MXM/B)
2008-06-03
3
REV: 1.0 3
4 4
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l.c
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tm
Security Classification Compal Secret Data Compal Electronics, Inc.
ho
Issued Date 2007/08/18 2008/8/18 Title
@
Deciphered Date
Cover Page
nf
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
ai
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS JHXXX M/B LA-4241P Schematic
x
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MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, June 03, 2008 Sheet 1 of 49
A B C D E
A B C D E
Compal Confidential
Thermal Sensor Clock Generator
Model Name : JHXXX Fan Control Intel Penryn Processor
page 4 ADT7421 ICS9LPRS387
page 4 page 16
File Name : LA-4241P uPGA-478 Package
1
page 4,5,6 1
FSB
H_A#(3..35) 667/800MHz H_D#(0..63)
LVDS
LCD Conn.
page 18 Memory BUS(DDRII) 200pin DDRII-SO-DIMM X2
HDMI Intel Cantiga
Dual Channel BANK 0, 1, 2, 3 page 14,15
page 25
CRT
page 19 1.8V DDRII 533/667
uFCBGA-1329
PCI-Express
page 7,8,9,10,11,12,13
MXM II VGA/B DMI
X4 mode USB conn x3 Bluetooth CMOS Camera Finger Print
page 17 TO I/O/Bpage 35
Conn page 34 page 40
Conn page 40
2 2
PCI-Express USB
Intel ICH9-M 3.3V 48MHz
3.3V 24.576MHz/48Mhz HD Audio
BGA-676
S-ATA
page 20,21,22,23
New Card MINI Card x3 LAN(GbE) port 0 GMCH HDA MDC 1.5 HDA Codec
Socket WLAN,
RTL8111C/8102E Card Reader page 8
Conn 40
page
ALC268
page 36
page 31 TV-Tuner
JMB385
Robson page 30 page 28 page 26
S-ATA HDD S-ATA ODD
Conn. page 24 Conn. page 24
3 in 1 Audio AMP
RJ45 socket page 37
3
page 29 page 26 LPC BUS 3
RTC CKT.
page 21 ENE KB926
Function/B page 32
Power On/Off CKT. Power USB/B
page 33
page 35
Touch Pad Int.KBD
page 34 page 33
USB I/O Conn.
DC/DC Interface CKT. CIR BIOS SCREW
page 41 page 39
LID SW page 34
Power Circuit DC/DC Debug port
4
page 35 4
page 41,42,43,45
46,47,48
TPM
CHARGER LED Security Classification Compal Secret Data Compal Electronics, Inc.
page 44 page 40
Issued Date 2007/08/18 Deciphered Date 2008/8/18 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
JHXXX M/B LA-4241P Schematic
Date: Friday, April 11, 2008 Sheet 2 of 49
A B C D E
A B C D E
Voltage Rails
Power Plane Description S1 S3 S5
VIN Adapter power supply (19V) N/A N/A N/A
B+ AC or battery power rail for power circuit. N/A N/A N/A
1 1
+CPU_CORE Core voltage for CPU ON OFF OFF
+0.9VS ( Actual +0.9V ) 0.9V switched power rail for DDR terminator ON ON OFF
+1.05VS 1.05V switched power rail ON OFF OFF
+1.5VS 1.5V switched power rail ON OFF OFF
+1.8V 1.8V power rail for DDR ON ON OFF
+1.8VS 1.8V switched power rail ON OFF OFF
+3VALW 3.3V always on power rail ON ON ON*
+3VS 3.3V switched power rail ON OFF OFF
EC SM Bus1 address EC SM Bus2 address
+5VALW 5V always on power rail ON ON ON*
+5VS 5V switched power rail ON OFF OFF Device Address Device Address
+VSB VSB always on power rail ON ON ON* Smart Battery 0001 011X b ADI ADM1032 1001 100X b
+RTCVCC RTC power ON ON ON EEPROM(24C16/02) 1010 000X b NVIDIA NB8X
ICH9M SM Bus address
2 2
Device Address
SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Clock Generator 1101 001Xb
(ICS9LPRS325AKLFT_MLF72)
Full ON HIGH HIGH HIGH HIGH ON ON ON ON
DDR DIMM0 1010 000Xb
S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW DDR DIMM1 1010 010Xb
R472 R472 R472 R472 R472
S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
SKU ID Table 4.7K_0402_5% 10K_0402_5% 18K_0402_5% 27K_0402_5% 39K_0402_5%
S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF H_14_C@ H_14_MP@ H_15_B@ H_15_C@ H_15_MP@
Vcc 3.3V +/- 5%
Rb 47K +/- 5% R472 R472 R472 R472 R472
Rb~ R470
PROJECT ID Table Ra~ R472 56K_0402_5% 82K_0402_5% 120K_0402_5% 220K_0402_5% 470K_0402_5%
L_14_B@ L_14_C@ L_14_MP@ L_15_B@ L_15_C@
ID1 ID0 Board ID Rb Ra V AD_BID min V AD_BID typ V AD_BID max Ra BOM Structure
3 3
JHT00 ( 00@ ) R361 R357 1 NA 4.7K +/- 5% 0 V 0 V 0 V H_14_B@
JHT01 ( 01@ ) R361 R355 2 47K(RB@) 4.7K +/- 5% 0.274 V 0.300 V 0.328 V H_14_C@
JHL90 ( 10@ ) R360 R357 3 47K(RB@) 10K +/- 5% 0.553V 0.578 V 0.628 V H_14_MP@
JHL91 ( 11@ ) R360 R355 4 47K(RB@) 18K +/- 5% 0.849V 0.913V 0.981 V H_15_B@
5 47K(RB@) 27K +/- 5% 1.129 V 1.204 V 1.282 V H_15_C@
6 47K(RB@) 39K +/- 5% 1.415 V 1.496 V 1.579 V H_15_MP@
7 47K(RB@) 56K +/- 5% 1.712 V 1.794 V 1.876 V L_14_B@
MIC ID Table 8 47K(RB@) 82K +/- 5% 2.020V 2.097 V 2.173 V L_14_C@
9 47K(RB@) 120K +/- 5% 2.303 V 2.371 V 2.437 V L_14_MP@
R Structure
10 47K(RB@) 220K +/- 5% 2.670 V 2.719 V 2.765 V L_15_B@
R585 Single MIC SINGLE@
11 47K(RB@) 470K +/- 5% 2.972 V 3.000 V 3.026 V L_15_C@
R583 Array MIC DUAL@
12 47K(RB@) NA 3.135 V 3.300 V 3.465 V NA for L_15_MP
4 4
om
l.c
ai
tm
Security Classification Compal Secret Data Compal Electronics, Inc.
ho
Issued Date 2007/08/18 2008/8/18 Title
@
Deciphered Date
Notes List
nf
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
ai
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS JHXXX M/B LA-4241P Schematic
x
he
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, June 03, 2008 Sheet 3 of 49
A B C D E
5 4 3 2 1
+1.05VS
EMI Recommend
Which to follow?
H_IERR# R12 56_0402_5%
Checklist CRB 1 2
D D
ITP_TMS R13 54.9_0402_1%
TCK 55_5% 54.9_1% 1 2
H_A#[3..35] ITP_TDI R14 54.9_0402_1%
<7> H_A#[3..35] TDI 55_5% 54.9_1% 1 2
H_REQ#[0..4] H_PROCHOT# R15 56_0402_5%
<7> H_REQ#[0..4] TMS 55_1% 54.9_1% 1 2
H_RS#[0..2] ITP_TCK R16 54.9_0402_1%
<7> H_RS#[0..2] TRST# 55_5% 54.9_1% 1 2
JCPU1A ITP_TRST# R17 54.9_0402_1%
H_A#3 J4 H1
PREQ# x 54.9_1% 1 2
A[3]# ADS# H_ADS# <7>
ADDR GROUP 0
H_A#4 L5 E2
H_A#5 A[4]# BNR# H_BNR# <7>
L4 A[5]# BPRI# G5 H_BPRI# <7>
H_A#6 K5
H_A#7 A[6]#
M3 A[7]# DEFER# H5 H_DEFER# <7>
H_A#8 N2 F21
H_A#9 A[8]# DRDY# H_DRDY# <7>
J1 E1
H_A#10 N3
A[9]# DBSY# H_DBSY# <7> 1/29 change to EMC1402 pn
H_A#11
H_A#12
P5
P2
A[10]#
A[11]# BR0# F1 H_BR0# <7> EMC1402 +3VS
U1
A[12]#
CONTROL
H_A#13 L2 D20 H_IERR# C1
H_A#14 A[13]# IERR# 0.1U_0402_16V4Z
P4 A[14]# INIT# B3 H_INIT# <21>
H_A#15 P1 1 2
H_A#16 A[15]#
R1 A[16]# LOCK# H4 H_LOCK# <7>
M1 LM95245CIMMX NOPB MSOP 8P
<7> H_ADSTB#0 ADSTB[0]# H_RESET# NS@
RESET# C1 H_RESET# <7>
H_REQ#0 K3 F3 H_RS#0
H_REQ#1 REQ[0]# RS[0]# H_RS#1 U1
H2 REQ[1]# RS[1]# F4 1
H_REQ#2 K2 G3 H_RS#2 C2 1 8
REQ[2]# RS[2]# VDD SCLK EC_SMB_CK2 <17,32>
C H_REQ#3 J3 G2 C
REQ[3]# TRDY# H_TRDY# <7>
H_REQ#4 L1 2200P_0402_50V7K THERMDA 2 7
REQ[4]# 2 D+ SDATA EC_SMB_DA2 <17,32>
HIT# G6 H_HIT# <7>
H_A#17 Y2 E4 THERMDC 3 6 2 1 +3VS
H_A#18 A[17]# HITM# H_HITM# <7> R19 R20 D- ALERT/THERM2 R706 10K_0402_5%
U5 A[18]#
H_A#19 R3 AD4 +3VS 1 2 4 5
A[19]# BPM[0]# THERM GND
ADDR GROUP 1
H_A#20 W6 AD3 R18 10K_0402_5%
H_A#21 A[20]# BPM[1]#
U4 AD1
XDP/ITP SIGNALS
H_A#22 A[21]# BPM[2]# ADT7421ARMZ-REEL_MSOP8
Y5 A[22]# BPM[3]# AC4
H_A#23 U1 AC2 EMI Recommend Address:100_1100 SMSC@
H_A#24 A[23]# PRDY# 0_0402_5% 0_0402_5%
R4 A[24]# PREQ# AC1
H_A#25 T5 AC5 ITP_TCK NS@ NS@
H_A#26 A[25]# TCK ITP_TDI
T3 A[26]# TDI AA6
H_A#27 W2 AB3
H_A#28 A[27]# TDO ITP_TMS
W5 A[28]# TMS AB5
H_A#29 Y4 AB6 ITP_TRST#
H_A#30 A[29]# TRST# ITP_DBRESET#
U2 C20
H_A#31
H_A#32
V4
W3
A[30]#
A[31]#
DBR# ITP_DBRESET# <22>
FAN1 Conn
A[32]# H_PROCHOT# <48>
H_A#33 AA4 THERMAL
H_A#34 A[33]#
AB2 A[34]#
H_A#35 AA3 D21 H_PROCHOT#
A[35]# PROCHOT# THERMDA_R R19 SMSC@ 100_0402_5% THERMDA
<7> H_ADSTB#1 V1 ADSTB[1]# THERMDA A24
B25 THERMDC_R R20 SMSC@ 100_0402_5% THERMDC
THERMDC +5VS
<21> H_A20M# A6 A20M# +5VS
ICH
ICH
A5 C7 1 2 C3 10U_0805_10V4Z
<21> H_FERR# FERR# THERMTRIP# H_THERMTRIP# <8,21>
C4 R705 0_0402_5% 1 2
<21> H_IGNNE# IGNNE#
1
<21> H_STPCLK# D5 STPCLK#
B U2 D1 B
<21> H_INTR C6 LINT0 H CLK
<21> H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK <16> 1 VEN GND 8 BAS16_SOT23-3
<21> H_SMI# A3 SMI# BCLK[1] A21 CLK_CPU_BCLK# <16> 2 VIN GND 7
+VCC_FAN1 3 6
2
VO GND
M4 RSVD[01] <32> EN_FAN1 1 R815 2 EN_FAN1_R 4 VSET GND 5 D2
N5 RSVD[02] 1 2
1
T2 330_0402_5% C769 G990P11U_SOP8
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