Service Manuals, User Guides, Schematic Diagrams or docs for : Compal Compal_LA-3861P
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ZZZ1 ZZZ2 ZZZ3 ZZZ4 ZZZ5
PCB PCB SW USB AUDIO
DAZ@ DAZ@ DAZ@ DAZ@
1 1
SE000008600
Compal Confidential
;
Email:[email protected]
2 2
Tanglha Schematics Document
Intel Merom Processor with Crestline + DDRII + ICH8M
3 2007-08-16 3
REV: 1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-3861P
Date: Monday, September 03, 2007 Sheet 1 of 47
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Compal Confidential
Model Name : Everest Intel Merom Processor
File Name : LA-3691P uPGA-478 Package
1
page 4,5,6 1
FSB
H_A#(3..35) 667/800MHz H_D#(0..63)
CRT CRT CRT
NB8M page 19
128M Memory BUS(DDRII) 200pin DDRII-SO-DIMM X2
Intel Crestline
LVDS Dual Channel page 14,15
VGA/B LCD Conn. LVDS BANK 0, 1, 2, 3
page 18 1.8V DDRII 533/667
uFCBGA-1299
PCI-Express
;
page 7,8,9,10,11,12,13
Email:[email protected]
DMI USB conn x2 USB conn x2 3 in 1
Bluetooth Card Reader
X4 mode TO M/B TO I/O/B socket
Conn page RTS 5158 page 29
page 33 page 37 33 page 28
2 2
PCI-Express USB CMOS
Intel ICH8-M 3.3V 48MHz
3.3V 24.576MHz/48Mhz
Camera
page 24
HD Audio
3.3V ATA-100 IDE
BGA-676
S-ATA port 0
page 20,21,22,23
New Card MINI Card LAN(10/100M) MDC 1.5 HDA Codec
Socket WLAN,
BCM5906 Conn 42
page
ALC861VD
page 38
page 33 3G/TV-Tuner
Robson page 32 page 30
S-ATA HDD CDROM
LPC BUS Conn. page 24 Conn. 24
page
Audio AMP
RJ45 page 39
3
page 31 3
ENE KB926 SPI ROM BIOS Int SPK Mic/Int
page 34 page 36
USB BD Audio BD
Fan Control Touch Pad Int.KBD
page 4 K_SW page 36 Line-out Mic/Ext
page 35
Clock Generator Sub BD
ICS9LPRS365
page 16 USBx2
Thermal Sensor
4
ADM1032 4
page 4
SW Board
HDD/ODD NUM CAP Scroll NOVO Mute User Power
Power circuit
page X
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
Power Battery W/L
MB THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-3861P
Date: Monday, August 20, 2007 Sheet 2 of 47
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1
Voltage Rails 1
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Power Plane Description S1 S3 S5
External PCI Devices
VIN Adapter power supply (19V) N/A N/A N/A
B+ AC or battery power rail for power circuit. N/A N/A N/A
DEVICE IDSEL # REQ/GNT # PIRQ
+CPU_CORE Core voltage for CPU ON OFF OFF
No PCI Device
+0.9VS 0.9V switched power rail for DDR terminator ON OFF OFF
+1.05VS 1.05V switched power rail ON OFF OFF
+1.25VS 1.25V switched power rail ON OFF OFF
+1.5VS 1.5V switched power rail ON OFF OFF
+1.8V 1.8V power rail for DDR ON ON OFF
;
+1.8VS 1.8V switched power rail ON OFF OFF
Email:[email protected]
+2.5VS 2.5V switched power rail ON OFF OFF
+3VALW 3.3V always on power rail ON ON ON*
+3VS 3.3V switched power rail ON OFF OFF
+5VALW 5V always on power rail ON ON ON*
2 2
+5VS 5V switched power rail ON OFF OFF
+VSB VSB always on power rail ON ON ON*
EC SM Bus1 address EC SM Bus2 address
+RTCVCC RTC power ON ON ON
Device Address Device Address
Smart Battery 0001 011X b GMT-781 1001 100X b
EEPROM(24C16/02) 1010 000X b NVIDIA NB8X
SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Full ON HIGH HIGH HIGH HIGH ON ON ON ON
S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
3
ICH8M SM Bus address 3
Device Address
BOARD ID Table
Clock Generator 1101 001Xb
ID1 ID0 TEST (ICS9LPRS325AKLFT_MLF72)
0(R744) 0(R745) DDR DIMM0 1010 000Xb
A-TEST
0(R744) 1(R742) DDR DIMM1 1010 010Xb
B-TEST
1(R741) 0(R745) C-TEST
PANEL ID Table
R Size
Ra (R743) 15W
Rb (R740) 14W
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-3861P
Date: Monday, August 20, 2007 Sheet 3 of 47
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5 4 3 2 1
Place close to CPU within 500mil
H_A#[3..35]
(7) H_A#[3..35]
(7) H_REQ#[0..4]
H_REQ#[0..4]
JP15A
XDP Reserve
H_RS#[0..2] H_A#3 J4 H1 H_ADS# (7)
(7) H_RS#[0..2] A[3]# ADS#
ADDR GROUP 0
H_A#4 L5 E2 H_BNR# (7)
H_A#5 A[4]# BNR# +VCCP
L4 A[5]# BPRI# G5 H_BPRI# (7)
H_A#6 K5
H_A#7 A[6]#
M3 A[7]# DEFER# H5 H_DEFER# (7)
H_A#8 N2 F21 XDP_TDI R33 1 2 150_0402_1%
A[8]# DRDY# H_DRDY# (7)
D H_A#9 J1 E1 D
A[9]# DBSY# H_DBSY# (7) +VCCP
H_A#10 N3 XDP_TMS R32 1 2 39_0402_1%
H_A#11 A[10]#
P5 A[11]# BR0# F1 H_BR0# (7)
H_A#12 P2 XDP_TDO R31 54.9_0402_1%
2 @
1
A[12]#
CONTROL
H_A#13 L2 D20 H_IERR# R73 2 1 56_0402_5%
A[13]# IERR#
H_A#14 P4 A[14]# INIT# B3 H_INIT# (21) Structure>
H_REQ#4 REQ[3]# TRDY#
L1 REQ[4]#
HIT# G6 H_HIT# (7)
H_A#17 Y2 E4
A[17]# HITM# H_HITM# (7)
H_A#18 U5
H_A#19 A[18]#
R3 A[19]# BPM[0]# AD4
ADDR GROUP 1
;
H_A#20 W6 AD3
H_A#21 A[20]# BPM[1]# +3VS
U4 A[21]# BPM[2]# AD1
H_A#22
Email:[email protected]
Y5 A[22]# BPM[3]# AC4 C327
XDP/ITP SIGNALS
H_A#23 U1 A[23]# PRDY# AC2 ESD concern
H_A#24 R4 AC1 1 2
A[24]# PREQ#
2
H_A#25 T5 AC5 XDP_TCK
A[25]# TCK T5
H_A#26 T3 AA6 XDP_TDI 0.1U_0402_16V4Z R268
A[26]# TDI T12
H_A#27 W2 AB3 XDP_TDO U19 10K_0402_5%
A[27]# TDO T10
H_A#28 W5 AB5 XDP_TMS H_THERMDA 2 1
A[28]# TMS T11 D+ VDD1
H_A#29 Y4 AB6 XDP_TRST# C328
T8
1
C H_A#30 A[29]# TRST# XDP_DBRESET# H_THERMDC THERM_SCI# C
U2 A[30]# DBR# C20 XDP_DBRESET# (22) 1 2 3 D- ALERT# 6 2 1 EC_THERM# (22,32)
H_A#31 V4 2200P_0402_50V7K R267 @ 0_0402_5%
H_A#32 A[31]# EC_SMB_CK2 THERM#
W3 A[32]# Connect SB SYS_RESET# or just left NC (32) EC_SMB_CK2 8 SCLK THERM# 4 2 1 +3VS
H_A#33 AA4 A[33]# THERMAL H_PROCHOT# H_PROCHOT# (46) 10K_0402_5% R269 Check : to sb
H_A#34 AB2 2 1 EC_SMB_DA2 7 5
A[34]# (32) EC_SMB_DA2 SDATA GND
H_A#35 AA3 D21 R70 56_0402_5% +VCCP
A[35]# PROCHOT# H_THERMDA
(7) H_ADSTB#1 V1 ADSTB[1]# THERMDA A24
B25 H_THERMDC G781F_SOP8
THERMDC
(21) H_A20M# A6 A20M#
Address:100_1100
ICH
(21) H_FERR# A5 FERR# THERMTRIP# C7 H_THERMTRIP# (8,21)
(21) H_IGNNE# C4 IGNNE#
(21) H_STPCLK# D5 STPCLK#
(21) H_INTR C6 LINT0 H CLK
(21) H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK (16)
(21) H_SMI# A3 SMI# BCLK[1] A21 CLK_CPU_BCLK# (16)
M4
N5
RSVD[01]
FAN1 Conn
RSVD[02]
T2 RSVD[03] H_THERMDA, H_THERMDC routing together,
V3 RSVD[04]
B2 Trace width / Spacing = 10 / 10 mil
RESERVED
RSVD[05]
C3 RSVD[06]
D2 RSVD[07]
D22 RSVD[08]
D3 +5VS
RSVD[09] +5VS
F6 RSVD[10] C100 1U_0603_10V4Z
DIODE
Closed to
1
B B
FOX_PZ4782A-274M-41_Merom U6 D8 Connector
ME@ 1 VEN GND 8
2 7 1SS355_SOD323
+VCC_FAN1 VIN GND @ D7
3 6
2
EN_FAN1 VO GND @ 1N4148_SOT23
(32) EN_FAN1 4 VSET GND 5
1 2
G993P1UF_SOP8
C94
1U_0603_10V4Z
+VCCP +3VS C358
1000P_0402_50V7K
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