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A B C D E
1 1
Compal Confidential
2 2
KIUN0 Schematics Document
Intel Diamondville Processor with Calistoga(945GSE) + DDRII + ICH7M
3
2009-03-31 3
REV: 1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
B 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-4421P
Date: Monday, April 06, 2009 Sheet 1 of 42
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A B C D E
Compal Confidential Diamondville SC
Z ZZ ZZZ1 ZZZ2 ZZZ3 FCBGA8
Model Name : KIUN0 437Pins Clock Generator
File Name : LA-5071P PCB PCB PCB PCB 22x22mm CK505 page 14
1
page 4,5 1
DAZ@ DAZ@ DAZ@
CRT Conn FSB
H_A#(3..31) 400/533MHz H_D#(0..63)
page 16
RGB
Calistoga GSE Memory BUS(DDRII) DDRII-SO-DIMM
Thermal Sensor page 13
EMC1402
FCBGA998
1.8V DDRII 400/533
page 4 LCD Conn. LVDS
page 15 27x27mm
page 6,7,8,9,10
MINI Card x2
DMI
page 21
X2 mode
USB USB Port X3
2
PCI-Express ICH7M HDA
2
page 30
BGA652
31x31mm SATA
page 17,18,19,20
10/100 Ethernet BlueTooth
MINI Card x1
RTL8103E(L) page21
page 21 page 25
SSD HDD CMOS CAM
LPC BUS page 21 page 24
page24
Transfermer
3
page 25 3
Aralia Codec
ALC272
page 22
Power ON/OFF RJ45
DC/DC Interface
page 31 page 25 Card Reader
page 28 RTS5159
3VALW/5VALW
page 37
ENE KBC SPI page 26
DC IN
page 34
KB926
page 27
1.5VS/0.9VS/
AMP & INT INT MIC HeadPhone & SD/MMC/MS
BATT IN 2.5VS MIC Jack
page 35 page 39 Speaker 22
page
page 22
page 23
CONN page 26
Int.KBD SPI ROM
page 29 page 27
CHARGER 1.8V/VCCP Touch Pad
page 36 page 29
4
page 38 4
CPU_CORE
page 40
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-4421P
Date: Monday, April 06, 2009 Sheet 2 of 42
A B C D E
A B C D E
1 1
Voltage Rails
External PCI Devices
Power Plane Description S1 S3 S5
VIN Adapter power supply (19V) N/A N/A N/A
DEVICE IDSEL # REQ/GNT # PIRQ
B+ AC or battery power rail for power circuit. N/A N/A N/A
No PCI Device
+CPU_CORE Core voltage for CPU ON OFF OFF
+0.9VS 0.9V switched power rail for DDR terminator ON OFF OFF
+VCCP VCCP switched power rail ON OFF OFF
+1.5VS 1.5V switched power rail ON OFF OFF
+1.8V 1.8V power rail for DDR ON ON OFF
+2.5VS 2.5V switched power rail ON OFF OFF
+3VALW 3.3V always on power rail ON ON ON*
+3VS 3.3V switched power rail ON OFF OFF
+5VALW 5V always on power rail ON ON ON*
+5VS 5V switched power rail ON OFF OFF
2 2
+VSB VSB always on power rail ON ON ON*
+RTCVCC RTC power ON ON ON
EC SM Bus1 address EC SM Bus2 address
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Device Address Device Address
Smart Battery 0001 011X b EMC1402 100_1100
SIGNAL
STATE SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Full ON HIGH HIGH HIGH ON ON ON ON
S1(Power On Suspend) HIGH HIGH HIGH ON ON ON LOW
S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF
S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF
S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF
3
ICH7M SM Bus address 3
BOARD ID Table(Page 25) Device Address
ID BRD ID Ra Rb Vab Clock Generator 1101 001Xb
(SLG8SP556VTR)
0 R01 (EVT) NC 0 0V DDR DIMMA 1010 000Xb
1 R02 (DVT) 100K 8.2K 0.25V
2 R03 (PVT) 100K 18K 0.50V
3 R10A (MP) 100K NC 3.3V
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/08/18 Deciphered Date 2007/8/18 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
B 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-4421P
Date: Monday, April 06, 2009 Sheet 3 of 42
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5 4 3 2 1
<6> H_A#[3..16]
<6> H_D#[0..15] H_D#[32..47] <6>
U9A U9 U9B
H_A#3 P21 V19 H_ADS# +VCCP +VCCP H_D#0 Y11 R3 H_D#32
A[3]# ADS# H_ADS# <6> D[0]# D[32]#
H_A#4 H20 Y19 H_BNR# H_BNR# <6> H_D#1 W10 R2 H_D#33
H_A#5 A[4]# BNR# H_BPRI# H_D#2 D[1]# D[33]# H_D#34
N20 U21 H_BPRI# <6> Y12 P1
A[5]# BPRI# D[2]# D[34]#
1
1
H_A#6 R20 H_D#3 AA14 N1 H_D#35
A[6]# D[3]# D[35]#
0
GROUP
ADDR
DATA GRP 0
H_A#7 J19 T21 H_DEFER# R22 R242 H_D#4 AA11 M2 H_D#36
A[7]# DEFER# H_DEFER# <6> D[4]# D[36]#
H_A#8 N19 T19 H_DRD Y# H_DRDY# <6> 56_0402_5% 330_0402_5% N280 H_D#5 W12 P2 H_D#37
H_A#9 A[8]# DRDY# H_DBSY# N280@ H_D#6 D[5]# D[37]# H_D#38
G20 A[9]# DBSY# Y18 H_DBSY# <6> AA16 D[6]# D[38]# J3
H_A#10 M19 H_D#7 Y10 N3 H_D#39
DATA GRP 2
2
2
H_A#11 A[10]# H_BR0# H_D#8 D[7]# D[39]# H_D#40
H21 T20 H_BR0# <6> Y9 G3
H_A#12 A[11]# BR0# H_D#9 D[8]# D[40]# H_D#41
L20 A[12]# Y13 D[9]# D[41]# H2
CONTROL
H_A#13 M20 F16 H_IERR# H_D#10 W15 N2 H_D#42
H_A#14 A[13]# IERR# H_INIT#_R R244 H_D#11 D[10]# D[42]# H_D#43
K19 A[14]# INIT# V16 1 2 1K_0402_5% H_INIT# <18> AA13 D[11]# D[43]# L2
D H_A#15 H_D#12 H_D#44 D
J20 A[15]# Y16 D[12]# D[44]# M3
H_A#16 L21 W20 H_LOCK# Close to CPU H_D#13 W13 J2 H_D#45
A[16]# LOCK# H_LOCK# <6> D[13]# D[45]#
H_ADSTB#0 K20 H_D#14 AA9 H1 H_D#46
<6> H_ADSTB#0 H_AP0 ADSTB[0]# H_RESET# H_D#15 D[14]# D[46]# H_D#47
T5 D17 D15 H_RS#[0..2] <6> W9 J1
<6> H_REQ#[0..4] H_REQ#0 AP0 RESET# H_RS#0 H_RESET# <6> H_DSTBN#0 D[15]# D[47]# H_DSTBN#2
PAD N21 W18 <6> H_DSTBN#0 Y14 K2 H_DSTBN#2 <6>
H_REQ#1 REQ[0]# RS[0]# H_RS#1 H_DSTBP#0 DSTBN[0]# DSTBN[2]# H_DSTBP#2
J21 REQ[1]# RS[1]# Y17 <6> H_DSTBP#0 Y15 DSTBP[0]# DSTBP[2]# K3 H_DSTBP#2 <6>
H_REQ#2 G19 U20 H_RS#2 H_DINV#0 W16 L1 H_DINV#2
REQ[2]# RS[2]# <6> H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 <6>
H_REQ#3 P20 W19 H_TRDY# H_DP#0 V9 M4 H_DP#2
REQ[3]# TRDY# H_TRDY# <6> DP#0 DP#2
H_REQ#4 R19 T6 PAD PAD T7
REQ[4]# <6> H_D#[16..31] H_D#[48..63] <6>
<6> H_A#[17..31] AA17 H_HIT# H_HIT# <6> H_D#16 AA5 C2 H_D#48
H_A#17 HIT# H_HITM# H_D#17 D[16]# D[48]# H_D#49
C19 A[17]# HITM# V20 H_HITM# <6> Y8 D[17]# D[49]# G2
H_A#18 F19 H_D#18 W3 F1 H_D#50
H_A#19 A[18]# H_D#19 D[18]# D[50]# H_D#51
E21 A[19]# BPM[0]# K17 U1 D[19]# D[51]# D3
H_A#20 A16 J18 H_D#20 W7 B4 H_D#52
A[20]# BPM[1]# D[20]# D[52]#
DATA GRP 1
H_A#21 D19 H15 H_D#21 W6 E1 H_D#53
H_A#22 A[21]# BPM[2]# H_D#22 D[21]# D[53]# H_D#54
C14 J15 Y7 A5
A[22]# BPM[3]# D[22]# D[54]#
ADDR GROUP 1
H_A#23 C18 K18 H_D#23 AA6 C3 H_D#55
H_A#24 A[23]# PRDY# PREQ# H_D#24 D[23]# D[55]# H_D#56
C20 J16 Y3 A6
DATA GRP 3
A[24]# PREQ# D[24]# D[56]#
XDP/ITP SIGNALS
H_A#25 E20 M17 ITP_TCK H_D#25 W2 F2 H_D#57
H_A#26 A[25]# TCK ITP_TDI H_D#26 D[25]# D[57]# H_D#58
D20 N16 V3 C6
H_A#27 A[26]# TDI ITP_TDO H_D#27 D[26]# D[58]# H_D#59
B18 M16 U2 B6
H_A#28 A[27]# TDO ITP_TMS H_D#28 D[27]# D[59]# H_D#60
C15 L17 T3 B3
H_A#29 A[28]# TMS ITP_TRST# H_D#29 D[28]# D[60]# H_D#61
B16 A[29]# TRST# K16 AA8 D[29]# D[61]# C4
H_A#30 B17 V15 H_D#30 V2 C7 H_D#62
H_A#31 A[30]# BR1# H_D#31 D[30]# D[62]# H_D#63
C16 W4 D2
H_A#32 A[31]# H_PROCHOT#_R H_DSTBN#1 D[31]# D[63]# H_DSTBN#3
A17 A[32]# PROCHOT# G17 1 2 H_PROCHOT# <40> <6> H_DSTBN#1 Y4 DSTBN[1]# DSTBN[3]# E2 H_DSTBN#3 <6>
H_A#33 B14 E4 H_THERMDA R24 22_0402_5% H_DSTBP#1 Y5 F3 H_DSTBP#3
<6> H_DSTBP#1 H_DSTBP#3 <6>
THERM
H_A#34 A[33]# THRMDA H_THERMDC H_DINV#1 DSTBP[1]# DSTBP[3]# H_DINV#3
B15
A[34]# THRMDC
E5 Close to CPU <6> H_DINV#1 Y6
DINV[1]# DINV[3]#
C5 H_DINV#3 <6>
H_A#35 A14 H_DP#1 R4 D4 H_DP#3
H_ADSTB#1 A[35]# H_THERMTRIP# T9 PAD DP#1 DP#3 PAD T8
<6> H_ADSTB#1 B19 ADSTB[1]# THERMTRIP# H17 ◦ Jabse Service Manual Search 2024 ◦ Jabse Pravopis ◦ onTap.bg ◦ Other service manual resources online : Fixya ◦ eServiceinfo