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A B C D E
1 1
PWWAA
2 Delhi 2
LA-6847P REV 1.0 Schematic
3
Intel Processor(ARD) /PCH(HM55) 3
2010-10-07 Rev 1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/09/05 Deciphered Date 2011/09/05 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A6847
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019AP
Date: Tuesday, December 28, 2010 Sheet 1 of 52
A B C D E
A B C D E
Compal Confidential Fan Control Clock Generator
Intel Arrandale APL5607 RTM890N-631-GRT
Model Name : PWWAA page 6 page 21
File Name : LA-6847P
1 1
PCIE-Express 16X 2.5GHz Memory BUS(DDRIII) 200pin DDRIII-SO-DIMM X2
rPGA-988
Dual Channel BANK 0, 1, 2, 3 page 11,12
page 5,6,7,8,9,10 1.5V DDRIII 800/1066 MT/s
VGA (DDR3)
ATI PARK XT S3 64bit with 512MB USB
DMI X4 USB port 0,1
page 13,14,15,16,17,18,19,20 page 32
2.5GHz
2IN1 RTS5137 Int. Camera
USB port 10 USB port 11
USB page 35 page 21
5V 480MHz
LCD Conn. CRT
2
page 21 page 22 2
PCIeMini Card
WiMax
USB
USB port 13
5V 480MHz page 33
PCIe 1x PCIeMini Card
1.5V 2.5GHz(250MB/s) WLAN
PCIe port 1
page 33
Intel Ibex Peak
SATA port 1 SATA HDD0
5V 3GHz(300MB/s) page 32
RJ45 RTL8105E-GR 10/100M PCIe 1x SATA port 4 SATA ODD
page 34 PCIe port 0 page 34 1.5V 2.5GHz(250MB/s) BGA-951 5V 3GHz(300MB/s) page 32
PCI
3 3
page 23~31
3.3V 33 MHz
LPC BUS
HD Audio 3.3V/1.5V 24MHz
Power/B conn. RTC CKT. HDA Codec
page 40 ALC259-GR
page 23 SPI ROM Debug Port ENE KB926 E0 page 36
page 23 page 39 page 38
DC/DC Interface CKT.
page 41
Int. Ext.
Touch Pad EC ROM MIC CONN MIC CONN HP CONN SPK CONN
Int.KBD (LVDS CONN) page 37 page 37 page 37
page 40 page 39 page 39 page 21
Power Circuit DC/DC
4 4
page 42~50
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/09/05 Deciphered Date 2011/09/05 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A6847
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019AP
Date: Tuesday, December 28, 2010 Sheet 2 of 52
A B C D E
5 4 3 2 1
DESIGN CURRENT 0.1A +3VL
B+
Ipeak=5A, Imax=3.5A, Iocp min=7.9 DESIGN CURRENT 5A +5VALW
SUSP
N-CHANNEL DESIGN CURRENT 4A +5VS
SI4800
D D
Ipeak=5A, Imax=3.5A, Iocp min=7.7 DESIGN CURRENT 5A +3VALW
UP6182CQAG
SUSP#
DESIGN CURRENT 2A +1.8VS
APL5930
SUSP
N-CHANNEL DESIGN CURRENT 4A +3VS
SI4800
LCD_ENVDD
P-CHANNEL DESIGN CURRENT 1.5A +LCD_VDD
AO3413
VR_ON
DESIGN CURRENT 48A +CPU_CORE
ISL62883HRZ
C SUSP# C
DESIGN CURRENT 15A +VGA_CORE
TPS51218DSCR
VTTP_EN
Ipeak=18A, Imax=12.6A, Iocp min=19.8 DESIGN CURRENT 18A +VTT
APW7138NITRL
SUSP#
Ipeak=7A, Imax=4.9A, Iocp min=7.7 DESIGN CURRENT 7A +1.05VS
RT8209BGQW
SUSP#
Ipeak=15A, Imax=10.5A, Iocp min=16.5 DESIGN CURRENT 15A +1.5V
RT8209BGQW SUSP
N-CHANNEL DESIGN CURRENT 2A +1.5V_CPU
FDS6676AS
SUSP
B N-CHANNEL DESIGN CURRENT 2A +1.5VS B
FDS6676AS
0.75VR_EN#
DESIGN CURRENT 1.5A +0.75VS
G2992F1U
A A
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/09/05 Deciphered Date 2011/09/05 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A6847
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019AP
Date: Tuesday, December 28, 2010 Sheet 3 of 52
5 4 3 2 1
A B C D E
( O MEANS ON X MEANS OFF )
Voltage Rails
+RTCVCC +B +5VL +5VALW +1.5V +5VS
+3VL +3VALW +3VS
+VSB +1.5VS
power
+VGA_CORE
1 plane BTO Option Table 1
+CPU_CORE
+VTT
Function MINI PCI-E SLOT LAN
+1.05VS
+1.8VS description SLOT1 LAN
+1.1VS
explain WLAN/BT 10/100M
State +0.75VS
BTO
Function Camera & Mic
description Camera & Mic
S0
O O O O O O explain Camera & Mic
S1 BTO CAM@
O O O O O O
2 2
S3
O O O O O X Function S3 Power Saving
S5 S4/AC description S3 Power Saving
O O O O X X
explain Power Saving
S5 S4/ Battery only
O O O X X X
BTO
S5 S4/AC & Battery
don't exist
O X X X X X
PCH SM Bus Address
Power Device HEX Address
+3VS DDR SO-DIMM 0 A0 H 1010 0000 b
3
+3VS DDR SO-DIMM 1 A4 H 1010 0100 b 3
SIGNAL
+3VS Clock Generator D2 H 1101 0010 b STATE SLP_S3# SLP_S4# SLP_S5#
+3VS New Card
Full ON HIGH HIGH HIGH
+3VS WLAN/WIMAX
+3VS Clock Generator S1(Power On Suspend) HIGH HIGH HIGH
S3 (Suspend to RAM) LOW HIGH HIGH
S4 (Suspend to Disk) LOW LOW HIGH
S5 (Soft OFF) LOW LOW LOW
EC SM Bus1 Address EC SM Bus2 Address
G3 LOW LOW LOW
Power Device HEX Address Power Device HEX Address
+3VL Smart Battery 16 H 0001 0110 b +3VS PCH 96 H 1001 0110 b
4
Power Device HEX Address 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/09/05 Deciphered Date 2011/09/05 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A6847
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
Custom B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019AP
Date: Tuesday, December 28, 2010 Sheet 4 of 52
A B C D E
5 4 3 2 1
JCPUB
1 2 H_COMP3 AT23
R1 20_0402_1% COMP3
BCLK A16 CLK_CPU_BCLK 28
MISC
MISC
1 2 H_COMP2 AT24 B16 CLK_CPU_BCLK# 28
R2 20_0402_1% COMP2 BCLK#
CLOCKS
1 2 H_COMP1 G16 AR30
R4 49.9_0402_1% COMP1 BCLK_ITP
BCLK_ITP# AT30
1 2 H_COMP0 AT26
R3 49.9_0402_1% COMP0
PEG_CLK E16 CLK_PEG 24
D16 +VTT
PEG_CLK# CLK_PEG# 24
PAD T41 TP_SKTOCC# AH24
+VTT SKTOCC#
DPLL_REF_SSCLK A18 Unused by Clarksfield rPGA989
D A17 PM_EXTTS#0 R15 2 1 10K_0402_5% D
CATERR# DPLL_REF_SSCLK#
1 2 AK14 CATERR#
THERMAL
THERMAL
R18 49.9_0402_1% PM_EXTTS#_R R13 2 1 10K_0402_5%
F6 SM_DRAMRST#_CPU
SM_DRAMRST#
28 PECI AT15 PECI
SM_RCOMP[0] AL1 SM_RCOMP_0 R6 1 2 100_0402_1%
AM1 SM_RCOMP_1 R7 1 2 24.9_0402_1% DDR3 Compensation Signals
Power has removed VR_TT# SM_RCOMP[1] Layout Note:Please these
SM_RCOMP[2] AN1 SM_RCOMP_2 R8 1 2 130_0402_1% resistors near Processor
+VTT 1 2 H_PROCHOT#_D AN26
R9 68_0402_5% PROCHOT#
AN15 PM_EXTTS#0
DDR3
MISC
PM_EXT_TS#[0]
PM_EXT_TS#[1] AP15 PM_EXTTS#_R 2 1 PM_EXTTS# 11,12
R12 0_0402_5%
28 H_THERMTRIP# AK15 THERMTRIP#
PRDY# AT28
S
D
AP27 SM_DRAMRST#_CPU 3 1
PREQ# SM_DRAMRST# 11,12
1
AN28 T45 PAD Q41
TCK BSS138_NL_SOT23-3
G
AP26 AP28 T44 PAD
2
RESET_OBS# TMS
PWR MANAGEMENT
PWR MANAGEMENT
AT27 T43 PAD R127
TRST# 100K_0402_5%
JTAG & BPM
RST_GATE 28
25 PMSYNCH AL15 AT29 T42 PAD
2
PM_SYNC TDI XDP_TDO
TDO AR27 C301, Q41,
2
AR29 XDP_TDI_M 2 1 +3VS C301 R127 from PS@
+1.5V_CPU TDI_M
2 1 H_PWRGOOD1_R AN14 VCCPWRGOOD_1 TDO_M AP29 XDP_TDO_M R312 1K_0402_5% 0.047U_0402_16V7K
to mount
0_0402_5% R25
1
DBR# AN25 XDP_DBRESET# 25
C AN27 C
28 H_PWRGOOD VCCPWRGOOD_0
2
R28 @ AJ22 Add on 10/28
1.1K_0402_1% DRAMPWROK BPM#[0]
25 DRAMPWROK AK13 SM_DRAMPWROK BPM#[1] AK22
BPM#[2] AK24
AJ24
1
VTTPWROK_CPU AM15 BPM#[3] XDP_TDO_M XDP_TDI_M
46 VTTPWROK_CPU VTTPWRGOOD BPM#[4] AJ25 1 2
DRAMPWROK AH22 R23 0_0402_5%
BPM#[5]
BPM#[6] AK23
AM26 TAPPWRGOOD BPM#[7] AH23
1
XDP_TDO 1 2 +VTT
R22 51_0402_5%
750_0402_1% BUF_PLT_RST#_R
27 BUF_PLT_RST# AL14 RSTIN#
R29 1.5K_0402_1% R30
2
R31
750_0402_1% IC,AUB_CFD_rPGA,R0P9
@
R28 unmount for NPS@
R29 always mount for PS@
B For S3 CPU Power Saving B
place near JCPU
+3VALW
1000P_0402_50V7K 2 1 C487 DRAMPWROK 1 2
C163 0.1U_0402_16V4Z
5
1000P_0402_50V7K 2 1 C488 VTTPWROK_CPU U16
VTTPWROK 1
P
41,46 VTTPWROK IN1
4 DRAMPWROK
O R33 1.5K_0402_1%
2 IN2
G
SN74AHC1G08DCKR_SC70-5
3
0715 --> change BOM structure to mount
A A
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/09/05 Deciphered Date 2011/09/05 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATICS,MB A6847
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4019AP
Date: Tuesday, December 28, 2010 Sheet 5 of 52
5 4 3 2 1
5 4 3 2 1
+5VS
FAN Control Circuit
1A
Remove Cap, for EMI
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