Service Manuals, User Guides, Schematic Diagrams or docs for : Compaq-HP HP 500
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A B C D E
1 1
2
Compal confidential 2
Schematics Document
Mobile Dothan uFCPGA with Intel
Alviso_GM+ICH6-M core logic
3
2006-09-15 3
REV:1.0
4 4
Title
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.3
Custom LA-3361P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, September 21, 2006 Sheet 1 of 43
A B C D E
A B C D E
Compal confidential
File Name : LA-3361P
1 1
Fan Control Mobile Dothan/Yonah Thermal Sensor Clock Generator
page 13
uFCPGA-478 CPU ADM1032ARM ICS 954226
page 4,5,6
page 13 page 16
FSB
H_A#(3..31) 400/533MHz H_D#(0..63)
LVDS CONN
page 14 One Channel
DDR2 -400/533 DDR2-SO-DIMM0
Intel Alviso GMCH page 12
PCBGA 1257 One Channel
CRT conn
page 15 page 7,8,9,10,11
2 2
USB conn x2
page 28
PCI-E(DMI)
USB conn x2
Option(15.4 Sub board connector)
page 19
LAN I/F MODEM AMOM
Intel ICH6-M AC-LINK Audio Conexant CX20493-58
page 26
PCI BUS mBGA-609 CX20468-31
page 25
INTEL LAN
page 17,18,19,20 AMP & Audio Jack
82562V 10 /100 TPA6211 page 27
3 page 22 Mini PCI CardBus Controller 3
socket
CB-1410
page 24
page 23
RJ45/11 CONN LPC BUS IDEBUS IDE HDD IDE ODD
page 22 Connector
page 21
Connector
page 21
Slot 0
page 23
EC KB910L Intel CPU debug conn Page 4
EC debug conn Page 29
RTC CKT. page 29 SW debug conn Page 29
page 18
Switch Button list:
Power Botton Page 30
Int.KBD Lid Switch Page 30
Power On/Off CKT. Touch Pad CONN.
page 29 LED Function List
page 31
page 29 Flash ROM Power LED Page 28
4
Caps Lock LED Page 28
4
DC/DC Interface CKT. SST39VF080-70 Wireless LED
page 30
Page 28
page 32 Charger LED Page 28
Compal Electronics, Inc.
Power Circuit DC/DC Title
33,34,35,36,37,38,39 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
Block Diagram Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.3
Custom LA-3361P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, September 21, 2006 Sheet 2 of 43
A B C D E
5 4 3 2 1
I2C / SMBUS ADDRESSING
Alviso 915GM SA00000K040
External PCI Devices
Alviso 910GML SA00000K100
DEVICE IDSEL # REQ/GNT # PIRQ
D BOM D
CARD BUS AD22 2 C
Wireless LAN(MINI PCI) AD20 0 E F
@ : not install
45@ : 45 level
14@ : 14"(IAT00) install
WLAN@ : with WLAN (mini PCI) install
Power Managment table
AMOM@ : with AMOM install
+CPU_CORE BATT@ : 45 level
Signal +VCCP(1.05V)
+5VS
+3VS
+2.5VS SPI@ : SPI ROM install
+3VALW +1.5VS
C
+1.8VS C
State +0.9VS
+5VALW +1.8V conn@ : ME part
IAT00 14"
S0 ON ON ON
S1 ON ON ON 46144232L01 915GM
46144232L02 910GML W/O WLAN
S3 ON ON OFF
46144232L03 910GML
S5 S4/AC ON OFF OFF
IAT10 15.4"
S5 S4/AC don't exist OFF OFF OFF
46144232L11 910GML
46144232L12 915GM
B 46144232L13 910GML W/O WLAN B
SMBUS Control Table
THERMAL
SOURCE INVERTER BATT SERIAL SENSOR SODIMM CLK CHIP MINI PCI LCD
EEPROM (CPU)
ADM1032
SMB_EC_CK1 KB910L
SMB_EC_DA1
SMB_EC_CK2 KB910L
SMB_EC_DA2
ICH_SMBCLK
ICH6-M
ICH_SMBDATA
LCD_DDCCLK Alviso
LCD_DDCDATA GM-GP
I2CC_SCL NV44M
A
I2CC_SDA A
Title
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
Design Note Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.3
Custom LA-3361P
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, September 21, 2006 Sheet 3 of 43
5 4 3 2 1
5 4 3 2 1
ZZZ1
<7> H_A#[3..31] H_D#[0..63] <7>
U15A
H_A#3 P4 A19 H_D#0
H_A#4 U4
A3# Dothan D0#
A25 H_D#1 layout note: Change R2004 to 649 ohm if using XTP to ITP adapter
H_A#5
H_A#6
V3
R3
A4#
A5#
D1#
D2# A22
B21
H_D#2
H_D#3
XDP Connector +3VS
H_A#7 A6# D3# H_D#4 R1998
V2 A7# D4# A24
LA3361P-Rev0.1 H_A#8 W1 B26 H_D#5 XDP_DBRESET#_R 1 2 @ 1K_0402_5%
H_A#9 A8# D5# H_D#6
T4 A9# D6# A21
D H_A#10 W2 B20 H_D#7 04/10 no stuff +VCCP D
H_A#11 A10# D7# H_D#8
Y4 A11# D8# C20
H_A#12 Y1 B24 H_D#9
H_A#13 A12# D9# H_D#10 JP48 XDP_TDI R1999 1 54.9_0402_1%
U1 A13# D10# D24 2
H_A#14 AA3 E24 H_D#11 1 2
H_A#15 A14# D11# H_D#12 XDP_BPM#5 GND0 GND1 XDP_TMS R2000 1 54.9_0402_1%
Y3 A15# D12# C26 3 OBSFN_A0 OBSFN_C0 4 2
H_A#16 AA2 B23 H_D#13 XDP_BPM#4 5 6
H_A#17 A16# D13# H_D#14 OBSFN_A1 OBSFN_C1 XDP_TDO R2001 1 54.9_0402_1%
AF4 A17# D14# E23 7 GND2 GND3 8 2
H_A#18 AC4 C25 H_D#15 XDP_BPM#3 9 10
H_A#19 A18# D15# H_D#16 XDP_BPM#2 OBSDATA_A0 OBSDATA_C0 XDP_BPM#5 R2002 1 54.9_0402_1%
AC7 A19# D16# H23 11 OBSDATA_A1 OBSDATA_C1 12 2
H_A#20 AC3 G25 H_D#17 13 14
H_A#21 A20# D17# H_D#18 XDP_BPM#1 GND4 GND5 XDP_HOOK1 R2003 1
AD3 A21# D18# L23 15 OBSDATA_A2 OBSDATA_C2 16 2 @ 54.9_0402_1%
H_A#22 AE4 M26 H_D#19 XDP_BPM#0 17 18
H_A#23 A22# D19# H_D#20 OBSDATA_A3 OBSDATA_C3
AD2 A23# D20# H24 19 GND6 GND7 20
H_A#24 AB4 F25 H_D#21 21 22 XDP_TRST# R2004 1 2 51_0402_1%
H_A#25 A24# D21# H_D#22 OBSFN_B0 OBSFN_D0
AC6 A25# ADDR GROUP DATA GROUP D22# G24 23 OBSFN_B1 OBSFN_D1 24
H_A#26 AD5 J23 H_D#23 25 26 XDP_TCK R2005 1 2 54.9_0402_1%
H_A#27 A26# D23# H_D#24 GND8 GND9
AE2 A27# D24# M23 27 OBSDATA_B0 OBSDATA_D0 28
H_A#28 AD6 J25 H_D#25 29 30
H_A#29 A28# D25# H_D#26 OBSDATA_B1 OBSDATA_D1
AF3 A29# D26# L26 31 GND10 GND11 32
H_A#30 AE1 N24 H_D#27 33 34
H_A#31 A30# D27# H_D#28 OBSDATA_B2 OBSDATA_D2
<7> H_REQ#[0..4] AF1 A31# D28# M25 35 OBSDATA_B3 OBSDATA_D3 36
H26 H_D#29 37 38
H_REQ#0 D29# H_D#30 H_PWRGOOD_R GND12 GND13 CLK_ITP
R2 REQ0# D30# N25 39 PWRGOOD/HOOK0 ITPCLK/HOOK4 40
H_REQ#1 P3 K25 H_D#31 XDP_HOOK1 41 42 CLK_ITP#
H_REQ#2 REQ1# D31# H_D#32 HOOK1 ITPCLK#/HOOK5 1K_0402_1%
T2 REQ2# D32# Y26 +VCCP 43 VCC_OBS_AB VCC_OBS_CD 44 +VCCP
H_REQ#3 P1 AA24 H_D#33 45 46 H_RESET#_R 1 R2006 2 H_RESET#
H_REQ#4 REQ3# D33# H_D#34 HOOK2 RESET#/HOOK6 XDP_DBRESET#_R 2
T1 REQ4# D34# T25 1 47 HOOK3 DBR#/HOOK7 48 1 XDP_DBRESET#
U23 H_D#35 49 50 200_0402_1%
H_ADSTB#0 D35# H_D#36 C1531 GND14 GND15 XDP_TDO R2007
<7> H_ADSTB#0 U3 ADSTB0# D36# V23 51 SDA TD0 52
H_ADSTB#1 AE5 R24 H_D#37 53 54 XDP_TRST#
<7> H_ADSTB#1 ADSTB1# D37# 2 SCL TRST#
R26 H_D#38 55 56 XDP_TDI
C D38# H_D#39 XDP_TCK TCK1 TDI XDP_TMS C
D39# R23 57 TCK0 TMS 58
CLK_ITP A16 AA23 H_D#40 59 60 XDP_PRE 1 R2008 2 0_0402_5%
<16> CLK_ITP ITP_CLK0 D40# GND16 GND17
CLK_ITP# A15 U26 H_D#41 0.1U_0402_16V4Z
<16> CLK_ITP# ITP_CLK1 D41#
V24 H_D#42 CONN@ SAMTE_BSH-030-01-L-D-A
CLK_CPU_BCLK D42# H_D#43
<16> CLK_CPU_BCLK B15 BCLK0 D43# U25 Place R2006 within 200ps (~1") to CPU
CLK_CPU_BCLK# B14 HOST CLK V26 H_D#44
<16> CLK_CPU_BCLK# BCLK1 D44#
Y23 H_D#45
D45# H_D#46
D46# AA26
Y25 H_D#47
H_ADS# D47# H_D#48
<7> H_ADS# N2 ADS# D48# AB25
H_BNR# L1 AC23 H_D#49
<7> H_BNR# BNR# D49#
H_BPRI# J3 AB24 H_D#50
<7> H_BPRI# BPRI# D50#
H_BR0# N4 AC20 H_D#51
<7> H_BR0# BR0# D51# +3VS
H_DEFER# L4 AC22 H_D#52
<7> H_DEFER# DEFER# D52#
H_DRDY# H2 AC25 H_D#53
<7> H_DRDY# DRDY# D53# +VCCP
H_HIT# K3 AD23 H_D#54
<7> H_HIT# HIT# D54#
1
R37 H_HITM# K4 CONTROL GROUP AE22 H_D#55
<7> H_HITM# HITM# D55#
1 2 H_IERR# A4 AF23 H_D#56 R258
+VCCP 56_0402_5% H_LOCK# IERR# D56# H_D#57
<7> H_LOCK# J2 LOCK# D57# AD24 1K_0402_5%
H_RESET# B11 AF20 H_D#58
<7> H_RESET# RESET# D58#
1" ~ 6.5" AE21 H_D#59
2
D59#
1
AD21 H_D#60
<7> H_RS#[0..2] D60#
H_RS#0 H1 AF25 H_D#61 R266
H_RS#1 RS0# D61# H_D#62
K1 RS1# D62# AF22 56_0402_5%
H_RS#2 L2 AF26 H_D#63
RS2# D63# PROCHOT# <29>
H_TRDY# M3
<7> H_TRDY#
2
TRDY#
1
1
R253 C
D25 56_0402_5% 2 Q29
DINV0# H_DINV#0 <7> B
J26 2SC2411K_SOT23
DINV1# H_DINV#1 <7> E
XDP_BPM#0 C8 T24 H_DINV#2 <7>
3
XDP_BPM#1 BPM0# DINV2#
B8 AD20 H_DINV#3 <7>
2
XDP_BPM#2 BPM1# DINV3#
A9 BPM2#
B XDP_BPM#3 B
C9 BPM3# H_DSTBN#[0..3] <7>
C23 H_DSTBN#0 H_PROCHOT#
XDP_DBRESET# DSTBN0# H_DSTBN#1
<19> XDP_DBRESET# A7 DBR# DSTBN1# K24
H_DPRSLP will change to H_DBSY# M2 W25 H_DSTBN#2
<7> H_DBSY# DBSY# DSTBN2#
H_DPSLP# B7 AE24 H_DSTBN#3
H_DPRSTP in future <18> H_DPSLP#
H_DPRSLP# G1
DPSLP# DSTBN3#
C22 H_DSTBP#0
H_DSTBP#[0..3] <7>
<18> H_DPRSLP# DPRSTP# DSTBP0#
collateral version. <7> H_DPWR# C19 DPWR# DSTBP1# L24 H_DSTBP#1
XDP_BPM#4 A10 MISC W24 H_DSTBP#2
XDP_BPM#5 PRDY# DSTBP2# H_DSTBP#3
B10 PREQ# DSTBP3# AE25
H_PROCHOT# B17
H_PWRGOOD_R R2009 2 PROCHOT#
1 1K_0402_5%
<18> H_PWRGOOD E4 PWRGOOD
H_CPUSLP# A6
<7,18> H_CPUSLP# SLP#
XDP_TCK A13
XDP_TDI TCK H_A20M#
C12 TDI A20M# C2 H_A20M# <18>
XDP_TDO A12 D3 H_FERR#
TDO FERR# H_FERR# <18>
TEST1 C5 A3 H_IGNNE#
TEST1 IGNNE# H_IGNNE# <18>
TEST2 F23 B5 H_INIT#
TEST2 INIT# H_INIT# <18>
XDP_TMS C11 D1 H_INTR
TMS LINT0 H_INTR <18>
XDP_TRST# B13 D4 H_NMI
TRST# LINT1 H_NMI <18>
LEGACY CPU
THERMAL
H_THERMDA B18 C6 H_STPCLK#
<13> H_THERMDA
H_THERMDC THERMDA DIODE STPCLK# H_SMI#
H_STPCLK# <18>
R32
<13> H_THERMDC A18 THERMDC SMI# B4 H_SMI# <18> Add pullups for PWRGOOD and THERMTRIP per INTEL
C17 200_0402_5%
<7,18> H_THERMTRIP# THERMTRIP#
+VCCP 1 2 H_PWRGOOD
TYCO_1612365-1_Dothan
R251
A TEST2 A
1 2
@ 1K_0402_5%
R35
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