Service Manuals, User Guides, Schematic Diagrams or docs for : Dell DELL D520 - QUANTA DM5 - SHELBY-INTEGRATED - SC
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1 2 3 4 5 6 7 8
DC/DC
DRAM Power
1.8V, 0.9V
PG 43
SHELBY-INTEGRATED
+3V_SRC
A A
+5VSUS
1.5VSUS, 1.05V
PG 46
PG 44
IMVP-6
CPU VR
AC/BATT
Yonah CLOCKS SYSTEM SWTICH & LED & FAN & THERMAL
PG 48 RESET CKT IO CONN
PG 45 CONNECTOR ICS954301
PG 33 PG 32
(478 Micro-FCPGA) PG 17 PG 40
BATT
RUN POWER PG 41
SELECTOR PG 3,4
SW
Panel Connector
PG 47 BATT 533/667 PG 19
PG 42
CHARGER MHz FSB LVDS
B
POWER DC/DC sDVO SI1362
DVI
B
Calistoga PG 18
400/533/667 MHZ DDR II TVOUT S-Video
DDR2-SODIMM1
PG 20
PG 15,16
1466 uFCBGA
400/533/667 MHZ DDR II VGA CRT
DDR2-SODIMM2 PG 5,6,7,8,9,10 PG 20
PG 15,16
USB2.0 (P5,P6)
2 Rear Ports PG 33
DMI X4 Interface
USB2.0 (P3,P4)
2 right Side PG 33
USB2.0 (P7)
SATA - HDD SATA
33MHz PCI DOCKING
PG 21 CONNECTOR
ICH7-M
ATA 66/100 1394 CONN CARDBUS PCMCIA LAN (100/10)
Internal Media Bay 652 BGA PG 39
C OZ711 CON. BCM4401 C
CD-ROM PG 21 USB2.0(P2)
PG 25 PG 24 PG 24
PG 36
AC97/Azalia PG 11,12,13,14
USB2.0 (P0)
E-Switch
PCIE MINI-PCIE
Wireless LAN
PI3L110Q
LPC USB2.0 (P1)
SPI
ECE_USB2.0(P1) PG 23 PG 37
AUDIO MDC
STAC9200 I/O Board CONN
PG 26 SIO MEC5004 SIO ECE5018
PG 34,35 PG 33
128KB Flash Expander ECE_USB2.0(P2) Bluetooth
BC
TMKBC USB 2.0 Hub(4) PG 31
SPI DOCK LPC
128 Pins VTQFP 128 Pins VTQFP
S/PDIF to Audio RJ11 to Tip
PG 27 PG 28
DOCK Jacks DOCK Ring
D
PG 39 PG 35 PG 39 PG 26 D
PS/2 QUANTA
Flash Touchpad
Keyboard IrDA Serial
Title
COMPUTER
PG 30 PG 27 PG 31 PG 38 PG 29 Schematic Block Diagram1
Size Document Number R ev
DM5 1A
Date: , 27, 2005 Sheet 1 of 59
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
INDEX
Power & Ground
Pg# Description DNI LIST
Label Pg# Description Control Signal
1 Schematic Block Diagram 1
DC_IN+ AC ADAPTER (20V)
2 Front Page
PBATT+ MAIN BATTERY + (10~17V)
3-4 Yonah
A A
PWR_SRC MAIN POWER (10~20V)
5-10 Calistoga
11-14 ICH7
15-16 DDRII SO-DIMM(200P)
VHCORE CPU CORE POWER (1.25/1.15V) RUNPWROK
17 Clock Generator
1.05V AGTL+ POWER (1.05V) I/O RUNPWROK
18 SI1362
19 LCD Conn. & SSP
+3VRUN SLP_S3# CTRLD POWER RUN_ON
20 CRT & TV Conn.
+3VSUS SLP_S5# CTRLD POWER SUS_ON
21 SATA & IDE Conn.
+5VALW 8051 POWER (5V)
22 PAD & Screw Hole
+5VRUN SLP_S3# CTRLD POWER RUN_ON
23 MiniCard
B B
+5VSUS SLP_S5# CTRLD POWER SUS_ON
24 PCCARD&CONN
+5VHDD HDD POWER (5V) HDDC_EN#
25 1394
+5VMOD MODULE POWER (5V) MODC_EN#
26 MDC Conn.
STRB#/5V EXTERNAL FDD POWER (5V) FDD/LPT#
27-28 SIO (MEC5004 & ECE5018)
+5VRUN FAN POWER (5V) FAN_OFF/ON#
29 Serial Port
VDDA AUDIO ANALOG POWER (5V) RUN_ON
30 Flash ROM
1_8VSUS RESUME WELL IN ICH
31 Touch Pad CONN.& Bluetooth CONN
1_8VRUN SLP_S3# CTRLD POWER
32 FAN & Thermal
+3VALW 8051 POWER (3V)
33 Switch Board Conn. & LED & IO Board
V1_5RUN ALVISO POWER Non-CPU I/O
C 34-35 Azelia CODEC (STAC9751) & Phone Jack C
36 LAN BCM4401 10/100
GND ALL PAGES DIGITAL GROUND
37 LAN SWITCH / LAN POWER
38 FIR COMBO CONN GND
39 Docking Conn.
40 SYSTEM RESET/POWER GOOD
41-42 Battery Selector & Charger
43 1.8VSUS/0.9V
44 1.5V/1.05V
45 CPU Power
D 46 D/D Power D
47 RUN Power Switch QUANTA
48 DCIN , Batt
Title
COMPUTER
Index, DNI, Power & Ground
49 Power Block Diagram
Size Document Number R ev
DM5 3A
50 SMBUS Block Diagram
Date: , 27, 2005 Sheet 2 of 59
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
H_A#[3..16] U6A H_D#[0..63] U6B H_D#[0..63]
5 H_A#[3..31] 5 H_D#[0..63] H_D#[0..63] 5
H_A#3 J4 H1 H_D#0 E22 AA23 H_D#32
A[3]# ADS# H_ADS# 5 D[0]# D[32]#
H_A#4 L4 E2 H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# 5 D[1]# D[33]#
H_A#5 M3 G5 H_D#2 E26 V24 H_D#34
A[5]# BPRI# H_BPRI# 5 D[2]# D[34]#
H_A#6 K5 H_D#3 H22 V26 H_D#35
A[6]# D[3]# D[35]#
DATA GRP 0
H_A#7 H_D#4 H_D#36
DATA GRP 2
M1 A[7]# DEFER# H5 H_DEFER# 5 F23 D[4]# D[36]# W25
ADDR GROUP 0
H_A#8 N2 F21 H_D#5 G25 U23 H_D#37
A[8]# DRDY# H_DRDY# 5 D[5]# D[37]#
H_A#9 J1 E1 H_D#6 E25 U25 H_D#38
A[9]# DBSY# H_DBSY# 5 D[6]# D[38]#
CONTROL
H_A#10 N3 H_D#7 E23 U22 H_D#39
A
H_A#11 A[10]# H_D#8 D[7]# D[39]# H_D#40 A
P5 A[11]# BR0# F1 H_BR0# 5 K24 D[8]# D[40]# AB25
H_A#12 P2 H_D#9 G24 W22 H_D#41
H_A#13 A[12]# D[9]# D[41]#
L1 A[13]# IERR# D20 H_IERR# H_D#10 J24 D[10 D[42]# Y23 H_D#42
H_A#14 P4 B3 H_INIT# H_D#11 J23 AA26 H_D#43
A[14]# INIT# H_INIT# 11 D[11]# D[43]#
H_A#15 P1 H_D#12 H26 Y26 H_D#44
H_A#16 A[15]# H_D#13 D[12]# D[44]# H_D#45
R1 A[16]# LOCK# H4 H_LOCK# 5 F26 D[13]# D[45]# Y22
L2 H_D#14 K22 AC26 H_D#46
5 H_ADSTB#0 ADSTB[0]# D[14]# D[46]#
B1 H_RESET# H_D#15 H25 AA24 H_D#47
RESET# H_RESET# 5 D[15]# D[47]#
5 H_REQ#0 K3 REQ[0]# RS[0]# F3 H_RS#0 5 5 H_DSTBN#0 H23 DSTBN[0]# DSTBN[2]# W24 H_DSTBN#2 5
5 H_REQ#1 H2 REQ[1]# RS[1]# F4 H_RS#1 5 5 H_DSTBP#0 G22 DSTBP[0]# DSTBP[2]# Y25 H_DSTBP#2 5
5 H_REQ#2 K2 REQ[2]# RS[2]# G3 H_RS#2 5 5 H_DINV#0 J26 DINV[0]# DINV[2]# V23 H_DINV#2 5
5 H_REQ#3 J3 REQ[3]# TRDY# G2 H_TRDY# 5
L5 H_D#[0..63] H_D#[0..63]
5 H_REQ#4 H_A#[17..31] REQ[4]# 5 H_D#[0..63] H_D#[0..63] 5
G6 H_D#16 N22 AC22 H_D#48
5 H_A#[17..31] HIT# H_HIT# 5 D[16]# D[48]#
H_A#17 Y2 E4 H_D#17 K25 AC23 H_D#49
A[17]# HITM# H_HITM# 5 D[17]# D[49]#
H_A#18 U5 H_D#18 P26 AB22 H_D#50
H_A#19 A[18]# ITP_BPM#0 H_D#19 D[18]# D[50]# H_D#51
R3 A[19]# BPM[0]# AD4 R23 D[19]# D[51]# AA21
DATA GRP 1
H_A#20 ITP_BPM#1 Place voltage H_D#20 H_D#52
DATA GRP 3
W6 A[20]# BPM[1]# AD3 L25 D[20]# D[52]# AB21
divider within
XDP/ITP SIGNALS
H_A#21 U4 AD1 ITP_BPM#2 H_D#21 L22 AC25 H_D#53
H_A#22 A[21]# BPM[2]# ITP_BPM#3 0.5" of GTLREF H_D#22 D[21]# D[53]# H_D#54
Y5 A[22]# BPM[3]# AC4 L23 D[22]# D[54]# AD20
H_A#23 U2 AC2 ITP_BPM#4 pin H_D#23 M23 AE22 H_D#55
H_A#24 A[23]# PRDY# ITP_BPM#5 H_D#24 D[23]# D[55]# H_D#56
R4 A[24]# PREQ# AC1 P25 D[24]# D[56]# AF23
H_A#25 T5 AC5 ITP_TCK H_D#25 P22 AD24 H_D#57
H_A#26 A[25]# TCK ITP_TDI +1.05V_VCCP H_D#26 D[25]# D[57]# H_D#58
T3 A[26]# TDI AA6 P23 D[26]# D[58]# AE21
H_A#27 W3 AB3 ITP_TDO H_D#27 T24 AD21 H_D#59
H_A#28 A[27]# TDO ITP_TMS H_D#28 D[27]# D[59]# H_D#60
W5 A[28]# TMS AB5 R24 D[28]# D[60]# AE25
H_A#29 Y4 AB6 ITP_TRST# H_D#29 L26 AF25 H_D#61
H_A#30 A[29]# TRST# H_D#30 D[29]# D[61]# H_D#62
W2 A[30]# DBR# C20 ITP_DBRESET# 13,27 T25 D[30]# D[62]# AF22
H_A#31 Y1 H_D#31 N24 AF26 H_D#63
A[31]# D[31]# D[63]#
B
5 H_ADSTB#1 V4 ADSTB[1]# PROCHOT D21 H_PROCHOT# 5 H_DSTBN#1 M24 DSTBN[1]# DSTBN[3]# AD23 H_DSTBN#3 5 B
THERMDA A24 H_THERMDA H_THERMDA 32
R146
5 H_DSTBP#1 N25 DSTBP[1]# DSTBP[3]# AE24 H_DSTBP#3 5
THERM
H_A20M# A6 A25 H_THERMDC Routing together 1K/F M26 AC20
11 H_A20M# A20M# THERMDC H_THERMDC 32 Trace width/Spacing 5 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 5
H_FERR# A5
11 H_FERR# FERR# =10/10 mil
H_IGNNE# C4 C7 H_THERMTRIP# V_CPU_BTLREF AD26 R26 COMP0
11 H_IGNNE# IGNNE# THERMTRIP# H_THERMTRIP# 32 GTLREF COMP[0]
MISC U26 COMP1
H_STPCLK# CT_1214:Change R29 R29 *1K_NC COMP[1] COMP2
11 H_STPCLK# D5 STPCLK# COMP[2] U1
C6 from 51_NC to 1K_NC 1 2 TEST1 C26 V1 COMP3
H CLK
11 H_INTR LINT0 TEST1 COMP[3]
B4 A22 R142
11 H_NMI LINT1 BCLK[0] CLK_CPU_BCLK 17
H_SMI# A3 A21 2K/F 1 51 2 TEST2 D25 E5
11 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 17 TEST2 DPRSTP# H_DPRSTP# 11,45
R28 B5
DPSLP# H_DPSLP# 11
AA1 Pop R28 for Yonah B0 & forward D24 H_DPWR# 5
RSVD[01]# DPWR#
AA4 RSVD[02]# RSVD[12]# T22 6,17 CPU_MCH_BSEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGOOD 11
AB2 RSVD[03]# 6,17 CPU_MCH_BSEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 5,11
2
2
2
2
RESERVED
AA3 RSVD[04]# 6,17 CPU_MCH_BSEL2 C21 BSEL[2] PSI# AE6 H_PSI# 45
M4 D2 R154 R156 R155 R158
RSVD[05]# RSVD[13]# 54.9/F 27.4/F 54.9/F 27.4/F
N5 RSVD[06]# RSVD[14]# F6 Yonah
T2 RSVD[07]# RSVD[15]# D3
V3 C1
1
1
1
1
RSVD[08]# RSVD[16]#
B2 RSVD[09]# RSVD[17]# AF1
C3 D22 R30 *56_NC
RSVD[10]# RSVD[18]# H_DPRSTP#
RSVD[19]# C23 1 2
B25 C24 +1.05V_VCCP
RSVD[11]# RSVD[20]# R32 *56_NC Comp0,2 connect with Zo=27.4ohm.
Yonah R31 56 H_DPSLP# 1 2
H_THERMTRIP# 1 2
Comp1,3 connect with Zo=55ohm,
make these trace length shorter than 0.5".
R165 56
H_IERR# 1 2
C Populate for Yonah A0, C
de-pop for Yonah A1
+1.05V_VCCP +1.05V_VCCP +1.05V_VCCP
1
2
1
1
2
R218 R220R221 R222
51/F 39.2/F 150 R168
51
JITP1 +1.05V_VCCP +3.3V_SUS 75/F
2
1
2
2
1
ITP_TDI 1 27
TDI VTT0
1
ITP_TMS 2 28 0_0402
TMS VTT1
2
ITP_TCK 5 26 C337 R215 H_PROCHOT# CPU_PROCHOT#
TCK VTAP CPU_PROCHOT# 28
ITP_TDO 1 2 7 150
ITP_TRST# R219 22.6/F TDO 0.1U_10V R448
3
1
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