Service Manuals, User Guides, Schematic Diagrams or docs for : Dell DELL_Vostro_1320_-_COMPAL_LA-4232P_KAL80_-_REV_1.0Sec
<< Back | HomeMost service manuals and schematics are PDF files, so You will need Adobre Acrobat Reader to view : Acrobat Download Some of the files are DjVu format. Readers and resources available here : DjVu Resources
For the compressed files, most common are zip and rar. Please, extract files with Your favorite compression software ( WinZip, WinRAR ... ) before viewing. If a document has multiple parts, You should download all, before extracting.
Good luck. Repair on Your own risk. Make sure You know what You are doing.
Image preview - the first page of the document
>> Download DELL_Vostro_1320_-_COMPAL_LA-4232P_KAL80_-_REV_1.0Sec documenatation <<
Text preview - extract from the document
A B C D E
DELL Vostro 1320
COMPAL LA-4232P - KAL80
1 1
Half Penny Bridge 13.3
2 Compal Confidential 2
Schematic Document
Cantiga + ICH9
2009 / 06 / 01 Rev:1.0(A00)
3 3
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/1/15 Deciphered Date 2008/1/15 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-4232P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401593 C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Saturday, June 06, 2009 Sheet 1 of 48
A B C D E [email protected]
A B C D E
DELL Vostro 1320 Half Penny Bridge 13.3
COMPAL LA-4232P
ZZZ1
Thermal Sensor Penryn -4MB (Socket P)
PCB
1
ADT7421ARMZ uFCPGA-478 CPU 1
CRT +CPU_CORE CK505 SM IC -72
+3VS P.4
+CRT_VCC P.16 +VCCP Clock Generator
P.4,5,6
+1.5VS CS9LPRS387BKLFT
+1.05VS_CK505
LVDS Panel Interface Fan conn
+LCDVDD +5VS P.4 H_A#(3..35) +3VS_CK505 P.15
+3VS FSB
B+ P.16 H_D#(0..63) 800/1066 MHz 1.05V
nVidia DDR2 667/800MHz 1.8V DDR2-SO-DIMM X2
NB9M-GS
Intel Cantiga MCH BANK 0, 1, 2, 3
+1.8V +0.9VS P.13,14
+3VS_DAC_CRT 1329pin BGA
+1.8VS +3VS_DAC_BG Dual Channel
+VGA_CORE +1.05VS_DPLLA
VRAM x 2 +1.1V_GFX_PCIE
+1.05VS_DPLLB
+VCCP USB conn x 4
+1.8VS +3VS +1.8V_TXLVDS P.7,8,9,10,11,12 +5VALW
P.35 P.31,32,33,34 P.29
2 2
DMI X4 C-Link FingerPrinter
+3VS P.29
Felica Conn
USB2.0 +5VS P.29
Intel ICH9-M
Azalia
+RTCVCC 676pin BGA BT Conn
+1.5VS +3VS P.29
SATA 0
+VCCP
PCI-E BUS SATA 1
+3VALW
P.17,18,19,20 Camera
+5VS +3VS P.29
10/100/1000 LAN Mini-Card-1 CardBus Controller Express Card Express Card
REALTEK (WLAN) O2MICRO OZ888 +1.5VS +3VS +1.5VS P.26
+1.8VS_CB
+1.5VS +3VS P.26
RTL8111DL +3VS
P.23 +3VS_PHY
P.30
3
+LAN_IO P.21 Mini-Card-1 3
+1.5VS +3VS P.23
TPM
1394 Media Card LPC
+3VS_CR SLB 9635
+3VS P.28
RJ45/11 CONN LPC BUS Digital Mic
P.24
LPC
Mini-Card-2 Audio CODEC
(WLAN) 92HD81 Audio Jack
+3VS
+1.5VS +5VS P.24 P.24
+3VS
P.23 ENE KB926
+3VALW
+EC_AVCC P.27
SATA HDD Connector
+5VS P.22
Touch Pad CONN. Int.KBD BIOS(System/EC)
Power On/Off CKT. +5VS +3VALW
P.28 P.28 P.27
P.28 CDROM Conn.
4
+5VS P.22 4
DC/DC Interface CKT.
+5VS P.36
Security Classification Compal Secret Data Compal Electronics, Inc.
2007/1/15 2008/1/15 Title
Power Circuit DC/DC RTC CKT. Issued Date Deciphered Date
SCHEMATIC, M/B LA-4232P
+RTCVCC P.39 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P.36~P.45 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401593 C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Saturday, June 06, 2009 Sheet 2 of 48
A B C D E
A
O MEANS ON X MEANS OFF Symbol Note :
Voltage Rails
: means Digital Ground
+5VS
+3VS : means Analog Ground
+1.5VS
power @ : means just reserve , no build
plane +0.9V
+VCCP
CONN@: connect
VGA@: discrete component
+5VALW +1.8V +CPU_CORE
UMA@: uma component
+B
TPM@: TPM compoent
+3VALW +VGA_CORE
+1.8VS
State +1.1VS
+0.9VGA
PCI EXPRESS DESTINATION SATA DESTINATION
Lane 1 NA Lane 0 HDD
S0
O O O O Lane 2 GLAN RTL8111DL Lane 1 ODD
S1
O O O O Lane 3 MINI CARD-2 WLAN Lane 4 NA
S3
O O O X Lane 4 EXPRESS CARD Lane 5 NA
S5 S4/AC
O O X X Lane 5 CARD READER OZ888
S5 S4/ Battery only
O X X X Lane 6 NA
S5 S4/AC & Battery
1
don't exist X X X X SMBUS Control Table
1
THERMAL
SERIAL SENSOR
SOURCE INVERTER BATT EEPROM (CPU) SODIMM CLK CHIP MINI CARD LCD
USB PORT# DESTINATION
SMB_EC_CK1
SMB_EC_DA1
KB926 X V V X X X X X
0 JUSBP1
SMB_EC_CK2
SMB_EC_DA2
KB926 X X X V X X X X
1 CAMERA
V V
SMB_CK_CLK1
2 JUSBP3(SINGLE)
SMB_CK_DAT1 ICH9 X X X X X X
V
LCD_CLK
3 Felica LCD_DAT Cantiga
X X X X X X X
4 Blue Tooth
ICH9-M
5 Finger Printer
I2C / SMBUS ADDRESSING
6 JMINI2-WLAN
DEVICE HEX ADDRESS
7 Express card DDR SO-DIMM 0 A0 10100000
DDR SO-DIMM 1 A4 10100100
8 JUSBP3(DUEL TOP) CLOCK GENERATOR (EXT.) D2 11010010
9 JUSBP3(DUEL BOTTOM)
10 NA
11 NA
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/03/10 Deciphered Date 2006/03/10 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-4232P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401593 C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Date: Saturday, June 06, 2009 Sheet 3 of [email protected]
48
5 4 3 2 1
+VCCP
XDP_TDI R5 1 2 54.9_0402_1%
XDP_TMS R4 1 2 54.9_0402_1%
D D
XDP_TRST# R11 1 2 54.9_0402_1%
XDP_TCK R35 1 2 54.9_0402_1%
CONN@ This shall place near CPU
7 H_A#[3..16]
JCPU1A
H_A#3 J4 H1 H_ADS#
A[3]# ADS# H_ADS# 7
ADDR GROUP_0
H_A#4 L5 E2 H_BNR#
A[4]# BNR# H_BNR# 7
H_A#5 L4 G5 H_BPRI#
A[5]# BPRI# H_BPRI# 7
H_A#6 K5
H_A#7 A[6]# H_DEFER#
M3 A[7]# DEFER# H5 H_DEFER# 7
H_A#8 N2 F21 H_DRDY#
A[8]# DRDY# H_DRDY# 7
H_A#9 J1 E1 H_DBSY#
A[9]# DBSY# H_DBSY# 7
H_A#10 N3
H_A#11 A[10]# H_BR0#
P5 A[11]# BR0# F1 H_BR0# 7
H_A#12 P2 A[12]#
CONTROL
H_A#13 L2 D20 H_IERR#
H_A#14 A[13]# IERR# H_INIT#
P4 A[14]# INIT# B3 H_INIT# 18
H_A#15 P1
H_A#16 A[15]# H_LOCK#
R1 A[16]# LOCK# H4 H_LOCK# 7
H_ADSTB#0 M1
7 H_ADSTB#0 ADSTB[0]#
C1 H_RESET#
RESET# H_RESET# 7
H_REQ#0 K3 F3 H_RS#0
7 H_REQ#0 REQ[0]# RS[0]# H_RS#0 7
H_REQ#1 H2 F4 H_RS#1
7 H_REQ#1 REQ[1]# RS[1]# H_RS#1 7
H_REQ#2 K2 G3 H_RS#2
7 H_REQ#2 REQ[2]# RS[2]# H_RS#2 7
H_REQ#3 J3 G2 H_TRDY#
7 H_REQ#3 REQ[3]# TRDY# H_TRDY# 7
H_REQ#4 L1
7 H_REQ#4 REQ[4]#
G6 H_HIT#
7 H_A#[17..35] HIT# H_HIT# 7
H_A#17 Y2 E4 H_HITM#
C A[17]# HITM# H_HITM# 7 C
H_A#18 U5
H_A#19 A[18]#
R3 A[19]# BPM[0]# AD4
ADDR GROUP_1
H_A#20 W6 AD3
H_A#21 A[20]# BPM[1]# +3VS
U4 AD1
H_A#22 Y5
A[21]#
A[22]#
BPM[2]#
BPM[3]# AC4 Thermal Sensor EMC1402-1-ACZL-TR
XDP/ITP SIGNALS
H_A#23 U1 AC2
H_A#24 A[23]# PRDY#
R4 A[24]# PREQ# AC1
0.1U_0402_16V
H_A#25 T5 AC5 XDP_TCK 1
H_A#26 A[25]# TCK XDP_TDI
T3 A[26]# TDI AA6
H_A#27 W2 AB3 XDP_TDO C13
A[27]# TDO T84
H_A#28 W5 AB5 XDP_TMS
H_A#29 A[28]# TMS XDP_TRST# 2
Y4 A[29]# TRST# AB6
H_A#30 U2 C20 XDP_DBRESET# U2
A[30]# DBR# XDP_DBRESET# 19
H_A#31 V4 1 8 EC_SMB_CK2 EC_SMB_CK2 16,27,31
H_A#32 A[31]# VDD SCLK
W3 A[32]#
H_A#33 AA4 THERMAL H_THERMDA 2 7 EC_SMB_DA2
A[33]# D+ SDATA EC_SMB_DA2 16,27,31
H_A#34 AB2 H_PROCHOT# R146 2 1 68_0402_1% +VCCP C5
H_A#35 A[34]# H_THERMDC
AA3 A[35]# PROCHOT# D21 1 2 3 D- ALERT# 6
H_ADSTB#1 V1 A24 H_THERMDA_R R57 1 2 100_0402_5% H_THERMDA 2200P_0402_50V7K
7 H_ADSTB#1 ADSTB[1]# THERMDA
B25 H_THERMDC_R R53 1 2 100_0402_5% H_THERMDC L_THERM# 4 5
H_A20M# THERMDC THERM# GND
18 H_A20M# A6 A20M#
ICH
H_FERR# A5 C7 H_THERMTRIP# R16
18 H_FERR# FERR# THERMTRIP# H_THERMTRIP# 7,18
H_IGNNE# C4 +3VS 1 2 EMC1402-2-ACZL-TR MSOP 8P
18 H_IGNNE# IGNNE#
H_THERMDA, H_THERMDC routing together, 10K_0402_5%
18 H_STPCLK#
H_STPCLK# D5 STPCLK#
Address:100_11000
18 H_INTR
H_INTR C6 H CLK Trace width / Spacing = 10 / 10 mil
H_NMI LINT0 CLK_CPU_BCLK
18 H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK 15
H_SMI# A3 A21 CLK_CPU_BCLK#
18 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 15
C76
M4
N5
RSVD[01] FAN Control circuit 10U_1206_16V4Z~N
2 1
RSVD[02] +5VS
T2 RSVD[03]
B C88 B
V3 RSVD[04]
RESERVED
B2 1000P_0402_50V7K~N 1 2
RSVD[05] C77 10U_1206_16V4Z~N
D2 RSVD[06] 2 1
D22 RSVD[07]
D3 U3
RSVD[08]
F6 RSVD[09] 1 VEN GND 8
2 VIN GND 7
FAN1_POWER 3 6
EN_DFAN1 VO GND
27 EN_DFAN1 4 VSET GND 5
Penryn +3VS RT9027BPS SO 8P
1
JFAN1
R61
40mil
1 1
+VCCP 10K_0402_5% 2 2
3 3
2
27 FAN_SPEED1 4 GND
1
@
FAN_SPEED1
2 5 GND
R17
56_0402_5% C94 ACES_85205-03001
0.01U_0402_16V7K conn@
1
2 2
FAN1
B
B
3
2
E
E
H_PROCHOT# 3 1 OCP# D4
OCP# 19
C
@ Q2 PJSOT24C_SOT23-3
MMBT3904_SOT23 @
1
+VCCP
A A
2
R18
56_0402_5%
1
H_IERR# Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/02/13 Deciphered Date 2006/03/10 Title
◦ Jabse Service Manual Search 2024 ◦ Jabse Pravopis ◦ onTap.bg ◦ Other service manual resources online : Fixya ◦ eServiceinfo