Service Manuals, User Guides, Schematic Diagrams or docs for : Dell Dell Inspiron 5150 LA-1682
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A B C D E
COMPAL CONFIDENTIAL
1
MODEL NAME : Abacus-MT 1
COMPAL P/N :
PCB NO : LA-1682
Revision : 0.2
2 2
Abacus-MT Schematics Document
uFCBGA/uFCPGA NorthWood MT
2003-02-25
3 3
4 4
Dell-Compal Confidential
Compal Electronics, Inc.
Title
Cover Sheet
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus-MT LA-1682
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Tuesday, February 25, 2003 Sheet 1 of 44
A B C D E
A B C D E
Compal confidential Block Diagram
Model : Abacus-MT
NorthWood-MT
Prescott-MT CPU ITP Port Thermal Sensor
1 Fan Control 1 CPU Bypass uFCPGA CPU ADM1032 Clock Generator 1
+12V page 7 +1.2VP and VID ICS950810
page 7 +CPU_CORE 478pin page 5,6 page 8 +5VS page 6 +3VS page 16
HA#(3..31) HD#(0..63)
Fan Control 2 System Bus
+5VS page 7
400/533 MHz
Mainstream PIRQE# INTEL Memory DDR-DIMM X2
BANK 0, 1, 2, 3
LVDS Connector
on VGA Board Montara-GT BUS(DDR) +2.5V 200/266/333MHz
AGP Conn AGP4X(1.5V) +1.5VS
732 BGA +2.5V
page 17 +2.5V +1.25VS page 13,14,15
TV OUT page 19
+1.25VS
CRT Signal +CPU_CORE page 9,10,11,12
Internal LVDS
CRT Connector Value
page 19
2 2
LVDS Connector HUB LINK 1.5
on M/B Board page 18
+1.5VS
66MHz
+3VS
+3VS 33MHz PCI BUS INTEL 48MHz USB 2.0/1.1 2X USB Ports
+3VALW +3VALW
+5VALW page 34
IDSEL:AD18 IDSEL:AD17 IDSEL:AD20 +1.5VS
(PIRQC,D#,GNT#1,REQ#1) (PIRQB#,GNT#0,REQ#0) (PIRQA#,GNT#2,REQ#2) ICH4-M
+1.5VALW 24.576MHz AC-LINK
+CPU_CORE 421 BGA
Debug Minipci CONN LAN CardBus VCC5REF
ATA100
WIRELESS BCM-4401L & 1394 VCC5REFSUS page 20,21,22
+5VS +3V PCI4510 M DC
+3VS page 28
page 35 +5VS +3V page 24 +3V page 25,26,27 +3VALW
+3V page 31
+3VS
LPC BUS 33MHz Cable
Card Bus IDE HDD IDE AC97 Codec
3
RJ45 1394 CD-ROM
3
page 24 SLOT CONN +5VS +5VS STAC9750 RJ11
page 26 page 25
NS PC87591L +5VDDA
page 23 page 23 page 29 Cable
Embedded
Controller SIDE IRQ15 PIDE IRQ14
+3VS page 32
+3VALW
Power On/Off DC/DC Interface AMP & INT. HeadPhone &
Ext. IO Speaker MIC Jack
Reset & RTC Suspend Touch Pad page 33
+5VALW page 30 +5VDDA page 30
page 34 page 35 LID Switch
Int.KBD
+5VS page 31 page 33
Power Circuit
4 DC/DC LED Indicator BIOS 4
page Connector EC DEBUG +3VALW page 33
36,37,38,39,40,41 +3VALW page 32
page 34
Dell-Compal Confidential
Compal Electronics, Inc.
Title
Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus-MT LA-1682
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Tuesday, February 25, 2003 Sheet 2 of 44
A B C D E
5 4 3 2 1
Power Managment table
ST2, ST1, ST0 Trip (C0 bit 2:0) +3VS
MHz
+5VS
FSB MEMORY GFX-LOW GFX-HIGH Cfg# Signal +1.5VALW PCB Rev Data
+1.5VS
000 400 266 133 200 0 +3VALW
+1.2VP Bringup-Build 0.1
D 001 400 200 100 200 1 +5VALW +3V SST-Build D
+CPU_CORE
010 400 200 100 133 2 State +12VALW +2.5V
+1.25VS PT-Build
011 400 266 133 266 3 +12V_FAN
100 533 266 133 200 4
ST-Build
101 533 266 133 266 5 S0 ON ON ON
110 533 333 166 266 6
QT-Build
111 400 333 166 250 7 S1 ON ON ON
S3 ON ON OFF
S5 S4/AC ON OFF OFF
S5 S4/AC don't exist OFF OFF OFF
SCHEMATICS VERSION LIST
Ceramic Capacitor Spec Guide:
VERSION ISSUE DATE REMARK
C C
Temperature Characteristics:
Symbol 0 1 2 3 4 5 6 7 Item Function Note
0.0A 12/30/2002 First Release
CODE Z5U Z5V Z5P Y5U Y5V Y5P X5R X7R
1@ Value no TV, 1394,
2@ Mainstream
@ DEPOP
8 9 A B C D E F G
NP0 C0G BJ CH CJ CK SH SJ
H I J
UJ UK SL
Tolerance:
Symbol A B C D F G H J
CODE +-0.05PF +-0.1PF +-0.25PF +-0.5PF +-1PF +-2% +-3% +-5%
B B
K M N P Q V X Z
+-10% +-20% +-30% +100,-0% +30,-10% +20,-10% +40,-20% +80,-20%
SMBUS Control Table
THERMAL THERMAL VGA Thermal
SOURCE INVERTER BATT SERIAL SENSOR SENSOR SODIMM CLK CHIP MINI PCI LCD
EEPROM (CPU) (LM75) ADM1032
SMB_EC_CK1 PC87591L
SMB_EC_DA1
SMB_EC_CK2 PC87591L
SMB_EC_DA2
SMB_CLK
ICH4-M
SMB_CDATA
A A
LCD_DDCCLK
M-GT Dell-Compal Confidential
LCD_DDCDATA
Compal Electronics, Inc.
Title
Note & Revision
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus-MT LA-1682
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Tuesday, February 25, 2003 Sheet 3 of 44
5 4 3 2 1
5 4 3 2 1
PU22
U66
FAN5234 +1.5VALW SUSP# +1.5VS page 35
page 39
+5VALW
D D
U31
+5VS
+5VALW SUSP# page 35
PU8
SHDN# Q6
MAX1632 SIDEPWR +5VSHDD
page 23
page 38
U26
SUSP# +5VDDA
page 29
U70
+3VALW SYSON +3V
page 35
VR_ON
C
+12VALW U20 C
page 36 PU21 SUSP# +3VS
page 35 PU27
AC
LM3485 +12VFANP CM2843 +1.2VP
B+ page 38 page 41
ENLL PU23
Mobile
Battery JP8
page 36
ISL6247 +CPU_CORE
+5VS
page 41
B
+3VS B
SUSP#
PU20 +1.5VS VGA Conn.
ISL6225 +1.25VS 180 pin
+2.5V
page 40 +2.5V +3V
SYSON
+5VALW
+12VALW
B+ page 17
A A
Dell-Compal Confidential
Compal Electronics, Inc.
Title
POWER DIAGRAM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Abacus-MT LA-1682
Date: Tuesday, February 25, 2003 Sheet 4 of 44
5 4 3 2 1
5 4 3 2 1
+CPU_CORE
D D
AC10
AC12
AC14
AC16
AC18
AD11
AD13
AD15
AD17
AD19
AA10
AA12
AA14
AA16
AA18
AB11
AB13
AB15
AB17
AB19
AE10
AE12
AE14
AE16
AE18
AE20
AF11
AF13
AF15
AF17
AF19
AF21
AC8
AD7
AD9
AA8
AB7
AB9
AE6
AE8
C10
C12
C14
C16
C18
C20
D11
D13
D15
D17
D19
AF2
AF5
AF7
AF9
A10
A12
A14
A16
A18
A20
B11
B13
B15
B17
B19
E10
C8
D7
D9
A8
B7
B9
JCPU1A
VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
HA#[3..31] HD#[0..63]
<9> HA#[3..31] HD#[0..63] <9>
HA#3 K2 B21 HD#0
HA#4 A#3 D#0 HD#1
K4 A#4 D#1 B22
HA#5 L6 A23 HD#2
HA#6 A#5 D#2 HD#3
K1 A25
HA#7 L3
A#6
A#7
POWER D#3
D#4 C21 HD#4
HA#8 M6 D22 HD#5
HA#9 A#8 D#5 HD#6
L2 A#9 D#6 B24
HA#10 M3 C23 HD#7
HA#11 A#10 D#7 HD#8
M4 A#11 D#8 C24
HA#12 N1 B25 HD#9
HA#13 A#12 D#9 HD#10
M1 A#13 D#10 G22
HA#14 N2 H21 HD#11
HA#15 A#14 D#11 HD#12
N4 A#15 D#12 C26
HA#16 N5 D23 HD#13
HA#17 A#16 D#13 HD#14
T1 A#17 D#14 J21
HA#18 R2 D25 HD#15
HA#19 A#18 D#15 HD#16
P3 A#19 D#16 H22
HA#20 P4 E24 HD#17
HA#21 R3
A#20
A#21
HOST D#17
D#18 G23 HD#18
HA#22 T2 F23 HD#19
C
HA#23
HA#24
U1
A#22
A#23
ADDR D#19
D#20 F24 HD#20
HD#21 C
P6 A#24 D#21 E25
HA#25 U3 F26 HD#22
HA#26 A#25 D#22 HD#23
T4 A#26 D#23 D26
HA#27 V2 L21 HD#24
HA#28 A#27 D#24 HD#25
R6 A#28 D#25 G26
HA#29 W1 H24 HD#26
HA#30 A#29 D#26 HD#27
T5 A#30 D#27 M21
HA#31 U4 L22 HD#28
V3
W2
Y1
A#31
A#32
A#33
Northwood-MT HOST
D#28
D#29
D#30
J24
K23
H25
HD#29
HD#30
HD#31
A#34 D#31 HD#32
<9> H_REQ#[0..4]
H_REQ#[0..4]
H_REQ#0
AB1 A#35
Prescott-MT ADDR D#32
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