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UG-9664HSWAG01
96 X 64
Application note
Evaluation Kit User Guide
Writer: Wabber. Huang
Email: [email protected]
Version: Preliminary
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REVISION HISTORY
Date Page Contents Version
2006/7/17 Preliminary Preliminary 0.0
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VDD 1
JP2
VDDIO_IN
VDDIO 2
VDDIO_OUT
GND 3
C1
GND
4.7uf
C2
VDDIO
10uf /25v
EVK Schematic
VCOMH
1 2
C7
GND GND
4.7uf
3 4
VCC 5 GND GND 6 IREF
VDD 7 HV GND 8
9 LV GND 10
R1
11 NC NC 12
910K
13 NC NC 14
15 NC 16
VDD
J2
17 18 1
19 20 VDD
21 22 2
23 24 LV
25 26 C3 1
27 28 RES HV 2 NC
R/W 29 RES 30 E/RD 4.7uf GND 3 VCC
CS 31 WR RD 32 D/C LV LV 4 VSS
D7 33 CS DC 34 D6 VDDIO 5 VDD
D5 35 D7 D6 36 D4 BS1 6 VDDIO
C4
D3 37 D5 D4 38 D2 BS2 7 BS1
D3 D2 BS2
10uf /25v
D1 39 40 D0 CS 8
D1 D0 RES 9 CS
D/C 10 RES
U1 UG-9664HSWAG01
R/W 11 D/C
JP1
VCC E/RD WR
J3
1 12
VCC D0 13 RD
2 D1 14 D0
HV D2 15 D1
EVK_CON40
D3 16 D2
C5
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D4 D3
4.7uf
17
D5 18 D4
HV D6 19 D5
D7 20 D6
IREF 21 D7
C6
VCOMH 22 IREF
HV 23 VCOMH
VCC
10uf /25v
GND 24
25 VSS
NC
BS1
GND
3VDDIO
2
1
J4
BS1
GND
VDDIO
3
GND
VDDIO
BS2
6
5
4
VDDIO
BS2
GND
Symbol define
VCC : Power supply for panel driving voltage.
VSSThis is ground pin.
VDDPower supply for core logic operation.
VDDIOPower supply for interface logic level.
BS0~BS2MUC bus interface selection pin(BS0 pulled LOW in internal).
CSThis pin is chip select input(active LOW).
RESThis pin is reset signal input(active LOW).
D/CThis is DATA/COMMAND control pin. When it is Pulled HIGH, the data at D[0~7] is
treated as data. When it is pulled LOW, the data at D[0~7] will be transferred to
the command register.
In I2C mode, this pin acts as SA0 for slave address select.
R/WThis is read/write control input pin connecting to the MCU interface.
When interface to a 6800-series microprocessor , Read mode will be carried out
when this pin is pulled HIGH and write mode when low .
When interface to an 8080-microprocessor , this pin when be the data Write
input.
When serial interface is selected, this pin must be connected to Vss.
E/RDWhen interface to a 6800-series microprocessor , this pin will be used as the
Enable(E) signal.
When interface to an 8080-microprocessor , this pin receives the
Read(RD#)signal.
D0~D7These are 8-bit bi-directional data bus to be connected to the microprocessor's
data bus.
When serial interface mode is selected, D0(SCLK) will be the serial clock
input,D1(SDIN) will be the serial data input,D2 should be left opened.
When I2C mode is selected,D1(SDAin) AND D2(SDAout) should be tied
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together,D0(SCL) is the I2Cclock input
IREFThis is segment output current reference pin.
VCOMHThis pin for COM signal deselected level voltage.
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6800 INTERFACES DESCRIPTIONS & TIMMING CHARACTERISTICS
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8080 INTERFACES DESCRIPTIONS & TIMMING CHARACTERISTICS
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SPI INTERFACES DESCRIPTIONS & TIMMING CHARACTERISTICS
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I2C INTERFACES DESCRIPTIONS & TIMMING CHARACTERISTICS
(VDD - VSS = 2.4 to 3.5,TA = 25C)
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Figure1 EVK PCB and OLED Module
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Figure2 The combination of the module and EVK
The SSD1305Z is COG type package, that the connect pads are on the top of the module
Push here to lock module
connector. When finished assembled the module and EVK, then push the locking pad to
lock the module. See the Figure 1 and Figure2.
User can use leading wire to connect EVK with customer's system. The example shows
as Figure 3
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Note 3
Note 1
Note 2
Figure3 EVK with test platform
Note 1It is the external most positive voltage supply. In this sample is connected to
power supply.
Note 2The leading wire has 13 pins totally in this case.
(D0-D7E/RDR/WD/CRESCS)
Note 3Select Mode(80806800SPII2C)
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How to use SSD1305Z module
Power down and Power up Sequence
To protect OLED panel and extend the panel life time, the driver IC power
up/down routine should include a delay period between high voltage and low
voltage power sources during turn on/off. Such that panel has enough time to
charge up or discharge before/after operation.
Power up Sequence:
VDD on
1. Power up VDD
VCC on
2. Send Display off command
Display on
3. Driver IC Initial Setting
4. Clear Screen VCC
5. Power up VDDH
VDD
6. Delay 100ms
VSS/Ground
(when VDD is stable)
7. Send Display on command
Power down Sequence:
Display off
1. Send Display off command
VCC off
2. Power down VDDH
VDD off
3. Delay 100ms
(when VDDH is reach 0 and VCC
panel is completely
VDD
discharges)
VSS/Ground
4. Power down VDD
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Reset
Driver IC
RES=0
Delay 100ms
RES=1
Driver IC
Initial Code
Suggest all register
set again
Display on
Clear RAM
Start
Display
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RD recommend Initial Code:
void initial()
{
write_command(0x02);//set low column address
write_command(0x12);//set high column address
write_command(0x40);//(display start set)
write_command(0x2e);//(stop horzontal scroll)
write_command(0x81);//(set contrast control register)
write_command(0x32);
write_command(0x82);//(brightness for color banks)
write_command(0x80);//(display on)
write_command(0xa1);//(set segment re-map)
write_command(0xa6);//(set normal/inverse display)
write_command(0xa8);//(set multiplex ratio)
write_command(0x3F);
write_command(0xd3);//(set display offset)
write_command(0x40);
write_command(0xad);//(set dc-dc on/off)
write_command(0x8E);//
write_command(0xc8);//(set com output scan direction)
write_command(0xd5);//(set display clock divide ratio/oscillator/frequency)
write_command(0xf0);//
write_command(0xd8);//(set area color mode on/off & low power display mode )
write_command(0x05);//
write_command(0xd9);//(set pre-charge period)
write_command(0xF1);
write_command(0xda);//(set com pins hardware configuration)
write_command(0x12);
write_command(0xdb);//(set vcom deselect level)
write_command(0x34);
write_command(0x91);//(set look up table for area color)
write_command(0x3f);
write_command(0x3f);
write_command(0x3f);
write_command(0x3f);
write_command(0xaf);//(display on)
write_command(0xa4);//(display on)
}
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WRITE DATA & COMMAND SUB FUNCTION
void write_command(unsigned char aa)
{
IOCLR = 0x000000ff;
IOSET = RD_IN;//RD=1
IOCLR = DC_IN;//RS=0
IOCLR = CS_IN;//CS=0
IOCLR = WR_IN;//W_R=0
IOSET = aa;//--------input command
IOSET = WR_IN;//W=1
IOSET = CS_IN;//CS=1
IOCLR = RD_IN;
}
void write_data(unsigned char bb)
{
IOCLR = 0x000000ff;
IOSET = RD_IN;//RD=1
IOSET = DC_IN;//RS=1
IOCLR = CS_IN;//CS=0
IOCLR = WR_IN;//W_R=0
IOSET = bb; //--------input data
IOSET = WR_IN;//W_R=1
IOSET = CS_IN;//CS_1=1
}
NoteRD recommend Initial code and sub function for 8080 series CPU
interface.
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