Service Manuals, User Guides, Schematic Diagrams or docs for : Fujitsu Amilo M1451G_Uniwill_M50EA0_RevB
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5 4 3 2 1
Revision History
Model : M50EA0 A 11/2004 ORIGINAL RELEASE
D D
Mobile Dothan with INTEL 915PM / ICH6-M Chipset
PG01 INDEX PG21 LANRTL8100CL
PG02 SYSTEM BLOCK DIAGRAM PG22 1394 TSB43AB22A
PG03 POWER DIAGRAM & SEQUENCE PG23 MINIPCI (Wirless) / CRT & AUDIO CONN
PG04 GPIO & POWER CONSUMPTION PG24 EC IT8510E / BIOS / Keyboard & TP CONN
PG05 CPU Banias/Dothan-1/2 PG25 CPU_CORE
C C
PG06 CPU Banias/Dothan-2/2 PG26 1.05V / 1.5V / 1.8V / 2.5V / 0.9V
PG07 CLOCK GEN ICS954127 PG27 +3.3V / +5V / +12V
PG08 NB_Alviso Host-1/5 PG28 BATT IN / Charger
PG09 NB DDRCLK_VGA_PCIEXPR-2/5 PG29 VCC SW / +1.05VS / +1.5VS
PG10 NB DDR_MEM SYSTEM-3/5 PG30 VGA MXM CON
PG11 NB POWER-4/5 PG31 Appendix A. Ver. History
PG12 NB VSS_NCTF-5/5
PG13 DDR2 CHANNELA,B SODIMM0,1
PG14 DDR2 Terminate / Smart Power
PG15 SB ICH-6M-1/3
PG16 SB ICH-6M-2/3
PG17 SB ICH-6M-3/3
B B
PG18 DC IN / NEW CARD / FAN / MIC / BLUETOOH
PG19 LCD / INVERTER / USB / TV / IO
PG20 SATA HDD / CD-ROM
A A
UNIWILL COMPUTER CORP.
Title
M50EA0
Size Document Number Rev
Custom INDEX B
3145
Date: Monday, June 06, 2005 Sheet 1 of 31
5 4 3 2 1
5 4 3 2 1
M50EA0
BLOCK DIAGRAM CPU
Dothan THERMAL
Socket 478 EC
ADM1032
D D
HOST BUS
400/533MHZ DDR2 RAM BUS
North Bridge PCIE CRT
INTEL ATI M22 LCD
SODIMM0 915PM
SODIMM1 S-Video TV
+1.8VS
+1.8VS
+0.9V terminal
+0.9V terminal
DMI
AZALIA
RTC
Daugher BD-2 PCI BUS South Bridge
AUDIO CODEC INTEL
C
MDC ICH6-M C
ALC880
AMPLIFIER SATA
MIC RJ11 PCIE
TPA6011A4 NEW CARD
USB
Daugher BD-1
LINE OUT * 1
INTERNAL MIC * 1 SATA HDD USB*8
SPK SPDIF OUT * 1 LAN
LINE IN * 1 RTL8100CL
MINI PCI PATA USB*4 CARD READER
( Wireless ) CRYSTAL GL817E
RJ45 25M HZ Daugher BD-2
DVD LPC BUS
B ROM B
+5V
CRYSTAL PRIMARY
14.318MHz IEEE-1394A MASTER
TSB43AB22A
Clock Gen
ICS CRYSTAL CRYSTAL K/B CONTROLLER
24.576M Hz 32.768K Hz
ICS954127 ITE 8510
X-BUS
INT K/B T/P FAN CHARGER BATTERY
FLASH ROM
A A
UNIWILL COMPUTER CORP.
Title
M50EA0
Size Document Number Rev
B
3145 SYSTEM BLOCK DIAGRAM
Date: Monday, June 06, 2005 Sheet 2 of 31
5 4 3 2 1
5 4 3 2 1
POWER BLOCK DIAGRAM VIN +1.8VS/4.5A
ISL6224
RSS090N03 RT9173B +0.9VS
D D
VID0
VID1 VIN
VID2 +1.8V
VID3 SC451 RSS090N03
VID4 SI4362 CPU_CORE AO4422
VID5
VIN +5VA/ 9A
RSS090N03 AO4422 +5VS
POWER Sequence
C SI4835 +5V C
+3VA,+5VA,+12VA
SC1404
PWRSW
+12VA
. +3.3VS_ON
SI2301 +12VS +5VS,+12VS
+3.3VS
. +1.5VS_ON
VIN +3.3VA +3.3VS +1.5VS 1ms
. +1.05VS_ON
+2.5VS
RSS090N03 AO4422 RT9173B . +1.8V_DDR_ON
+1.8VS 1ms
SI4835 +3.3V/ 0.9A +1.05VS 1ms
50ms
B
. RSMRST# 10ms
B
. PWRBTN# 1s
. +5V_ON
5.8ms
+5V
VIN +1.5VS/4.5A +1.5V 40ms
+3.3V
+2.5V
ISL6225
RSS090N03 AO4422 . +1.8V_ON
+1.8V
+1.05V
+1.5V
VIN +1.05VS/4.5A
. Vcore_ON 7ms
Vcore
RSS090N03 AO4422 +1.05V/1.8A . PWROK/VR_PWRGD 110ms
A H_PWRGD A
PCIRST#/PLTRST#
CPURST#
. EC Control Pin UNIWILL COMPUTER CORP.
Title
M50EA0
Size Document Number Rev
C POWER DIAGRAM B
3145
Date: Monday, June 06, 2005 Sheet 3 of 31
5 4 3 2 1
5 4 3 2 1
ICH6-M ITE8510E ITE8510E CPU ITE8510E
GPIO GPIO GPIO CPU CORE(V) ICC(mA) W TEMP()
VCC ICC(mA) W TEMP()
GPI6 BM_BUSY# GPCF0 TURBO#/PHOTO GPC0 PWROK 2.0G 1.525 35.7 54.3 69
+3.3V 300 1 70
GP7 GPCF1 SILENT#/TV GPC1 BAT2_SMBCLK 2.2G 1.525 37.5 57.1 70
GP8 EC_EXTSMI# GPCF2 BAT_SEL GPC2 BAT2_SMBDAT 2.26G 1.525 38.1 58.0 70
GPI11 SMB_ALERT# GPCF3 BAT_THROT_EN GPC3 2.4G 1.525 39.3 59.8 71
D
GPI12 GPCF4 TP_CLK GPC4 2.5G 1.525 40 61.0 72 D
GPI13 GPCF5 TP_DATA GPC5 A/W_LED3# 2.53G 1.525 40.4 61.5 72 CLOCK GENERATOR
GPO18 PM_STPPCI_ICH# GPCF6 MAIL#/DVD GPC6 CHG_ON 2.6G 1.525 41.05 62.6 72
VCC ICC(mA) W TEMP()
GPO19 GPCF7 BROWSER#/MP3 GPC7 SILENT_LED# 2.66G 1.525 43.35 66.1 74
+3.3V 180 0.594 70
GPO20 PM_STPCPU_ICH# GPI0 SCROLL# ANOTE 2.8G 1.525 44.86 68.4 75
GPO21 TPM_EN GPI1 CAPS# CATHODE 3.06G 1.525 55.9 85.2 81
GPO23 GPI2 NUM#
GPIO24 GPI3 CHGLED_ON#
GPIO25 GPI4 A/W_LED1# ADM1032
GPIO26 SATA0_GP GPI5 SUSLED_ON#
VCC ICC W TEMP()
GPIO27 GPI6 A/W_LED2#
MCHE +3.3V 170uA 0.56mW 150
GPIO28 GPH0 +1.8V_DDR_ON
GPIO29 PNLSW1 GPH1 +1.8V_ON VCC ICC(mA) W TEMP()
GPIO30 PNLSW2 GPH2 +1.05VS_ON +3.3V 108.19 0.357
GPIO31 PNLSW0 GPH3 +3.3VS_ON +3.3VA 501.3 1.254
GPIO32 PM_CLKRUN# GPH4 +5V_ON +2.5V 1390 2.502
70
C
GPIO33 GPH5 SET_V +1.5V 33.4 0.084 C
GPIO34 GPH6 +1.5VS_ON +VCCP 10 0.018
+VCC_GMCH_CORE
GPH7 VCORE_ON 266 0.452
GPG4
GPG5 LCDSW
GPG6 MUTE#
GPG7 EXTTS#0
GPB0 CELERON_VO_DET
GPB1 TURBO_LED#
GPB2 PM_RSMRST# SB INT_PIRQ List
GPB3 BAT_SMBCLK INT_PIRQA CARD BUS ICH6-M
GPB4 BAT_SMBDAT INT_PIRQB Mini PCI VCC ICC(mA) W TEMP()
GPB5 H_A20GATE INT_PIRQC 1394 +3.3V 96 0.315
GPB6 H_RCIN# INT_PIRQD LAN +3.3VA 275 0.909
GPB7 RFLED_ON# INT_PIRQE CARD BUS(op) +1.5V 487 0.876
70
GPE0 INT_PIRQF Mini PCI +1.5VA 27 0.049
B
GPE1 CPU_BSEL0 INT_PIRQG NC +3.3VA_RTC 0.003 0.00001 B
GPE2 TP_BTU INT_PIRQH NC
GPE3 TP_BTD
GPE4 PWRSW
GPE5 LID#
GPE6 RF_OFF
GPE7 PM_SLP_S3#
GPD0 ADAP_IN
GPD1 AW#/CD
GPD2 PCI_RST#/PLT_RST#
GPD3 EC_EXTSMI#
GPD4
GPD5
GPD6 CLKREQ#
GPD7 EC_PREST#
GPA0 BTL_BEEP
A
GPA1 EC_VID1 A
GPA2 EC_VID2
GPA3 EC_VID3
GPA4 EC_VID4
GPA5 SMP1_EN# UNIWILL COMPUTER CORP.
Title
GPA6 SMP2_EN#
GPA7 PWRBTN# M50EA0
Size Document Number Rev
Custom GPIO & POWER CONSU B
3145
Date: Monday, June 06, 2005 Sheet 4 of 31
5 4 3 2 1
5 4 3 2 1
U37A +1.05V U37B
8 H_A#[31:3] 8 H_D#[63:0] H_D#[63:0] 8
H_A#3 P4 N2 H_D#0 A19 Y26 H_D#32
A3# ADS# H_ADS# 8 D0# D32#
H_A#4 U4 L1 H_D#1 A25 AA24 H_D#33
A4# BNR# H_BNR# 8 D1# D33#
H_A#5 V3 J3 R308 H_D#2 A22 T25 H_D#34
A5# BPRI# H_BPRI# 8 D2# D34#
H_A#6 R3 H_D#3 B21 U23 H_D#35
A6# 56 D3# D35#
ADDR GROUP 0
H_A#7 V2 L4 H_D#4 A24 V23 H_D#36
A7# DEFER# H_DEFER# 8 D4# D36#
H_A#8 W1 H2 H_D#5 B26 R24 H_D#37
A8# DRDY# H_DRDY# 8 D5# D37#
H_A#9 T4 M2 Place testpoint on H_D#6 A21 R26 H_D#38
A9# DBSY# H_DBSY# 8 D6# D38#
DATA GRP0
CONTROL
H_A#10 W2 H_D#7 B20 R23 H_D#39
DATA GRP2
D
H_A#11 A10# H_D#8 D7# D39# H_D#40 D
Y4 A11# BR0# N4 H_BREQ#0 8 H_IERR# with a GND C20 D8# D40# AA23
H_A#12 Y1 H_D#9 B24 U26 H_D#41
H_A#13 A12# H_IERR# H_D#10 D9# D41# H_D#42
U1 A13# IERR# A4 0.1" away D24 D10# D42# V24
H_A#14 AA3 B5 H_D#11 E24 U25 H_D#43
A14# INIT# H_INIT# 15 D11# D43#
H_A#15 Y3 H_D#12 C26 V26 H_D#44
H_A#16 A15# H_RS#[2:0] H_D#13 D12# D44# H_D#45
AA2 A16# LOCK# J2 H_LOCK# 8 H_RS#[2:0] 8 B23 D13# D45# Y23
U3 H_D#14 E23 AA26 H_D#46
8 H_ADSTB#0 ADSTB#0 D14# D46#
8 H_REQ#[4:0] RESET# B11 H_CPURST# H_CPURST# 8
H_D#15 C25 D15# D47# Y25 H_D#47
H1 H_RS#0 C23 W25
RS0# H_RS#1 8 H_DSTBN#0 DSTBN0# DSTBN2# H_DSTBN#2 8
H_REQ#0 R2 K1 C22 W24
REQ0# RS1# H_RS#2 8 H_DSTBP#0 DSTBP0# DSTBP2# H_DSTBP#2 8
H_REQ#1 P3 L2 D25 T24
REQ1# RS2# +1.05V 8 H_DINV#0 DINV0# DINV2# H_DINV#2 8
H_REQ#2 T2 M3
REQ2# TRDY# H_TRDY# 8 8 H_D#[63:0] H_D#[63:0] 8
H_REQ#3 P1
H_REQ#4 REQ3# H_D#16 H_D#48
8 H_A#[31:3] T1 REQ4# HIT# K3 H_HIT# 8 H23 D16# D48# AB25
K4 H_D#17 G25 AC23 H_D#49
H_A#17 HITM# H_HITM# 8 D17# D49#
AF4 H_D#18 L23 AB24 H_D#50
H_A#18 A17# Z0501 H_D#19 D18# D50# H_D#51
AC4 A18# BPM#0 C8 TP1 M26 D19# D51# AC20 Layout note:
H_A#19 AC7 B8 Z0502 R310 H_D#20 H24 AC22 H_D#52
A19# ADDR GROUP 1 BPM#1 TP2 D20# D52#
H_A#20 AC3 A9 Z0503 H_D#21 F25 AC25 H_D#53 Comp1 ,3 connect with Zo = 55
A20# BPM#2 TP3 D21# D53#
DATA GRP1
Z0504
ITP SIGNALS
H_A#21 AD3 C9 56_OP H_D#22 G24 AD23 H_D#54
DATA GRP3
A21# BPM#3 TP4 D22# D54# Ohm,make
H_A#22 AE4 A10 Z0505 H_D#23 J23 AE22 H_D#55
A22# PRDY# TP5 D23# D55#
H_A#23 AD2 B10 Z0506 H_D#24 M23 AF23 H_D#56 Comp0 ,2 connect with Zo = 27.4
H_A#24 A23# PREQ# TCK H_D#25 D24# D56# H_D#57
AB4 A24# TCK A13 TP6 J25 D25# D57# AD24 Ohm,make
H_A#25 AC6 C12 TDI H_D#26 L26 AF20 H_D#58
A25# TDI TP7 D26# D58#
H_A#26 AD5 A12 TDO R56 H_D#27 N24 AE21 H_D#59 trace length shorter than 0.5"
A26# TDO TP8 +1.05V D27# D59#
H_A#27 AE2 C11 TMS H_D#28 M25 AD21 H_D#60
A27# TMS TP9 D28# D60#
H_A#28 AD6 B13 TRST# 56 H_D#29 H26 AF25 H_D#61 trace length shorter than 0.5"
A28# TRST# TP10 D29# D61#
H_A#29 AF3 A7 DBR# H_D#30 N25 AF22 H_D#62
A29# DBR# TP11 D30# D62#
H_A#30 AE1 R315 H_D#31 K25 AF26 H_D#63
H_A#31 A30# H_PROCHOT# D31# D63#
C AF1 A31# PROCHOT# B17 8 H_DSTBN#1 K24 DSTBN1# DSTBN3# AE24 H_DSTBN#3 8 C
H_THERMDA
THERM
8 H_ADSTB#1 AE5 ADSTB#1 THERMDA B18 8 H_DSTBP#1 L24 DSTBP1# DSTBP3# AE25 H_DSTBP#3 8
A18 H_THERMDC 75_1 J26 AD20
THERMDC 8 H_DINV#1 DINV1# DINV3# H_DINV#3 8
15 H_A20M# C2 A20M#
D3 C17 PM_THRMTRIP# E1 P25 COMP0 R71 27.4_1 +1.05V
15 H_FERR# FERR# THERMTRIP# PM_THRMTRIP# 9,15 PSI# COMP0 COMP1
A3 P26 R70 54.9_1
15 H_IGNNE# IGNNE# Z0507 CPU_BSEL0 COMP1 COMP2
A15 TP12 C16 AB2 R76 27.4_1
ITP_CLK1 Z0508 7,24 CPU_BSEL0 MCH_BSEL1 BSEL0 COMP2 COMP3
C6 A16 C14 AB1 R77 54.9_1
H CLK
15 H_STPCLK# STPCLK# ITP_CLK0 TP13 BSEL1 COMP3
D1 B14 +1.05V MISC R307
15 H_INTR LINT0 BCLK1 CLK_CPU_BCLK# 7 TP_CPU_NC1
15 H_NMI D4 LINT1 BCLK0 B15 CLK_CPU_BCLK 7 TP14 B2 NC1 DPRSTP# G1 H_DPRSTP# 15
B4 B7 200_1
15 H_SMI# SMI# TP_NC_2 DPSLP# H_DPSLP# 15
R78 C3 C19
TP15 TP_NC_3 RSVD2 DPWR# H_DPWR# 8
TP16 AF7 RSVD3 PWRGOOD E4 H_PWRGD 15
CPU_CORE TP_NC_4 AC1 A6
TP17 TP_NC_5 RSVD4 SLP# H_CPUSLP# 8,15
TP18 E26 RSVD5
100_1
TEST1 C5 TEST1 TP80
H_GTLREF AD26 F23 TEST2
R313 GTLREF0 TEST2 TP81
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