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                                         Agilent
                                         LTE Reference Vector
                                         White Paper




Introduction
The third-generation Universal Mobile    Wireless developers are under              The breadth and flexibility of these
Telecommunications System (UMTS),        increasingly demanding schedules           new emerging wireless standards
based on Wideband Code-Division          to develop products before wireless        such as LTE and Mobile WiMAX pres-
Multiple Access (W-CDMA), has been       standards finalize to meet product         ent significant challenges for FPGA
deployed all over the world. To ensure   shipment schedules. This introduces        design. For example, LTE supports a
that this system remains competitive     product development risks to the           number of modulation types (QPSK,
in the future, the 3rd Generation        baseband coding/decoding physical-         16QAM, 64QAM) with many different
Partnership Project (3GPP) began         layer design.                              configurations in the transport block
a project in November 2004 to                                                       size, Resource Block (RB) alloca-
define the long-term evolution of        The physical-layer baseband design         tion, different CRC lengths/types,
UMTS cellular technology. The            cycle often progresses in parallel         etc. Traditional FPGA development
specifications related to this effort    with a wireless standard which is          methodologies of writing/creating
are formally known as the Evolved        still rapidly evolving. Thus, algorithm    independent test vector references
UMTS Terrestrial Radio Access (E-        definition is subject to the developer's   (in addition to writing the actual HDL
UTRA) and Evolved UMTS Terrestrial       interpretation of the preliminary stan-    code needed for the implementation)
Radio Access Network (E-EUTRAN)          dard, which may not yet be complete        may become problematic in terms of
but are more commonly referred to        and may not yet be well-defined.           the development overhead needed to
by the project name LTE. The first       Unfortunately, misinterpreting the         generate the many test vectors sets
version of LTE is documented in          wireless standard on the baseband          required to verify the many configura-
Release 8 of the 3GPP specifications.    implementation can result in costly        tions supported by LTE and Mobile
                                         time delays in re-working designs and      WiMAX.
                                         potentially missing critical time-to-
Rapid evolution of new commercial        market windows.                            A new approach is needed to
wireless standards such as 3GPP                                                     facilitate rapid development and
Long Term Evolution (LTE) poses          Designing flexibility into hardware-       testing of FPGA-based physical-layer
significant challenges for physical      software platforms is key to SDR           coding/decoding implementations for
layer baseband design of commercial      development, where a common                emerging standards such as LTE. This
wireless products. This also creates     radio platform may need to be re-          white paper outlines an improved
challenges for Software-Defined          configurable to support multiple           approach to verify FPGA development
Radio (SDR) development, in which a      signal formats (LTE, WiMAX, WCDMA,         using independent and configurable
common hardware/software platform        custom/proprietary formats, etc.).         reference test vectors.
may be required to support multiple      The flexibility of FPGAs for the cod-
wireless standards such as LTE and       ing/decoding chain is attractive for
Mobile WiMAXTM.                          these applications.
FPGA Development--Today's Existing Approach

FPGA developers typically start with      To summarize, today's approach
system specifications that include        to FPGA development highlights
behavioral requirements. These            several key challenges:
specifications will likely have some
level of mathematical or pseudo-code      

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