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Sequential Shunt Regulation
Application Note 1293
Regulating Satellite
Bus Voltage
Figure 1
SAS Satellite
+
HP-IB
SAS #1 Control
- Battery Control Load
Bus CKT
Cap
+
Control
SAS #2 Control Signals
-
Figure 2
I
Isc
+ Imp Pmp
SAS #N Control
- RL
Vmp Voc V
The sequential shunt regulator is example, let's assume operation Figure 2
widely used for regulating the at the maximum power point. Isc= short circuit current
satellite bus voltage. A simplified When the shunt is open, the Imp= current at the maximum power
sequential shunt concept is current to the load will be Imp Vmp= voltage at the maximum power
shown in Figure 1. (current at the maximum power Voc= open circuit voltage
The HP E4350B/E4351B Solar point). When the shunt is closed, Pmp= maximum power point
Array Simulators (SAS) are ideal the current in the shunt is Isc RL= load line
for this type of application. (short circuit current). Figure 3
Operating in this mode, the shows the output waveforms
current either flows into the load across one SAS. The output
or into the shunt control FETs. current of the SAS is basically
The shunt control FET will be constant because the difference
referred to as the shunt or the between Imp and Isc is usually
switch for the remainder of the small but the voltage changes
paper. Figure 2 shows a typical from a short (switch on) to Vmp
solar array I-V curve. As an (switch off).
Figure 3
I OUT 2A/DIV
VOUT 20/DIV
0
0
-29.700 US -4.700 US 20.300 US
#AVG 5.00 US/DIV Repetitive
C1 C4
Sensitivity Position Probe Coupling Impedance
Channel 1 20.0V/div 60.0000V 10:1 dc 1M ohm
Channel 4 2.00V/div 0.00000V 100:1 dc 50 ohm
If bus voltage = Vmp, then capacitance (<50 nF) allows wire inductance in the test circuit
Output power delivered to this fast rise time and also limits is very small. As the inductance
the bus = (1-D) (N) (Pmp) the turn on switching losses in increases, the voltage overshoot
where: D = On duty cycle the shunt switch. The HP on the output voltage will
of the shunt FET, E4350B/E4351B can handle switch- increase, but will be limited by
N = Number of SAS supplies, ing frequencies up to 50 KHz. fast acting internal clamp circuits.
Pmp = Maximum power point. Figure 3 shows the output voltage The overshoot and undershoot in
To satisfy the power demands of and current of the HP E4351B the current (Figure 3) are due to
the power system of the satellite, when the shunt switches at 50 KHz the internal output snubber, as
the output voltage of the SAS has with shunt FET rise and fall times part of the output capacitance,
to rise within 2 to 10 usec when of 2 usec. For this test, the HP charging and discharging. Note
the shunt is opened and the E4351B is in Simulator mode that in Figure 1, the bus capacitor
operating point changes from the (refer to data sheet) and the I-V across the battery is required to
short circuit point to the operating curve defined by these four para- smooth the bus current and lower
load point on the curve. The meters: Isc = 4.00A, Imp = 3.75A, the ripple.
E4350B/E4351B low output Vmp = 120V and Voc =130V. The
Figure 4
SAS Satellite
Bus
SAS #1
Control
SAS #2
Load
SAS #n
Control
Control
SAS #n +1
Figure 1 shows diodes in series Voltage and current ratings of the losses because the voltage across
with each output of the SAS shunt switch are determined the FET is half. It may also make
(after the shunt). These diodes by the Voc and Isc parameters. the selection of the FET easier
isolate the supplies so that since a lower voltage part can be
The heatsink design for the switch
when one shunt is on, the output used. Sometimes a linear device is
will depend on the switching
of the other SAS's is not pulled used instead of a switch in order
frequency and the duty cycle and
low. The diodes should have very to have better control on the
the output current. Higher switch-
fast recovery time, otherwise the voltage, but this results in higher
ing frequency and higher duty
power dissipation in the diode power dissipation in the
cycle (ON time) will increase the
and the shunt FET will be high. linear device.
power dissipation in the shunt FET.
Higher levels of noise will also In the sequential shunt configura-
occur if slow diodes are used, A different sequential shunt that
tion, the number of strings is
or if the FET rise and fall times some customers use is shown in
limited by the total power required.
are too fast. The latter can be Figure 4. In this configuration, the
When using the HP E4350B/E4351B,
controlled by adjusting the FET bus voltage cannot be lower
strings may be added or subtract-
gate resistor. Snubber (RC) than the output voltage of the
ed as necessary for the particular
across the diodes may help reduce upper SAS. Since only one half
application. Each string is pro-
the switching noise and voltage of the string is shunted, the bus
grammable over the IEEE-488.2
overshoots. A heatsink may be voltage will always have a mini-
bus using SCPI (standard
needed to keep the diode cool and mum voltage that is at least half
commands for programmable
within the temperature ratings. of the string. The major advantage
instruments) commands.
of this technique is that it reduces
the power dissipation in the FET
by reducing the switching
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