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                                         Errata


Title & Document Type: 5328A Universal Counter Option 011 Operating and Service Manual


Manual Part Number: 05328-90019


Revision Date: December 1976



HP References in this Manual

This manual may contain references to HP or Hewlett-Packard. Please note that Hewlett-
Packard's former test and measurement, semiconductor products and chemical analysis
businesses are now part of Agilent Technologies. We have made no changes to this
manual copy. The HP XXXX referred to in this document is now the Agilent XXXX.
For example, model number HP8648A is now model number Agilent 8648A.

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                              OPTION 011
                           HP-113 INTERFACE
                    For Universal Counter HP 5328A


                          INSTALLATION AND SERVICE MANUAL


                                         SERIAL NUMBER

                       This manual applies directly to Option 011 A15 board
                       having serial number 1624 . For serial numbers above
                       1624, a "Manual Change" sheet is included with this
                       manual . For serial numbers below 1624, see back-
                       dating Section VI in this manual .




                        Copyright     HEWLETT-PACKARD COMPANY            1976
                        5301 STEVENS CREEK BLVD ., SANTA CLARA, CALIF . 95050




MANUAL PART NUMBER 05328-90019
Microfiche Par t Num ber 05328-90020                                            Printed : DEC 1976


                                                                 HEWLETTT PACKARD
                                                                                                                                                            Option 011, Model 5328A
                                                                                                                                                                   Table of Contents



                                          TABLE OF CONTENTS

Section                                                                                                                                                                                                 Page

   I      GENERAL INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
          1-1 . Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
          1-4.  Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1

   II     INSTALLATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1
          2-5 . Field Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1
          2-7 . Removal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2

  III     THEORY OF OPERATION . . . . . . . . . . . . . . . . . .                                   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    3-1
          3-1 .  HP Interface Bus Description . . . . . . . .                                       .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    3-1
          3-12 . Option 011 HP-113 Interface Operation                                              .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    3-2
          3-17 .   Overall Operation . . . . . . . . . . . . . . . .                                .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    3-2
          3-20 .   Bus Command Mode . . . . . . . . . . . . .                                       .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    3-2
          3-22 .   Listen Mode . . . . . . . . . . . . . . . . . . . . . .                          .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    3-2
          3-24 .   Talk Mode . . . . . . . . . . . . . . . . . . . . . . .                          .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    3-2
          3-26 .   Circuit Operation . . . . . . . . . . . . . . . . .                              .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    3-7

  IV      MAINTENANCE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .                                           .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    4-1
          4-1 .  Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .                                         .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    4-1
          4-3.   Recommended Test Equipment . . . . . . . . . . . . . . .                                                               .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    4-1
          4-5.   Verification of Performance . . . . . . . . . . . . . . . . . . .                                                      .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    4-1
          4-8 .    Local Operation Test . . . . . . . . . . . . . . . . . . . . . . .                                                   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    4-2
          4-10 .   Verification Using a 9820A as a Bus Controller                                                                       .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    4-2
          4-18 .   Verification Using a 9830A as a Bus Controller                                                                       .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    4-4
          4-26 . Diagnostic Program and Troubleshooting . . . . . .                                                                     .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    4-7
          4-32 .   Option 011 Diagnostic Program . . . . . . . . . . . . .                                                              .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    4-7
          4-40 .   ASM Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . .                                                .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .       4-16
          4-47 .   Troubleshooting Flowcharts . . . . . . . . . . . . . . . . .                                                         .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .       4-17
          4-53 .   ASM Troubleshooting . . . . . . . . . . . . . . . . . . . . . .                                                      .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .       4-17

  V       REPLACEABLE PARTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1
          5-1 . Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1
          5-4.  Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1

  VI      MANUAL CHANGES . . . . . . . . . . . . .                . . . .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    6-1
          6-1 . Introduction . . . . . . . . . . . . . .          . . . .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    6-1
          6-3.  Manual Changes . . . . . . . . . .                . . . .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    6-1
          6-5.    Newer Option 011 Boards                           . . .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    6-1
          6-7.    Older Option 011 Boards                         . . . .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    6-1

  VII     SCHEMATIC DIAGRAMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1
          7-1 . Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1
                                                                                                                           Option 011, Model 5328A
                                                                                                                                       List of Tables
                                                                                                                                      List of Figures

                                                LIST OF TABLES




3-1 .    American Standard Code for Information Interchange (ASCII) . . . . . . . . . . . 3-3
3-2.     Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4
3-3 .    Program Code Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5

4-1 .    Recommended Test Equipment and System Equipment                                               .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    4-1
4-2.     Local Operation Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .          .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    4-2
4-3 .    9820A Verification Program . . . . . . . . . . . . . . . . . . . . . . . . . .                .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    4-3
4-4 .    9830A Verification Program . . . . . . . . . . . . . . . . . . . . . . . . . .                .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    4-5
4-5 .    Diagnostic Program List . . . . . . . . . . . . . . . . . . . . . . . . . . . . .             .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .    4-8
4-6 .    5328A Option 011 Signal Mnemonics . . . . . . . . . . . . . . . . .                           .   .   .   .   .   .   .   .   .   .   .   .   .   .   .   .       4-21

5-1 .    Replaceable Parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3
5-2 .    Manufacturers Code List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-5

6-1 .    Manual Backdating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1




                                               LIST OF FIGURES




1-1 .    HP Model 5328A Option 011 HP-113 Interface                                   . . . . . . . . . . . . . . . . . . . . . . . . . . 1-0

3-1 .    ASM Oscillator Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8
3-2.     HP-113 Interface Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9

4-1 .    ASM Flowchart (Sheet 1 of 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .                                            .   .   .       4-23
4-2.     Local Troubleshooting Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .                                               .   .   .       4-28
4-3 .    Remote/Local Troubleshooting Flowchart . . . . . . . . . . . . . . . . . . . . . . . . .                                                          .   .   .       4-29
4-4.     LLO Troubleshooting Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .                                               .   .   .       4-30
4-5 .    GTL Troubleshooting Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .                                               .   .   .       4-31
4-6.     TALK/UNTALK Troubleshooting Flowchart (Sheet 1 of 2) . . . . . . . . . . .                                                                        .   .   .       4-32
4-7 .    LISTEN/UNLISTEN Troubleshooting Flowchart . . . . . . . . . . . . . . . . . . . . . .                                                             .   .   .       4-34
4-8 .    GET Troubleshooting Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .                                               .   .   .       4-35
4-9 .    DCL Troubleshooting Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .                                                 .   .   .       4-36
4-10 .   SDC Troubleshooting Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .                                                 .   .   .       4-37
4-11 .   FUNCTION CODE and TIME BASE CODE Troubleshooting Flowchart                                                                                        .   .   .       4-38
4-12 .   P Troubleshooting Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .                                             .   .   .       4-39
4-13 .   R Troubleshooting Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .                                             .   .   .       4-40
4-14 .   MULT Troubleshooting Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .                                                  .   .   .       4-41
4-15 .   ODU Troubleshooting Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .                                                   .   .   .       4-42
4-16 .   SAMPLE RATE Troubleshooting Flowchart . . . . . . . . . . . . . . . . . . . . . . . . .                                                           .   .   .       4-43
4-17 .   ARMING Troubleshooting Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .                                                      .   .   .       4-44
4-18 .   STORAGE Troubleshooting Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . .                                                       .   .   .       4-45
4-19 .   DECADE RESET DISABLE and DIGIT OUTPUT Troubleshooting
                Flowchart (Sheet 1 of 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .                                           .   .   .       4-46
4-20 .   OVERFLOW Troubleshooting Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . .                                                          .   .   .       4-49
4-21 .   TALK ALWAYS Troubleshooting Flowchart . . . . . . . . . . . . . . . . . . . . . . . . .                                                           .   .   .       4-50
4-22.    ADDRESS SWITCH Troubleshooting Flowchart . . . . . . . . . . . . . . . . . . . . .                                                                .   .   .       4-51

7-1 .    Option 011 A15 HP-113 Interface Assembly                                . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-3
Option 011, Model 5328A
General information




                          Figure 1-1 . HP Model 5328A Option 011 HP-1B Interface
                                                                               Option 011, Model 5328A
                                                                                    General Information



                                        SECTION I
                             GENERAL INFORMATION


1-1.   INTRODUCTION

1-2 . This manual provides service and installation information for option 011 Hewlett-Packard
Interface Bus (HP-113) Interface to the Hewlett-Packard Model 5328A Universal Counter .

1-3 . The sections within this manual are labeled SECTION I GENERAL INFORMATION,
SECTION II INSTALLATION, SECTION III THEORY OF OPERATION, SECTION IV MAIN-
TENANCE, SECTION V REPLACEABLE PARTS, SECTION VI MANUAL CHANGES, and
SECTION VII SCHEMATIC DIAGRAMS . These sections are designed to be compatible with the
same sections of the 5328A Service Manual . Programming information for Option 011 is con-
tained in Section V of the 5328A Users Manual .

1-4.   DESCRIPTION

1-5 . Option 011 HP-113 Interface consists of one printed-circuit card (see Figure 1-1) that
mounts above and parallel to the A1 Motherboard in the 5328A . This option allows the 5328A
to output measurement data and be controlled via the HP-113 . The option is designed for use
with HP-113 compatible instruments, calculators, and computers . The functions of the 5328A
are fully programmable when this option is installed . Complete specifications for Option 011
are listed in Table 1-3 of the Users Manual and in the Service Manual for the 5328A .
                                            NOTE
            HP-IB Interconnect cable 10631A, B, C, or D is available as an ac-
            cessory (not supplied with Option 011). The 10631A is 914 mm (3 feet)
            long, 10631B is 1828 mm (6 feet) long, the 10631C is 3656 mm (12 feet),
            and the 10631D is 500 mm (1 .5 feet) long.
                                                                                       Option 011, Model 5328A
                                                                                                     Installation


                                              SECTION II
                                           INSTALLATION

2-1 . If Option 011 is included in the initial order for the 5328A, the option is installed at the
factory and is ready for operation upon receipt. If Option 011 (HP Part No . 05328-80011) is ordered
for field installation, it will include the following parts :


                           ITEM                 QUANTITY                HP PART NO .

             HP-113 Board                             1                  05328-60019
             Cable Assembly                           1                   8120-2176
             Cover Plate                              1                  05328-00014
             Machine Screw                            4                   2360-0115




2-2. The HP-113 connector mounting studs accommodate lock screws with 150 metric thread
M3 .5x0 .6 or equivalent Optimum Metric Fastener System (OMFS) thread 3.5P06.

2-3. Metric hardware supplied by HP for HP-113 connectors can be identified by the black finish .
If metric tools are not available, a 9/32 inch hex socket will fit the 7 mm hex stud .

2-4. Conversion kits for converting earlier instruments to use the metric lock screws are
available through any HP Sales or Service Office listed in the back of this manual .

2-5.         FIELD INSTALLATION

2-6.        To field install the option, proceed as follows:

                                                 CAUTION

                          Avoid flexing Option 011 board. Due to the number of
                          resistor packs and their location, flexing can cause
                          resistor failures .

       a.     Disconnect the power cable from the 5328A (Safety Precaution).

       b.     Remove the top and bottom covers from the 5328A .

       c.     Remove the small plate from the rear panel, located above the STORAGE switch, by
              removing two screws .

       d.     Remove A4 Function Selector board from motherboard by pulling up on one end of
              extractor at top of board (use rocking motion to extract board) .

       e.     Remove the nut on each side of digital bus connector J6 on the HP-IB Interface board .

                                                 CAUTION

                          In the following step, be sure that pin 1 of the plug (on
                          each end of the cable) is aligned with pin 1 of the jack
                          (on each board) before inserting . (Pins on plugs are
                          numbered . Pin 1 on jacks has square solder dot.)
                          Damage to equipment may occur if connectors are
                          inserted incorrectly and power applied.
Option 01 1, Model 5328A
Installation


             f.   Connect one end of the 28-conductor cable to J-1 on the motherboard and insert the
                  cable through the slot of the main bracket, MP10 (refer to Figure 4-1 in the 5328A Service
                  Manual) and bend remaining end of cable over top of MP10.

             g.   Install the HP-113 board, component side up (parallel to the motherboard) with digital
                  bus connector J6 inserted out through the rear panel (where plate was removed) .

             h.   Place 5328A on its side and attach four 6-32x   5/6   inch screws to the HP-113 board standoffs
                  from underside the motherboard .

             i.   Mount the cover plate over digital bus connector J6 and switch S1 and attach with two
                  screws . Replace two nuts on J6 that were removed in step e .

             j.   Connect the free end of the 28-conductor cable to J1 (position 35) on HP-113 board .

             k.   Connect the end of the lock-out cable (jumper wire) to terminal post at pin 4 of XA16
                  (below display board) on motherboard .

             I.   Install A4 Function Selector board removed in step d .

             m.   Install top and bottom covers and apply power.

             n.   Conduct the local operation test, Section IV Table 4-2, and one of the verification of
                  performance tests, Section IV either paragraph 4-10 or 4-18.

      2-7.        REMOVAL

      2-8 . Procedures for removal of Option 011 are essentially the reverse of the above installation
      procedures .
                                                                                   Option 01 1, Model 5328A
                                                                                       Theory of Operation



                                         SECTION III
                               THEORY OF OPERATION

3-1 .   HP INTERFACE BUS DESCRIPTION

3-2. The HP Interface Bus transfers data and commands between the components of an instru-
mentation system on 16 signal lines. The interface functions for each system component are
performed within the component so only passive cabling is needed to connect the system . The
cables connect all instruments, controllers, and other components of the system in parallel to the
signal lines .

3-3 . Eight of the lines (D101-D108) are reserved for the transfer of data and other messages in a
byte-serial, bit-parallel manner . Data and message transfer is asynchronous, coordinated by the
three handshake lines (DAV, NRFD, NDAC) . The other five lines are for control of bus activity .

3-4. Devices connected to the bus may be talkers, listeners, or controllers . The controller
dictates the role of each of the other devices by setting the ATN (attention) line low and sending
talk or listen addresses on the data lines (D101-D108) . Addresses are set into each device at the
time of system configuration either by switches built into the device or byjumpers on a PC board.
While the ATN line is low, all devices must listen to the data lines . When theATN line is high, only
devices that have been addressed will actively send or receive data. All others ignore the data
lines.

3-5 . Several listeners can be active simultaneously but only one talker can be active at a time .
Whenever a talk address is put on the data lines (while ATN is low), all other talkers will be auto-
matically unaddressed .

3-6 . Information is transmitted on the data lines under sequential control of the three
handshake lines. No step in the sequence can be initiated until the previous step is completed .
Information transfer can proceed as fast as devices can respond, but no faster than allowed by the
slowest device presently addressed as active . This permits several devices to receive the same
message byte concurrently .

3-7 . The ATN line is one of the five control lines . When ATN is low, addresses and universal
commands are transmitted on only seven of the data lines using the ASCII {American Standard
Code for Information Interchange) code. When ATN is high, any code of 8 bits or less understood
by both talker and listener(s) may be used .

3-8 . The other control lines are IFC, REN, SRQ, EOI . IFC (interface clear) places the interface
system in a known quiescent state. REN (remote enable) is used with other coded messages to
select either local or remote control of each device .

3-9 . Any active device can set the SRQ (service request) line low . This indicates to the con-
troller that some device on the bus wants attention, say a counter that has just completed a time-
interval measurement and wants to transmit the reading to a printer .

3-10. EOI (end or identify) is used by a device to indicate the end of a multiple-byte transfer
sequence . When a controller sets both the ATN and EOI lines low, each device capable of a
parallel poll indicates its current status on the DIO line assigned to it.

3-11 . For a more detailed description of bus operation, refer to the manual entitled "Con-
densed Description of the Hewlett-Packard Interface Bus", HP Part No. 59401-90030 .
Option 011, model 5328A
Theory of Operation


      3-12.    OPTION 011 HP-113 INTERFACE OPERATION

      3-13 . The 5328A HP-113 Interface is used to remotely program the 5328A and deliver the mea-
      surement results to the bus. Thus, the option operates both as a listen and as a talker .

      3-14. As a listener, the interface is capable of programming most of the controls in the main-
      frame and all programmable modules that maybe installed . The HP-113 board contains storage cir-
      cuits to control the mainframe remotely, and is set up to program the storage circuits in any pro-
      grammable module .

      3-15 . As a talker, the interface is capable of outputting the measurement data in exponential
      format with a mantissa of nine digits (leading zeros are output as spaces) and an exponent of one
      digit. Overflow and sign information is also contained along with a carriage return (CR), linefeed
      (LF) termination to make it compatible with the standard HP-113 serial data format.

      3-16. In addition to being a talker and listener, the HP-113 Interface follows a set of HP-113
      commands . This includes complete service request capability . The ASCII codes used for ad-
      dressing and for data are shown in Table 3-1 . Address switch information is shown in Table 3-2 .
      The program code set is shown in Table 3-3.

      3-17.    Overall Operation

      3-18. The heart of the HP-113 Interface is a 256 state algorithmic state machine (ASM) controlled
      by a 256 x 16 ROM (U22) as shown in the block diagram Figure 3-2 . This state machine has two
      different format states determined by the format (F) bit from U22 . One state (F=0) is an output
      mode state where the machine will proceed sequentially to the next state (address) after storing or
      outputting information . The other state (F=1) is a mode where the machine can either proceed to
      the next line or perform a conditonal jump to a different line in the program . The decision as to
      which state is chosen is made on the basis of whether the qualifier bit from U11A is low or high .
      Preset counters U14 and U23 provide presetting to a jump statewhen F=1 and thequalifier is low .
      These counters increment their count in all other cases . Altogether, there are 52 different bits that
      may be selected as the qualifier for a particular state.

      3-19 . Qualifier negate circuit U30C can invert the qualifier bit for any given state so that the
      machine can branch on the qualifier being low or being high . U7 is added for psuedo subroutine
      capability . I n the output mode, the ASM goes through the same group of states once for every
      character being outputted on the bus. U7 is incremented every time so that the ASM can tell
      which character it is to output.

      3-20.    Bus Command Mode

      3-21 . I n this mode (ATN low), the ASM accepts parallel bytes of information and decodes them
      into bus commands . This usually requires setting or clearing bits of storage in U19 or U26 .

      3-22.    Listen Mode

      3-23 . I n the listen mode, the listen qualifier of U26 must below and ATN high . The interfacewill
      then accept 8-bit parallel bytes continuously . When receiving theASCI I characters P, Q, U, R, orT
      the counter will act upon the byte immediately (refer to programming in 5328A Users Manual) .
      When receiving the letters F, G, A, B, C, D, orS the interfacewill then route anyASCII number or
      numbers following these letters into particular storage registers . These registers are U28, U33, and
      U34 along with any that are contained in any of the optional modules installed in the mainframe .

      3-24 .   Talk Mode

      3-25 . The HP-113 Interface will go into the talk mode if the talk qualifier of U26 is low or the talk
      always switch is set to talk always and ATN high for both cases. There will be no output in normal


3-2
                                                                                                           Option 011, Model 5328A
                                                                                                               Theory of Operation


operation unless a completed measurement is present and has not been outputted . The
information to be put on the bus is latched into latches U15 and U24 . These drive the high current
buffers U5, U10, and U16 . Counter U7 is used as a pointer for the ASM to recognize which
character in the serial output string the interface is to output . Additional information on the HP-113
Interface operation is contained in the 5328A Users Manual .


              Table 3-1 . American Standard Code for Information Interchange (ASCII)



                   USA STANDARD CODE FOR INFORMATION INTERCHANGE
                              b7
           BITS                                                                  0
                              b6                      0 0        0                          00
                              b5
     b4 b3 b Z       bt       COLU    '0
                                       ;"1
                     i        i                                                      3      4
        i i

      0   0    0    0             0              NUL            DLE      SP
                                                                       (b tan

      0   0    0     1                           SOH            DC1

      0   0         0             2              STX            DC2                                        b        r

      0   0    1    1             3              ETX            DC3                                        c        s

      0   1    0    0           4                EOT            DC4

      0   1    0    1             5              ENQ            NAK

      0   1    1    0             6              ACK            SYN

      01111 11            I       7          I   BEL            ETB

                                                                CAN                                        h   I    x

      1 101011            I     9            I   HT             EM                                                  Y

      1   0    1    0             10             LF             SUB                                                 z

      1   0    1    1             1 1            VT             ESC                                        k

      1   1    0    0             12             FF             FS                                         I

      1   1    0    1             13             CR             GS                                         m

      1 11 1 1     I 0    I       14         I   SO         I   RS                                         n

      1   1    1    1             15             SI             US                                         o   I   DEL


                                                  UNIVERSAL
                                                  ADDRESS
                                                  COMMANDS
                                                                          t
                                                                      LISTEN
                                                                                UNLISTEN
                                                                                COMMAND     t
                                                                                           TALK
                                                                                                 UNTALK
                                                                                                 COMMAND

                                                                      ADDRESSES            ADDRESSES


                                                                         DATA WHEN ATN IS HIGH .
                                                                       ADDRESSES WHEN ATN IS LOW.
Option 011, Model 5328A
Theory of Operation
                                             Table 3-2 . Addressing




                          ADDRESSABLE


                               1
                               0

                                            A5 A4 A3 A2 Al
                                             1           1
                                   TALK                                ADDRESS SWITCHES
                                   ONLY

                                          ASCII ADDRESS CODES
                                                               ASCII         ASCII
                                                              LISTEN         TALK
                  A5                A3       A2      Al      ADDRESS        ADDRESS

                  0       0          0        0       0          SP
                  0       0          0        0       1          !             A
                  0       0          0        1       0           "            B
                  0       0          0        1       1           #            C
                  0       0          1        0       0          $             D
                  0       0          1        0       1          %             E
                  0       0          1        1       0          &             F
                  0       0          1        1       1            '           G
                  0       1          0        0       0                        H
                  0       1          0        0       l          )              I
                  0       1          0        1       0                         J
                  0       1          0        1       1          +             K
                  0       1          1        0       0          ,             L
                  0       1          1        0       1          -             M
                  0       1          1        1       0                        N
                  0       1          1        1       1          /              0
                  1       0          0        0       0                        P
                  1       0          0        0       1          1              Q
                  1       0          0         1      0          2              R
                  1       0          0         1      1          3               S
                  1       0           1       0       0          4              T
                  1       0           1       0       1          5              U
                  1       0           1        1      0          6              V
                  1       0           1        1      1          7              W
                  1       1          0        0       0          8              X
                  1        1         0        0       1          9              Y
                  1       1          0         1      0                         Z
                  1        1         0         1      1
                  1        1          1       0       0          <
                  1        1          1       0       1          =
                   1       1          1        1      0          >




3-4
                                                                              Option 011, Model 5328A
                                                                                  Theory of Operation
                             Table 3-3. Program Code Set



Codes shown in bold face are start-up conditions . These conditions are set by the code "P",
Remote Program Initialize, or by the bus commands Device Clear or Selected Device Clear .
 1 . Initialization
      P    Remote Program Initialize
 2 . Function
      F,0  Stop                                    F8   T .I . A-B
      F1   Start A                                 F9   B/A
     tF2   Start Clock                             F:   T .I . Avg . A -
     tF3   DVM/A                                   F;   Events C,T .I . A-B
      F4   Freq . A                                F<   Check
     tF5   DVM/T .I .    A--B                      F=   C/A
      F6   Period A                                F>   Freq . C
      F7   Per . Avg . A                           F?   DVM



  3.   Time Base

                                                               Time Res        Time Res
       Code                  Freq Res       Multiplier           (Std)         (Opt. 040)
        G,0                      1 MHz           1              100ns             10ns
        Gl                   100 kHz            10                 1 ws          loons
        G2                     10 kHz           102              lops              l fts
        G3                       1 kHz          10;             loops             lops
        G4                   100 Hz             104               lms            loops
        G5                     10 Hz            105              10ms              1ms
        G6                       1 Hz           106             looms             loms
        G7                    0 .1 Hz           107               1s             looms

  4.   Single-Multiple Measurement
       S;0   Single Measurement
       Sl    Multiple Measurement
  5.   Measurement Cycle
       S2    Wait to output ; Service Request at end of measurement
       S3    Continue cycle ; no Service Request
  6.   Output Mode
       S4    Output at end of measurement
       S5    Output when addressed (on-the-fly)
  7.   Sample Rate
       S6    Maximum
       S7    Manual control (from front panel)
 8.    Arming
       S:    Off
       S;    On
 9.    Display Storage
       S<    On (normal)
       5=    Off
10 .   Decade Reset
       S>    Normal
       S?    Disabled (for cumulative measurements)
11 .   Display Blanking
       U     Normal display
       Q     Blank display (digits and decimal point)


 tFunctions not labeled on instrument front panel




                                                                                                  3-5
Option 011, Model 5328A
Theory of Operation

                                     Table 3-3. Program Code Set (Continued)




             12 .   Channel A Signal Conditioning
                    a . Impedance
                        Ap    1 Megohm
                        A1    50 Ohms
                    b . Coupling
                        A2 AC
                        A3 DC                                               Code groups 12 to 18 apply
                    c . Slope
                                                                            only when Option 041 is installed .
                        A4 +slope
                        A5 -slope
                    d . Attenuator
                        A6 x10
                        A7 x1
             13 .   Separate - Common
                    A8 Separate
                    A9 Common A
             14 .   Check
                    A< Normal Operation
                    A? Check, Measures internal clock

             15 .   Trigger Level A
                          .volts
                               tenths of volts
                                 rhundredths of volts

                    A{+fd, d 2 d 3

                    Permissible trigger level range : -2.50V to +2 .50V .

            The program sequence to set trigger level starts with the channel designation letter followed
            by a "+" or "-" sign . Next, three digits set the voltage level . An "*" terminates the sequence .
            The same sequence must be used even to set 0 volts .

                    Examples :   "A+000*"   0 volts
                                 "A-123*" -1 .23 volts

            16 .    Channel B Signal Conditioning
                    a . Impedance
                        B0    1 Megohm
                        131   50 ohms
                    b . Coupling
                         B2 AC
                        B3 DC
                    c . Slope
                        B4 +slope
                        B5 -slope
                    d . Attenuator
                        B6 x10
                         B7 x1
            17 .    Trigger Level B
                    BI+Id, d 2 d 3

                    See Group 15, Trigger Level A, for details .
            18 .    Channel Invert
                    B8 Normal
                    B9 Invert A and B inputs
            19 .    Reset ; Trigger
                    (Also see Bus Command GET)
                    R Reset, no trigger
                    T Reset and trigger
                                                                                  Option 011, Model 5328A
                                                                                      Theory of Operation


3-26.     Circuit Operation

3-27 .   The following paragraphs describe the circuit operation of Option 011 .

3-28 . STATE COUNTERS . As shown in the schematic diagram, Figure 7-1, the state of the ASM
ROM (current state and next stat-e) is determined by State Counters U14 and U23 . These counters
form an 8-bit presettable binary counter. When pin 1 of U25 is low, the counters will always
increment. When pin 1 of U25 is high, the counters will preset (jump to another state in the
program) if the output of U30C is high . The preset address is supplied to the State Counters input
from the ROM . The program is shown in the operational flowchart, Figures 4-1, 4-2 and 4-3. The
output of U30C is determined by the "not" bit from the ROM (through U21E) and the output of
the Qualifier FF U11A . The preprogrammed state of the "not" bit determines whether a high or
low output of the qualifier FF will result in a jump in the program . (This is shown in the ASM
Operational Flowchart, by the use of the letter "N" in a decision diamond symbol .) The preset
(jump) is synchronous and only occurs when pin 9 of U14 and U23 is low and when there is a rising
edge at pin 2 of U14 and U23. FF U31A synchronizes the reset of the State Counters to occur at the
proper time .

3-29 . ASM OSCILLATOR . As shown in the ASM Oscillator Timing Diagram, Figure 3-1, the
ASM oscillator circuit provides three separate phases of clock outputs . Schmitt trigger U18A is the
fundamental oscillator element which uses hysteresis to develop oscillation . The output of U18A
(through U13) strobes storage latches U11A and B, U15, U19, U24, U26, U28, U33, U31B and U34.
The output of U18A is also sent through a delay circuit consisting of resistor R14 and capacitorC4
into U18B to provide another phase of the clock output that determines the next state of theASM .
In addition, the output of U18A is sent through U30A to provide a third clock phase which is
applied to U31A . The output of U31A resets the 8-bit State Counter synchronously at power up or
when the IFC signal occurs . (Synchronous reset prevents loading the storage latches with
erroneous data .) The IFC signal also resets U26 (ASM storage) . The power up reset circuit U18C
and U18D clears all storage elements .

3-30 . BUS INTERFACE . The bus interface circuit consists of bus line termination resistors, data
output drivers and data input buffers . Resistors R29 and R30 form the line termination networks,
U4 is used to buffer the bus line inputs and U5, U10, and U16 are high current drivers that drive the
bus line output . The ATN signal is sent through U9A and U29D to ensure that the gates connected
to bus lines D101-D107 and DAV do not output when ATN goes true . The DAO signal from
U24(9) arms the DAC signal through U17B to ensure that DAC goes false within a few gate delays
after ATN goes true . (In some cases, the DAC response from the ROM may be too slow .) After
ATN is true, DAO is set to a "0" to allow normal operation of the DAC line .

3-31 . END OF MEASUREMENT . When a measurement has been completed, FF U11B is set .
This FF is clocked by the closing edge of the LMG signal . Diode CR2 and transistor Q3 keep U11B
from going to the "1" state when LRES is low or HRD is high . (During these times the counter is
being reset and noise appears on the LMG line which could trigger U11B) .

3-32 . QUALIFIER MULTIPLEXERS . Five 8to1multiplexersareconnected toallow 36lines tobe
multiplexed into 1 line . ASM ROM U22 controls multiplexers U3, U6, U8, and U32 to select
individual line qualifiers and U12 to select one of these multiplexers . I n addition, U12 checks the
output of auxiliary State Counter U7, a 4-bit binary counter that allows the same sequence of
states to be repeated up to 16 times. In the output algorithm, each state represents an output
character . Qualifier FF U11A eliminates erroneous results by ensuring that the State Counters U14
and U23 are not clocked when a qualifier is changing states . This would cause a partial preset and
partial increment of the State Counters .

3-33 . ADDRESSING . Address Comparator U2 monitors the Data Input/Output (DIO) lines 2
through 5 and the address switch (S1) settings . When a comparison occurs between the state of
these DIO lines and the address switch settings, U2 sends qualifier ADDR to multiplexer U8 . The



                                                                                                        3-7
Option 011, Model 5328A
Theory of Operation


       TALK ALWAYS section of the address switch provides a means of setting U6 so that interface is
       always addressed to talk.

       3-34. DATA OUTPUT . The Data Output circuit outputs characters on the bus data lines .
       Storage circuit U24 transfers outputs from the ROM to DIO lines 5 through 7. U15 selects data
       from either the ROM or the 5328A data bus and transfers it to DIO1-D104 . The state of the "not"
       bit from ROM U22(13) through U21E determines the selection made by U15 . A displayed digit is
       selected from the 5328A, any other characters (decimal point, "E", carriage return, exponent,
       linefeed, etc .) are selected from the ROM .

       3-35 . ASM STORAGE . The internal memory for the ASM operation is in ASM Storage circuits
       U19, U26, and U31B . There are 17 information bits that can be set or cleared bythesecircuits .This
       section also includes one-shot U1 which outputs a 1 ms pulse (LRST) to ensure reliable operation
       of the state control circuit U4 on the motherboard . Diode CR3 ensures that LINH is low to inhibit
       the counter during the time that LRST is low .

       3-36. STROBE ENABLE DECODER . Decoder U13 is a 4 to 10 line decoder used to strobe the
       various storage latches . Pins 1, 14, and 15 are used to select the device to be strobed and pin 2 is an
       enable which determines the width of the strobe pulse . This pulse is shown by the shaded area in
       Figure 3-1 . The output of U25C disables U13 when the ASM is in the decision state mode. In the
       decision state mode, the format bit U22(17) goes high which disables U13 .

       3-37. REMOTE PROGRAM STORAGE . Storage circuits U28, U33, and U34 are used to program
       instrument functions . U28 stores Time Base codes in 3-bit bytes and U34 stores Function codes in
       4-bit bytes . U33 stores 8 bits of information, one-bit at a time . The Sample Rate, Arming, Storage
       Off, and Decade Reset can be programmed by U33 . In addition, U33(4, 5, and 6) control the
       manner in which measurements are made and output to the bus. The inputs to the remote
       program storage circuits are the Module Data A, B, C, and D lines from DIO lines, 1, 2, 3, and 4,
       respectively .




                     NEXT STATE OF ASM

           U18(6)



                     STROBE STORAGE LATCHES

           U18(3)



                     RESET BINARY COUNTERS U14, U23

            U30(3)




                                   Figure 3-1 . ASM Oscillator Timing Diagram

3-8
         OSC




         OSC




               PRESET COUNT
HP-113
                 FOR STATE
               LINKAGE U14,




HP-I B
                                                                            LARM
                                                                            HRD
                                                                            LT R
                                                         COUNTERPROGRAM     SR T     TO COUNTEF
                                       HP-113              DATA LATCHES              FN CODE
                                                              U28, 33, 34            TB CODE,




                                        MEMORY
                                        DEVICE
                                        SELECT               LATCH
                                                             STROBE                  CLK
                                                             LOGIC



                   4K
                  ROM
                  U22




                                                                ASM
                                                             PROGRAM               PROGRAM STOR
                                                             STORAGE                 MULTIPLEXE
                                                              LATCHES                  U6,32
                                                               19,26
                               NEXT
                               STATE
             PRESET COUNTER                                        LATCH                        INI
               FOR STATE                                           SELECT                       SE
             LINKAGE U14, L3                                       CODE                         CO


SET/COUNT
LOGIC
IA,25A,30C



                                               ASCII
                                              OUTPUT
                                            CHARACTERS
                                                           BUS OUTPUT
                                                            LATCHES
                                                             U15,24                  BUS
                                                                                   DRIVERS
                                                                                   U5, 10, 16

 U12
CONDARY
_TIPLEXER




ESTATE
UNTER U6
                                                                         Option 011, Model 5328A
                                                                             Theory of Operation




                                    LARM
                                    HRD
                                    LT R
                 COUNTER PROGRAM    RBI      TO COUNTER
HP-IB              DATA LATCHES              FN CODE
                      U28, 33, 34            TB CODE,




 MEMORY
 DEVICE
 SELECT              LATCH
                     STROBE                  CLK
                     LOGIC




                       ASM
                     PROGRAM               PROGRAM STORAGE
                     STORAGE                 MULTIPLEXER
                     LATCHES                   U6,32
                      19,26


                           LATCH                      INPUT
                           SELECT                     SELEC"
                           CODE                       CODE




       ASCII
      OUTPUT
    CHARACTERS
                   BUS OUTPUT
                    LATCHES                                                HP-113
                     U15, 24                 BUS
                                           DRIVERS
                                           U5,10,16




                                                          Figure 3-2 . HP-IB Interface Block Diagram

                                                                                                 3-9
                                                                              Option 011, Model 5328A
                                                                                          Maintenance



                                        SECTION IV
                                     MAINTENANCE


4-1 .    INTRODUCTION

4-2. This section contains maintenance and service information . Included is a table of recom-
mended test equipment, verification of performance tests, a diagnostic program, an ASM flow-
chart, troubleshooting flowcharts, and troubleshooting information .

4-3.     RECOMMENDED TEST EQUIPMENT

4-4. Test equipment and system equipment recommended to maintain and service Option 011
is listed in Table 4-1. Test equipment with equivalent characteristics may be substituted for the
test equipment listed . Due to the programs supplied, only system equipment listed should be
used for the particular test involved .

                Table 4-1 . Recommended Test Equipment and System Equipment
                                 RECOMMENDED TEST EQUIPMENT
                                                                         Suggested
           Instrument Type           Recommended Characteristics                         Use
                                                                           Model

  Oscilloscope                      Bandwidth : 50 MHz                   HP 180A           T
    Vertical Plug-In                Sensitivity : 50 mV/cm               HP 1801A          T
    Horizontal Plug-In              Sensitivity : 1 ms/cm                HP 1820A          T

   Logic State Analyzer             Clock Input : 60 kHz                 `HP 1601A         T
                                    Trigger Word : 8 Bits
                                    Bit fnput: TTL
                                    Display Word : 8 Bits

   Digital Voltmeter                Function : DC, resistance            HP 3490A          T

                                      SYSTEM EQUIPMENT
                                                                         Suggested
           Instrument Type            Recommended Characteristics                        Use
                                                                           Model

  Calculator                        HP-IB compatible                       9820A           V

   HP-IB Calculator Interface       Connects 9820A to HP-113              59405A           V
                                                                        Option 020

  Calculator                        HP-113 compatible                      9830A        V,D,T

   Printer                          Compatible with 9830A                  9866A        V,D,T

   HP-113 Calculator Interface      Connects 9830A to HP-113              59405A         V,D,T
                                                                        Option 030

        V=Verification of Performance Test, D=Diagnostic Program Test, T=Troubleshooting



4-5.     VERIFICATION OF PERFORMANCE

4-6. To verify the performance of Option 011, a bus controller is required to control operation.
Included is detailed information to verify the operation of Option 011, with either a 9820A
Calculator or a 9830A Calculator used as the bus controller .
Option 011, Model 5328A
Maintenance


       4-7. Before using one of the bus controllers and test programs to verify proper operation of
       the interface, a preliminary test must be performed . The preliminary test is called the Local
       Operation Test .

       4-8.     Local Operation Test

       4-9. Table 4-2 shows the preliminary test . This test checks for proper local operation, and
       must be performed prior to the verification of performance test .

                                                                                                 Table 4-2. Local Operation Test

               Instrument Setup and Test Procedure                                                                             Test Description and Expected Results

         Set 5328A Counter with                                                Option 011 as                               5328A with Option 011 should be displaying
         follows :                                                                                                                           10 .0000 MHz
           FUNCTION . . . . . . . .                                         .   .   .   .    .       .   .   . CHECK       The counter should also be gating and con-
           FREQ RES . . . . . . . . . .                                     .   .   .   .    .       .   .        .1 kHz   trollable by the sample rate .
           SAMPLE RATE . . . . . .                                          .   .   .   .    .       .   .   . . . CCW
           ARMING . . . . . . . . . .                                       .   .   .   .    .       .   .   . . . . OFF   If the counter fails the above test, disconnect
           STORAGE . . . . . . . . . .                                      .   .   .   .    .       .   .   . . . . ON    one end of the 28-conductor cable, and per-
           OSCILLATOR . . . . . .                                           .   .   .   .    .       .   .   . . . . INT   form the test again . If the counter passes,
                                                                                                                           refer to Local Troubleshooting Flowchart.


       4-10 .         Verification Using a 9820A as a Bus Controller

       4-11 . When a 9820A is used as a bus controller to make a verification of performance check,
       the following equipment is required :
                Model 5328A Counter with Option 011
                Model 9820A Calculator with ASCII Bus Interface Model 11144A-020

       4-12 .    Connect the equipment as follows:

          a.          Insert the peripheral control 11224A PC II ROM in ROM slot three of the 9820A
                      Calculator .
          b.          Insert the 59405A HP-113 Calculator interface card into one of the 9820A I/O slots.
          c.      Connect one end of a Bus interface cable (any of the four lengths available) to the
                  Option 011, and the other to the 59405A Interface card .

      4-13 . Before loading the program, press the END and EXECUTE keys . This positions the pro-
      gram counter to zero . Press the remaining keys in the program, as shown in the calculator key
      column of Table 4-3.

      4-14 .    9820A program list and program response

                      9820A Program Listing                                                                                             9820A Program Response

                                                                                                                                                 : 1 I~'I I "'I !"'! 1:J



                                                       :: i....                                                                                         .     . ..   ...   ...     ...   . ..    ... ~...

                                             : !:~i
                                                                                                                                                                                                                   . ::
                                                                                                                                                i;'i                        J    4; ;1   I'J    1 :;1       !: I



                                                       .... ...
                 ..   i                         .L.~ ~. ., i._~     ..
                                                                  i...i
                                                                           ,    C'      .~       T.
                                                                                                                                                :::;1 1',11 ; ;11 : ;11:;I 1": 1!" 1 ! : I


                      .. . . .   .   .. .   .   ....   .. . :             I,    r                I                                              !::! !: I: 1 ! : :I
                                                                                                                                                       :!                        !,. !:. .1 ! :''!
                                                                                                                                                                                   ..1          .

                                                                                                                                           ::   ! : :!! :~!:. .1!1F .I!1f: :I

                                                                                                                                                            !:''!




                                                                                                                                                F!




4-2
                                                                             Option 011, Model 5328A
                                                                                         Maintenance

                           Table 4-3 . 9820A Verification Program
     PROGRAM                                                                  CALCULATOR
                 COMMAND                  PROGRAM DESCRIPTION
     LINE NO .                                                                    KEY
            0      CMD      Control statement . Refer to 11222A periph-       Bus Command
                            eral control II operating manual HP Part No .
                            09820-99024, page 2-11 .
         0                  First quotes following CMD statement                   "
                            specifies address mode .
         0           ?      Unaddresses all listeners on the Bus                   ?
         0           Y      Calculator's talk address, puts calculator in
                            talk mode .
         0           9      5328A's listen address, puts 5328A in remote           9
                            and listen mode .
         0                 Terminates command mode                                 "
         0                  Delimiter between modes
         0                 Second quote field, after CMD statement,                "
                           specifies data mode .
        0            P     5328A remote program initialize



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