Service Manuals, User Guides, Schematic Diagrams or docs for : IBM Lenovo 3000 - k40 - k41a - igt10 - igt11 compal_la-3451p_r0.1_schematics
<< Back | HomeMost service manuals and schematics are PDF files, so You will need Adobre Acrobat Reader to view : Acrobat Download Some of the files are DjVu format. Readers and resources available here : DjVu Resources
For the compressed files, most common are zip and rar. Please, extract files with Your favorite compression software ( WinZip, WinRAR ... ) before viewing. If a document has multiple parts, You should download all, before extracting.
Good luck. Repair on Your own risk. Make sure You know what You are doing.
Image preview - the first page of the document
>> Download Lenovo 3000 - k40 - k41a - igt10 - igt11 compal_la-3451p_r0.1_schematics documenatation <<
Text preview - extract from the document
A B C D E
1 1
2
IGT30 2
Compal confidential
Schematics Document
Mobile Merom uFCPGA with Intel
3
Crestline_GM/PM+ICH8-M core logic 3
Monday, December 25, 2006
REV:0.1
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/08/04 Deciphered Date 2006/10/06 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom IGT30 LA-3571P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Sheet 1 of 47
A B C D E
A B C D E
ZZZ1
Compal confidential
File Name : LA-3451P LEFT SWITCH Board LEDs Board
14W_PCB
1
Mobile Merom 1
LVDS uFCPGA-478 CPU
Connector
page4,5,6 Clock Gen.
Nvidia N8M ICS9LPRS355
page15
H_A#(3..35)
FSB
H_D#(0..63) 667/800MHz
PCI-E X16
DDR2 -667 DDR2-SO-DIMM X2
Intel Crestline GMCH BANK 0, 1, 2, 3 page 13,14
CRT & TV OUT PCBGA 1299 Dual Channel
LVDS I/F
page17
page7,8,9,10,11,12 MO DEM
2
LVDS Ver 1.5 page 28 2
Connector page16 DMI C-Line
AMP&Audio Jack
AZALIA page30
PCI Express PCI-E BUS USB2.0
Mini card Slot
page28
Intel ICH8-M Audio Codec
mBGA-676 ALC 262H
SATA page29
3.3V / 33 MHz
PCI BUS
page19,20,21,22
ATA100
Finger printer
page36
BCM5906 BCM5787 1394+Card Reader CMOS Camera
10/100/1G LAN RICOH R5C832 LPC BUS page36
page27 page26
3 3
BlueTooth Conn
page28
RJ45 CONN 1394 Conn Card reader(XD/SD EC
MMC/MS/MS-Pro USB conn X4
page27 page26 ENE KB925/KB926 page31
HD SD) page26 page33
SUB Board page32,36
USB 3G
*1394 CONN page31
*RJ45 CONN Touch Pad Int.KBD USB Board
*DC JACK
*RJ11 CONN page32
*TVOUT CONN page32
SATA HDD
*MIC IN JACK
*USB CONN
*HP OUT JACK
*SWITCH BIOS page34
Connector page23
*LED
*SWITCH
PATA CDROM
Connector page23
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
2006/08/04 2006/10/06 Title
TP Board Issued Date Deciphered Date
Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom IGT30 LA-3571P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, December 25, 2006 Sheet 2 of 47
A B C D E
A
Voltage Rails O MEANS ON X MEANS OFF SKU ID Table
Vcc 3.3V +/- 5%
+5VS Ra 100K +/- 5%
+3VS Board ID Rb V AD_BID min V AD_BID typ V AD_BID max
power
+2.5VS
plane * 0 0 0 V 0 V 0 V
+1.8VS 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+B
+1.5VS 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
LDO3 +5VALW +1.8V
+1.25VS CLOCK 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
LDO5 +3VALW +5V
+VGA_CORE 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+0.9V
+CPU_CORE 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
State
+VCCP 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
7 NC 2.500 V 3.300 V 3.300 V
S0 O O O O O
S3
O O O X O
S5 S4/AC
O O X X O
S5 S4/ Battery only
O X X X X
S5 S4/AC & Battery
don't exist X X X X X
O MEANS ON S3 : STR
X MEANS OFF S4 : STD
S5 : SOFT OFF
1 BOM Structure USB PORT LIST 1
MARK FUNCTION
External PCI Devices @ NC FOR ALL PORT DEVICE
Device IDSEL# REQ#/GNT# Interrupts
GIGA@ BCM5787 0 LEFT SIDE
13 94 AD22 0 PIRQG/H
100@ BCM5906 1 WIRELESS
UMA@ Internal 965GM 2 RIGHT SIDE
VGA@ 965PM + Ext VGA 3 CMOS
Address
4 RIGHT SIDE
5 NEW CARD
6
EC SM Bus1 address EC SM Bus2 address 7 BT(HDL20)
Device Address Device Address
8
Smart Battery 0001 011X b ADM1032 1001 100X b
9 3G
EEPROM(24C16/02) 1010 000X b
ICH8 SM Bus address
Device Address
Clock Generator
( ICS954226) 1101 001Xb
DDRII DIMM0 1010 000Xb
DDRII DIMM1 1010 010Xb
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/08/04 Deciphered Date 2006/10/06 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom IGT30 LA-3571P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, December 25, 2006 Sheet 3 of 47
A
5 4 3 2 1
+3VS
XDP Reserve
XDP_DBRESET# 1 2 @ 1K_0402_5%
R157
+VCCP
XDP_TDI R158 1 2 150_0402_1%
XDP_TMS R159 1 2 39_0402_1%
XDP_TDO R163 1 2 @ 54.9_0402_1%
D D
XDP_BPM#5 R162 1 2 54.9_0402_1%
XDP_HOOK1 R161 1 2 @ 54.9_0402_1%
XDP_TRST# R155 1 2 560_0402_5%
7 H_A#[3..16]
JP1A XDP_TCK R156 1 2 27_0402_5%
H_A#3 J4 H1 H_ADS#
A[3]# ADS# H_ADS# 7
ADDR GROUP 0
H_A#4 L5 E2 H_BNR#
A[4]# BNR# H_BNR# 7
H_A#5 L4 G5 H_BPRI#
A[5]# BPRI# H_BPRI# 7
H_A#6 K5
H_A#7 A[6]# H_DEFER#
M3 A[7]# DEFER# H5 H_DEFER# 7
H_A#8 N2 F21 H_DRD Y#
A[8]# DRDY# H_DRDY# 7
H_A#9 J1 E1 H_DBSY#
A[9]# DBSY# H_DBSY# 7
H_A#10 N3
H_A#11 A[10]# H_BR0# R92
P5 A[11]# BR0# F1 H_BR0# 7
H_A#12 P2 56_0402_5%
A[12]#
CONTROL
H_A#13 L2 D20 H_IERR# 2 1
H_A#14 A[13]# IERR# H_INIT# +VCCP
P4 A[14]# INIT# B3 H_INIT# 20
H_A#15 P1
H_A#16 A[15]# H_LOCK#
R1 A[16]# LOCK# H4 H_LOCK# 7
H_ADSTB#0 M1
7 H_ADSTB#0 ADSTB[0]#
C1 H_RESET#
RESET# H_RESET# 7
H_REQ#0 K3 F3 H_RS#0
7 H_REQ#0 REQ[0]# RS[0]# H_RS#0 7
H_REQ#1 H2 F4 H_RS#1
7 H_REQ#1 REQ[1]# RS[1]# H_RS#1 7
H_REQ#2 K2 G3 H_RS#2
7 H_REQ#2 REQ[2]# RS[2]# H_RS#2 7
H_REQ#3 J3 G2 H_TRDY#
7 H_REQ#3 REQ[3]# TRDY# H_TRDY# 7
H_REQ#4 L1
7 H_REQ#4 REQ[4]#
G6 H_HIT#
7 H_A#[17..35] HIT# H_HIT# 7
H_A#17 Y2 E4 H_HITM#
C A[17]# HITM# H_HITM# 7 C
H_A#18 U5
H_A#19 A[18]# XDP_BPM#0
R3 A[19]# BPM[0]# AD4 T17 +3VS
ADDR GROUP 1
H_A#20 W6 AD3 XDP_BPM#1
A[20]# BPM[1]# T6
H_A#21 U4 AD1 XDP_BPM#2
XDP/ITP SIGNALS
A[21]# BPM[2]# T13 C535
H_A#22 Y5 AC4 XDP_BPM#3
A[22]# BPM[3]# T15
H_A#23 U1 AC2 XDP_BPM#4 1 2
A[23]# PRDY# T12
2
H_A#24 R4 AC1 XDP_BPM#5
A[24]# PREQ# T14
H_A#25 T5 AC5 XDP_TCK 0.1U_0402_16V4Z R445
A[25]# TCK T7
H_A#26 T3 AA6 XDP_TDI U24 10K_0402_5%
A[26]# TDI T9
H_A#27 W2 AB3 XDP_TDO H_THERMDA 2 1
A[27]# TDO T16 D+ VDD1
H_A#28 W5 AB5 XDP_TMS C536
T11
1
H_A#29 A[28]# TMS XDP_TRST# H_THERMDC THERM_SCI#
Y4 A[29]# TRST# AB6 T5 1 2 3 D- ALERT# 6 2 1 EC_THERM# 21,33
H_A#30 U2 C20 XDP_DBRESET# 2200P_0402_50V7K R442 @ 0_0402_5%
A[30]# DBR# XDP_DBRESET# 21
H_A#31 V4 EC_SMB_CK2 8 4 THERM# 2 1 +3VS
A[31]# 33 EC_SMB_CK2 SCLK THERM#
H_A#32 W3 10K_0402_5% R448 Check : to sb
A[32]# H_PROCHOT# 45
H_A#33 AA4 THERMAL H_PROCHOT# 2 1 EC_SMB_DA2 7 5
A[33]# +VCCP 33 EC_SMB_DA2 SDATA GND
H_A#34 AB2 R87 56_0402_5%
H_A#35 A[34]#
AA3 A[35]# PROCHOT# D21
H_ADSTB#1 V1 A24 H_THERMDA G781F_SOP8
7 H_ADSTB#1 ADSTB[1]# THERMDA
B25 H_THERMDC Address:100_1100
H_A20M# THERMDC
20 H_A20M# A6 A20M#
ICH
H_FERR# A5 C7 H_THERMTRIP#
20 H_FERR# FERR# THERMTRIP# H_THERMTRIP# 7,20
H_IGNNE# C4
20 H_IGNNE# IGNNE#
H_STPCLK# D5
20 H_STPCLK# STPCLK#
H_INTR C6 H CLK
20 H_INTR LINT0
H_NMI B4 A22 CLK_CPU_BCLK
20 H_NMI LINT1 BCLK[0] CLK_CPU_BCLK 15
H_SMI# A3 A21 CLK_CPU_BCLK#
20 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 15
M4 RSVD[01]
FAN1 Conn
N5 RSVD[02] H_THERMDA, H_THERMDC routing together,
T2 RSVD[03]
B
V3 Trace width / Spacing = 10 / 10 mil +5VS B
RSVD[04] +5VS
B2
RESERVED
RSVD[05]
C3 RSVD[06] 1 2
D2 C528 10U_1206_16V4Z
RSVD[07]
1
D22 RSVD[08]
D3 U23 D17
RSVD[09] @ 1SS355_SOD323
F6 RSVD[10] 1 VEN GND 8
2 VIN GND 7
+VCC_FAN1 3 6 D18
2
EN_FAN1 VO GND @ 1N4148_SOT23
33 EN_FAN1 4 VSET GND 5
Merom Ball-out Rev 1a 1 2
ME@ G993P1UF_SOP8
C532
10U_1206_16V4Z
1 2
+3VS C529
+VCCP 1000P_0402_50V7K
1 2
1
R427
1
10K_0402_5%
R85 40mil JP61
2
@ 56_0402_5% +VCC_FAN1
1
33 FAN_SPEED1
2 2
2
3
B
1
C531 ACES_85205-03001
E
H_PROCHOT# 3 1 OCP# 1000P_0402_50V7K ME@
OCP# 21
C
@ Q4
A MMBT3904_SOT23 2 A
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2006/08/04 Deciphered Date 2006/10/06 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Merom(1/3)-AGTL+/XDP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
◦ Jabse Service Manual Search 2024 ◦ Jabse Pravopis ◦ onTap.bg ◦ Other service manual resources online : Fixya ◦ eServiceinfo