Service Manuals, User Guides, Schematic Diagrams or docs for : Intel Edison galileo_fabh_schem_12-05-14
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CR-1 : @GALILEO_LIB.GALILEO(SCH_1):PAGE1
8 7 6 5 4 3 2 1
D
D
GALILEO GEN2
INTEL QUARK X1000
C C
FAB H
PB: H48142-207
B
PBA:H48125-800 B
A A
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE
GALILEO Gen2 DOCUMENT NUMBER REV
H38681 2.0
Thu Sep 11 08:52:51 2014 DESIGN TITLE PAGE
SHEET 1 OF 28
8 7 6 5 4 3 2 1
CR-2 : @GALILEO_LIB.GALILEO(SCH_1):PAGE2
8 7 6 5 4 3 2 1
TABLE OF CONTENTS
SHEET NUMBER SHEET NAME SHEET NUMBER SHEET NAME
1 DESIGN TITLE PAGE
D
2 TABLE OF CONTENTS D
3 DISCLAIMER
4 SYSTEM BLOCK DIAGRAM
5 QUARK DDR3 & PCIE
6 QUARK GPIO
7 QUARK MISC
8 QUARK POWER
9 QUARK DECOUPLING
10 SDRAM 1
11 SDRAM 2
12 SDRAM TERMINATION
13 MINI PCIE CONNECTOR
14 MICRO SD CONNECTOR
15 USB CONNECTORS
16 UART 1 & JTAG
C
17 LAN C
18 SPI: ADC&FLASH
19 QUARK STRAPS
20 EXTERNAL IO MUXING 1
21 EXTERNAL IO MUXING 2
22 LVL B BUFFER
23 LVL C BUFFER
24 AMUX & EXTERNAL IO
25 VOLTAGE REGULATORS
26 VOLTAGE REGULATORS
27 VOLTAGE REGULATORS
28 POWER BUTTONS & MISC
B B
A A
INTEL CORPORATION
2111 NE 25TH AVENUE
Thu Mar 03 10:58:31 2011 HILLSBORO OR 97124 DOCUMENT NUMBER: H38681
TITLE: GALILEO Gen2
TABLE OF CONTENTS REV: 2.0 SHEET 2 OF 28
8 7 6 5 4 3 2 1
CR-3 : @GALILEO_LIB.GALILEO(SCH_1):PAGE3
8 7 6 5 4 3 2 1
D
D
C C
B B
A A
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124 DOCUMENT NUMBER: H38681
TITLE: GALILEO Gen2
DISCLAIMER REV: 2.0 SHEET 3 OF 28
8 7 6 5 4 3 2 1
CR-4 : @GALILEO_LIB.GALILEO(SCH_1):PAGE4
8 7 6 5 4 3 2 1
D
D
C C
B B
A A
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124 DOCUMENT NUMBER: H38681
TITLE: GALILEO Gen2
SYSTEM BLOCK DIAGRAM REV: 2.0 SHEET 4 OF 28
8 7 6 5 4 3 2 1
CR-5 : @GALILEO_LIB.GALILEO(SCH_1):PAGE5
8 7 6 5 4 3 2 1
QUARK_X1000_R1P2
U2A5 BGA393
DDR3 M_DQ<15..0> BI 10C3<> 11C3<>
12D7<> 11C6< 10B6< BI
M_BS<2..0>
2 AR13 DDR3_BS<2> DDR3_DQ<15> AR11 15
1 AT26 DDR3_BS<1> DDR3_DQ<14> AT10 14
D 0 AP26 AN5 13
DDR3_BS<0> DDR3_DQ<13> D
DDR3_DQ<12> AT5 12
12A8<> 11B6< 10B6< OUT M_CAS_N AN29 DDR3_CASB DDR3_DQ<11> AP10 11
12B8<> 11B6< 10B6< OUT M_RAS_N AR27 DDR3_RASB DDR3_DQ<10> AR9 10
12A8<> 11B6< 10A6< OUT M_WE_N AP28 DDR3_WEB DDR3_DQ<9> AP4 9
12D7<> 11C3< 10C3<> M_MA<15..0> DDR3_DQ<8> AT3 8
BI
15 AT14 DDR3_MA<15> DDR3_DQ<7> AK12 7
14 AP14 DDR3_MA<14> DDR3_DQ<6> AH12 6
13 AR29 DDR3_MA<13> DDR3_DQ<5> AJ6 5
12 AR15 DDR3_MA<12> DDR3_DQ<4> AG6 4
11 AN15 DDR3_MA<11> DDR3_DQ<3> AH15 3
10 AN24 DDR3_MA<10> DDR3_DQ<2> AL15 2
9 AP16 DDR3_MA<9> DDR3_DQ<1> AK11 1
8 AR17 DDR3_MA<8> DDR3_DQ<0> AL11 0
7 AN17 DDR3_MA<7> M_DQS<1..0> 10C3<> 11C3<>
BI
6 AR20 DDR3_MA<6> DDR3_DQS<1> AN6 1
5 AN20 DDR3_MA<5> DDR3_DQS<0> AK7 0 VREF
4 AT21 DDR3_MA<4> M_DQS_N<1..0> BI 10C3<> 11C3<>
3 AP21 DDR3_MA<3> DDR3_DQSB<1> AR6 1
2 AR22 DDR3_MA<2> DDR3_DQSB<0> AH7 0 R3L6
1 AN22 DDR3_MA<1>
0 AR24 DDR3_MA<0> DDR3_DM<1> AP7 DDR3_DM1 11C3<
OUT 274 1%
DDR3_DM<0> AL12 DDR3_DM0 OUT 10C3< 0402LF CH
C AG30 DDR3_CK<1> R3L7 C
12D3< 11B6< 10D3< 10B6< BI
M_CK<0> AJ30 DDR3_CK<0>
DDR3_DRAMRSTB AL25 M_DRAMRST_N 10A6< 11B6<
BI 34 1%
AH29 DDR3_CKB<1> 0402LF CH
12C3< 11B6< 10C3< 10B6< M_CK_N<0> AL30 DDR3_CKB<0> DDR3_VREF AM29 R3L5
BI
DDR3_ODTPU AL19 DDR3_ODTPU
AP12 DDR3_CKE<1> DDR3_DQPU AH23 DDR3_DQPU
AN11 AK23 32.4 1%
12A8<> 11B6< 10B6< BI
M_CKE<0> DDR3_CKE<0> DDR3_CMDPU DDR3_CMDPU 0402LF CH
AT32 DDR3_ODT<1> RESERVED AK19 RSVD_0 R3L8
12A8<> 11B6< 10B6< M_ODT<0> AT31 DDR3_ODT<0> RESERVED AH19 RSVD_1 0 EMPTY
BI
AP31 DDR3_CSB<1> RESERVED AK17 RSVD_2 R3L9
12A8<> 11B6< 10B6< M_CS_N<0> AN31 DDR3_CSB<0> RESERVED AL17 RSVD_3 0 EMPTY
BI
V1P5_S0
V1P5_S0 6A6> 5A7> DDR_PWROK AK25 DDR3_IDRAM_PWROK RESERVED AT34
IN R2B1
6A6> 5A7> DDR_ISYSPWRGOOD AH25 DDR3_ISYSPWRGOOD RESERVED AR35 RSVD_4
IN
10K 5%
R2A8 PCIE 0402LF CH
1 2 PCIE_RBIAS R2A10
AJ3 PCIE_RBIAS PCIE_IRCOMP AJ1 PCIE_IRCOMP
7.5K 1% EMPTY 7.5K 1%
0402LF CH INTERNAL REFCLK USED ON PCIE AE2 PCIE_REFCLKP RESERVED AE10 RSVD_5 0 R3L10 0402LF CH
B AE4 AA10 B
PCIE_REFCLKN RESERVED RSVD_6 0 R3L14
0402LF EMPTY
ONLY 1 PCIE IS USED AK2 PCIE_PERP_1 PCIE_PETP_1 AH4
AK4 PCIE_PERN_1 PCIE_PETN_1 AH2
C3A4
13B3< PCIE0_RX0_P AM2 PCIE_PERP_0 PCIE_PETP_0 AD3 PCIE0_TX0_P_C PCIE0_TX0_P 13B3>
IN OUT
13B3< PCIE0_RX0_N AN1 PCIE_PERN_0 PCIE_PETN_0 AD1 PCIE0_TX0_N_C
IN 0.1UF 10%
1 OF 5 16V
X7R
0402LF
IC C3A3
PCIE0_TX0_N OUT 13B3>
0.1UF 10%
16V
X7R
0402LF
V1P5_S3
A A
1 R4L2 1 R4L1
1K 1K
1% 1%
2 CH 2 CH
0402LF 0402LF
1/16W 1/16W
DDR_PWROK OUT 5B7< 6A6>
DDR_ISYSPWRGOOD OUT 5B7< 6A6>
INTEL CORPORATION
2111 NE 25TH AVENUE H38681
HILLSBORO OR 97124 DOCUMENT NUMBER:
TITLE: GALILEO Gen2
QUARK DDR3 & PCIE REV: 2.0 SHEET 5 OF 28
8 7 6 5 4 3 2 1
CR-6 : @GALILEO_LIB.GALILEO(SCH_1):PAGE6
8 7 6 5 4 3 2 1
V3P3_S0
1 R3A13 1 R3A15
D 2.2K 2.2K
QUARK_X1000_R1P2 5% 5% D
2 CH 2 CH
0402LF 0402LF
U2A5 BGA393 1/16W 1/16W V3P3_S5
19D7> 18A4< OUT
SPI0_MOSI 33.2 R2B8 CH SPI0_MOSI_R AG35 SPI0_MOSI
18A1> IN
SPI0_MISO AG33 SPI0_MISO
I2C
ON-BOARD ADC AE34
AE32
SPI0_SS_B I2C_DATA B6
C7
I2C_SDA BI 13B2<> 20A2<> 20B4<>
19D5> 18B4< OUT
SPI0_SCK 33.2 R2B11 CH SPI0_SCK_R SPI0_SCK I2C_CLK I2C_SCL BI 13B2< 20A2< 20B4<>
21C6< 19D4> OUT
SPI1_MOSI 33.2 R2B9 CH SPI1_MOSI_R AH32 SPI1_MOSI
23B7< 23B1< 6C7<> IN SPI1_MISO AK34 SPI1_MISO
AJ33 SPI1_SS_B TCK M3 JTAG_TCK R2L21
SPI
IN 16A4>
21D3< 19D3> SPI1_SCK 33.2 R3M6 CH SPI1_SCK_R AH34 SPI1_SCK TDI N4 JTAG_TDI 16A5> 49.9
OUT IN 1%
TDO R1 JTAG_TDO OUT 16A5<
TMS N2 JTAG_TMS 16B4> TP1 TP2 EMPTY
IN 0402LF
19B1> 18D6< OUT
LSPI_MOSI_R AK32 LSPI_MOSI TRST_B L4 JTAG_TRST_N IN 16A5>
18C1> IN LSPI_MISO AN35 LSPI_MISO CAD NOTE:
18C6< OUT
LSPI_CS_N_R AM33 LSPI_SS_B
19A6> 18C6< LSPI_SCK_R AM35 LSPI_SCK PLACE NEAR QUARK
OUT
PRDY_B E7 PRDY_B
PREQ_B B2 PREQ_B
DFX
22A2> 21D3< BI
MUX8_I0 1K R2M5 CH MUX8_I0_R J15 GPIO_SUS<5>
C 23C7< 23C2<> BI
LVL_C_A2 1K R39 CH LVL_C_A2_R G15 GPIO_SUS<4> RESERVED AT2 TP0 C
22B2> 21B6< BI
MUX5_I0 1K R12 CH MUX5_I0_R E15 GPIO_SUS<3> RESERVED AR1 TP1
22C2> 21A8< BI
MUX3_I0 1K R3M2 CH MUX3_I0_R J12 GPIO_SUS<2>
13B6< 13A7< BI
WIFI_DISABLE_N E12 GPIO_SUS<1>
13B6< 13A6< BI
PCIE_RESET_N G11 GPIO_SUS<0>
22C2> 21B8< BI
MUX2_I0 1K R2B21 CH MUX2_I0_R W33 GPIO<9>
22D2> 21C8< MUX1_I0 1K R2B20 CH MUX1_I0_R V34 GPIO<8> TP2A2 R3L2
BI TP2A1
GPIO
23B7< 23B1< 6C7< BI SPI1_MISO 1K R3M14 CH SPI1_MISO_R V32 GPIO<7> 2
U33 T_POINT1 T_POINT1
22D2> 21D8< BI
MUX0_I0 1K R3M10 CH MUX0_I0_R GPIO<6> 1M 5%
23D2<> 23C7< 21B3< BI
LVL_C_A1 1K R3M8 CH LVL_C_A1_R T34 GPIO<5> 1 1 0402LF CH
22A2> 21A6< BI
MUX7_I0 1K R3M5 CH MUX7_I0_R T32 GPIO<4>
23D2<> 23C7< 7B7< IN
UART0_RXD 1K R3M13 CH GPIO3_R R35 GPIO<3> TP TP
22B2> 21B6< BI
MUX6_I0 1K R2B7 CH MUX6_I0_R R33 GPIO<2>
20B5> IN
EXP2_INT 33.2 R2B29 CH EXP2_INT_R N34 GPIO<1> Y3L1
18A5< OUT
SPI0_CS_N 33.2 R2B14 CH SPI0_CS_N_R N32 GPIO<0> XTAL_IN AA2 CLN_XTAL_IN
XTAL_OUT AB1 CLN_XTAL_OUT 25.000MHZ
G3 RTCX2 RESERVED B1 RSVD_7 R3A24
C2A6 0
2 RTCX1 J2 RTCX1 RESERVED A2 RSVD_8 EMPTY
18PF 5% J11
0402LF COG 1
VCCRTCEXT IVCCRTCEXT XTAL
RTC
Y2A1 1 R2A9 REF0_OUTCLK 100MHZ G91801-001
B 10M J7 M8 C3L5 C3L6 B
32.768KHZ 5% RTCRST_B REF0_OUTCLK_P REFCLK0_P OUT 13C3< 18PF 18PF
2 CH RTC32K_CLK_SEL E11 RTC_EXT_CLK_EN_B REF0_OUTCLK_N M6 REFCLK0_N OUT 13C3< 5% 5%
CRU/PLL
XTAL 0402LF S0_PGOOD A4 S0_PG 50V 2 2 50V
C3A10 2 28A5> 6A6< IN R3L11 COG COG
2 RTCX2 1/16W 25D3> 6A6< IN
S5_PGOOD G7 S5_PG REF1_OUTCLK_P J6 REF1_P 0402LF 0402LF
REF1_OUTCLK_N H6 REF1_N 110 CH
18PF 5%
0402LF COG CAD NOTE:
CKSYS25OUT W7 CKSYS25OUT
TRACE TO CRYSTAL HAS 28D7> RESET_N D6 RESET_BTN 25MHZ - NOT USED
TO BE LENGTH MATCHED IN
19A3> IN
EC_PWRBTN_N L2 PWR_BTN FLEX0_CLK V4 FLEX0_CLK
13B8> IN
WAKE_N A5 WAKE_B FLEX1_CLK V2 FLEX1_CLK
B4 GPE_B FLEX2_CLK U3 FLEX2_CLK
V3P3_RTC GPE_N NOT USED (INTERNAL PU) R2A5
S3_1V5_EN K1 S3_1V5_EN RMII_REF_CLK_OUT T4 RMII_REF_CLK_R RMII_REF_CLK_OUT
PWRMGMT
28A8< 26B5< OUT OUT 17B8<
26D5< OUT S3_3V3_EN K3 S3_3V3_EN 00
28A6> 6A6< IN S3_PGOOD J4 S3_PG 0402LF CH
R2L9 OSC_COMP W3 OSC_COMP R2A12 R2A13 R2A14 R3L13
2 RTCRST_N 28C5< 28B8< 26A8< 6A6< S0_1V0_EN F4 S0_1V0_EN R3L3 49.9 49.9 49.9 49.9
OUT 1% 1% 1% 1%
10K 5% 28B7< 27C6< 26B3< OUT
S0_1V5_EN F2 S0_1V5_EN HPLL_REFCLK_P V7 EXT_REFCLK_HPLL CH CH CH CH
0402LF CH 26D3< OUT
S0_3V3_EN E4 S0_3V3_EN HPLL_REFCLK_N V5 10K 5% 0402LF
28B6> 6A6< IN PG_V1P0_S0 D2 S0_1P0_PG 0402LF CH 1/16W
C3L13 C2L1 AF11 RSVD_9 R3L12
0.1UF C3L8 1UF RESERVED 0 NOT USED
10% 1UF 10% J30 VNNSENSE RESERVED AD11 RSVD_10 EMPTY V1P5_S5
16V 6.3V H30
2 X7R 10%
6.3V V3P3_RTC 2 X5R VSSSENSE
0402LF 2 X5R 0402LF PAD_BYPASS_CLK AC4
A R3 A
0402LF 5B7< 5A7> OUT
DDR_PWROK ODRAM_PWROK
5B7< 5A7> OUT
DDR_ISYSPWRGOOD T2 OSYSPWRGOOD 2 OF 5 1 R2A11
R2L10 7.5K
2 1%
IC 2 CH
TP4 0402LF
RTC_EXT_CLK_EN_B 1K 1%
0402LF EMPTY
R2L11 T_POINT1
10K 25D3> 6B6< S5_PGOOD 1
0: EXTERNAL CLOCK FROM RTCX1/RTXC2 5% TP5
1: INTERNAL CLOCK CH
0402LF
T_POINT1
1
TP7 INTEL CORPORATION
28A6> 6A6< S3_PGOOD T_POINT1 2111 NE 25TH AVENUE
28A5> 6B6< S0_PGOOD 1 HILLSBORO OR 97124
TP6
T_POINT1
1
TP8
T_POINT1
TITLE
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