Service Manuals, User Guides, Schematic Diagrams or docs for : LENOVO Laptop Lenovo Ideapad Y650 Compal LA-4551P KIWB3 B4 rev_0.1
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A B C D E
1 1
2
KIWB3/B4 2
Schematics Document
Mobile Penryn uFCPGA with Intel
3
Cantiga_GM/PM+ICH9-M core logic 3
REV:0.1
4 4
Security Classification Compal Secret Data Compal Electronics,Ltd.
Issued Date 2008/03/25 Deciphered Date 2008/04/ Title
Cover Sheet
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KIWB3/B4_LA4551P
D ate: Friday, June 27, 2008 Sheet 1 of 49
A B C D E
A B C D E
ZZZ1
Compal confidential Slide Bar & Mute & LEDS
File Name : POWER BD NOVO BD
16W_PCB_LA4551P
NOVO X1 VOL DOWN X1
Power on X1 VOL UP X1
LED X1 MUTE X1
:POWER Right MIC X1
V RAM 32*32 Mobile Penryn Left MIC X1 CIR BD
1 DD R3X2 Killer SW X1 1
page20 uFCPGA-478 CPU Clock Gen. CIR X 1
PCI-E X16 SLG8SP556VTR LED X 3 USB_C/R Board
ICS9LPRS387AKLFT USB X 2
NVidia NB9M page5,6,7 page21 LED
Power Status Lid SW X 1
page16,17,18,19
Realtek 5158E
H_A#(3..35) FSB Battery status
H_D#(0..63) 667/800/1066MHz MS/MS
Double check ME Wireless Status
HDMI PS81 01T PCI-E DDR3-800(1.5V) pro/SD/SD
CONN pro/mmc/XD
Intel Cantiga GMCH DDR3-1067(1.5V) DDR3-SO-DIMM X2
page22
page22
BANK 0, 1, 2, 3 LED
page 14,15
:IDEAPAD
CRT PCBGA 1329 Dual Channel UP TO 8G
LVDS I/F
page24
page 8,9,10,11,12,13
2 2
LV DS
Connector page23 DMI C-Line
PCI Express AZALIA Audio Codec
Realtek ALC269Q HP X 1+
Mini card Slot 1 6*PCI-E BUS Intel ICH9-M
page29
12*USB2.0
page33
MIC_Ext X1 page34
N one mBGA-676
PCI Express PCI BUS CMOS Camera 2Channel MIC_Int
4*SATA serial page38 page39
New Card
Mini card Slot 2 page29 3.3V / 33 MHz page25,26,27,28
page29 BlueTooth CONN 2Channel Speaker
page38 page34
PCI Express LPC BUS
Mini card Slot 3 USB CONN X1
page38
3
page29 3
EC New Card X1
BCM5906/BCM5784M ENE KB926D page29
10/100/1G LAN page35
SIM Card page30 M-PCIE CONN X 3
page29
page29
Int.KBD USB CONN X2-Sub
RJ45 CONN page38
page31 page36
Touch Pad BIOS C/R-Sub page38
page36
page37 SATA HDD CONN
page32
HDD/ODD,SCL & T/L LED on MB SATA ODD CONN
4 CAPS and NUM on KBD page32 4
E-SATA CONN
page32
Security Classification Compal Secret Data
Title
Compal Electronics, Inc.
Issued Date 2008/03/24 Deciphered Date 2008/04/
THISSHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MB Block Diagram
Size D oc um ent Num ber R ev
ANDTRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C u s tom 0 .1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAYBEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KIWB3/B4_LA4551P
D ate: F r i day, June 27, 2008 Sheet 2 of 49
A B C D E
A B C D E
DDR3 Voltage Rails
+5VS
+3VS
+1.5VS
power
plane +1.1VS SMBUS, SPI and I2C Control Table
+VCCP
1 1
+5VALW +1.5V +CPU_CORE SERIAL NEW CLK CAP Mini Mini THERMAL THERMAL
SOURCE HDMI LVDS CRT HDCP EEPROM BATT SENSOR SENSOR
+B +1.8V +VGA_CORE CARD GEN sensor CARD1 CARD2 (VGA) (CPU)
+3VALW +0.75V +1.8VS
EC_SMB_CK1
EC_SMB_DA1
KB926 X X X X V X X X X X V X X
State
EC_SMB_CK2
EC_SMB_DA2
KB926 X X X X X X X V X X X V V
ICH_SMBCLK
ICH_SMBDAT ICH9 X X X X X V V X V V X X X
LVDS_SCL
S0 O O O O
LVDS_SDA Cantiga
X V X X X X X X X X X X X
GMCH_CRT_CLK
S1 O O O O GMCH_CRT_DAT Cantiga
X X V X X X X X X X X X X
HDMICLK_NB
S3 O O O X HDMIDAT_NB Cantiga
V X X X X X X X X X X X X
2
S5 S4/AC O O X X
VGA_DDCCLK
VGA_DDCDATA VGA X X V X X X X X X X X X X 2
S5 S4/ Battery only O X X X
VGA_LVDS_SCL
VGA_LVDS_DAT VGA X V X X X X X X X X X X X
VGA_HDMI_SCL
S5 S4/AC & Battery
don't exist X X X X VGA_HDMI_DAT VGA
V X X X X X X X X X X X X
HDCP_SMB_CK1
HDCP_SMB_DA1 VGA X X X X V X X X X X X X X
FSEL#SPICS#_SB
FRD#SPI_SO_SB
SPI_CLK_SB
FWR#SPI_SI_SB
ICH9 X X X X V X X X X X X X X
PM@ , GM@ , N9@ , N10@ FSEL#SPICS#
FRD#SPI_SO
SPI_CLK
FWR#SPI_SI
KB926 X X X X V X X X X X X X X
3 3
4 4
Security Classification Compal Secret Data
Title
Compal Electronics, Inc.
Issued Date 2008/03/24 Deciphered Date 2008/04/
THISSHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MB Notes List
Size D oc um ent Num ber R ev
ANDTRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0 .1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAYBEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KIWB3/B4_LA4551P
D ate: F r i d ay, June 27, 2008 Sheet 3 of 49
A B C D E
A B C D E
VGA and DDR2 Voltage Rails (NB9M-GS) EDP at Tj = 97C*
Power Supply Rail NB9M-GS NB9M-GE
(V) GDDR3 DDR2 GDDR3 DDR2
NVVDD Variable 11.22A 10.87A 9.2A 8.88A
FB_DLLAVDD 1.1 25mA
power FB_PLLAVDD 1.1 10mA
plane +3VS IFPC_IOVDD 1.1 385mA
1 1
+1.8V +VGA_CORE IFPD_IOVDD 1.1 385mA
+1.1VS IFPE_IOVDD 1.1 385mA
IFPF_IOVDD 1.1 385mA
PEX_IOVDD/Q 1.1 1550mA
PEX_PLLVDD 1.1 165mA
State
PLLVDD 1.1 55mA
SP_PLLVDD 1.1 25mA
VID_PLLVDD 1.1 50mA
TOTAL 1.1 3.425A
FBVDD/Q 1.8 2.24A 1.65A 2.17A 1.63A
S0 IFPA_IOVDD 1.8 50mA
O O O O
IFPB_IOVDD 1.8 50mA
S1 IFPAB_PLLVDD 1.8 100mA
O O O O
IFPCD_PLLVDD 1.8 160mA
S3 IFPEF_PLLVDD 1.8 160mA
2
O O O X 2
TOTAL 1.8 2.76A 2.17A 2.69A 2.15A
S5 S4/AC O O X X DACA_VDD 3.3 110mA
DACB_VDD 3.3 125mA
S5 S4/ Battery only O X X X DACC_VDD 3.3 110mA
MIOA_VDDQ 3.3 10mA
S5 S4/AC & Battery
don't exist X X X X MIOB_VDDQ 3.3 10mA
VDD33 3.3 80mA
TOTAL 3.3 0.445A
POWER SQUENCE
The ramp time for any rail must be more than 40us
3 3
(+3VS) VDD33
PEX_VDD can ramp up any time
(1.1VS) PEX_VDD
tNVVDD>=0
(+VGA_CORE) NVVDD
tNV-FB
tFBVDDQ>=0
4
(1.8VS) FBVDDQ 4
Security Classification Compal Secret Data
Title
Compal Electronics, Inc.
Issued Date 2008/03/24 Deciphered Date 2008/04/
THISSHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VGA Notes List
Size D oc um ent Num ber R ev
ANDTRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0 .1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAYBEUSED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KIWB3/B4_LA4551P
D ate: F r i d ay, June 27, 2008 Sheet 4 of 49
A B C D E
5 4 3 2 1
USE->56,NOT USE->50 XDP Reserve
+V CCP + 3VS
H _ IE RR# R1 1 2 4 9 .9 _ 0 4 0 2 _ 1 % X D P _ DB RE S E T # R2 1 2 @ 1 K_0402_5%
H_P ROCHOT# R3 1 2 5 6_0402_5%
+ V CCP
X D P _ T DI R4 1 2 5 4 .9 _ 0 4 0 2 _ 1 %
USE->68,NOT USE-->56
D X DP _ T MS R5 1 2 5 4 .9 _ 0 4 0 2 _ 1 % D
JCP U1A
X D P _ T DO R6 1 2 @ 5 4 .9 _ 0 4 0 2 _ 1 %
H _ A#3 J4 H1 H_ A D S#
< 8 > H _ A # [ 3 ..1 6 ] A[3]# ADS# H _ A D S # <8>
H _ A#4 L5 E2 H _B NR# X DP _ T RS T # R7 1 2 5 4 .9 _ 0 4 0 2 _ 1 %
A[4]# BNR# H _ B N R # <8>
ADDR GROUP_0
H _ A#5 L4 G5 H _ B P R I#
A[5]# BPRI# H _ B P R I# <8>
H _ A#6 K5 H5 H_DE FE R# X DP _ T CK R8 1 2 5 4 .9 _ 0 4 0 2 _ 1 %
A[6]# DEFER# H _ D E F E R # < 8>
H _ A#7 M3 F21 H _ D R DY #
A[7]# DRDY# H _ D R D Y # < 8>
H _ A#8 N2 E1 H_DB S Y #
A[8]# DBSY# H _ D B S Y # <8>
H _ A#9 J1 F1 H _ B R 0#
A[9]# BR0# H _ B R 0 # <8>
H _ A#10 N3 D20 H _ IE RR#
H _ A#11 A[10]# IERR# H_ INI T#
P5 B3 H _ I N I T # <2 6 >
H _ A#12 A[11]# INIT# H_ L OC K#
P2 H4 H _ L O C K # <8>
H _ A#13 A[12]# LOCK# H_ R ESET#
L2 C1 H _ R ESET# < 8>
H _ A#14 A[13]# RESET# H _ R S #0
P4 F3
CONTROL
A[14]# RS[0]# H _ R S # 0 <8>
H _ A#15 P1 F4 H _ R S #1
A[15]# RS[1]# H _ R S # 1 <8>
H _ A#16 R1 G3 H _ R S #2
A[16]# RS[2]# H _ R S # 2 <8>
H _ A DS T B # 0 M1 G2 H _TRDY #
< 8 > H _ A DS T B # 0 ADSTB[0]# TRDY# H _ T R D Y # <8>
H _ R E Q #0 K3 G6 H_ HI T#
< 8> H _ R E Q #0 REQ[0]# HIT# H _ H I T # <8>
H _ R E Q #1 H2 E4 H _ H I T M#
< 8> H _ R E Q #1 REQ[1]# HITM# H _ H I T M# <8>
H _ R E Q #2 K2
< 8> H _ R E Q #2 REQ[2]#
H _ R E Q #3 J3
< 8> H _ R E Q #3 REQ[3]#
H _ R E Q #4 L1
< 8> H _ R E Q #4 REQ[4]#
H _ A#17 Y2
< 8 > H _ A # [ 1 7 ..3 5 ] A[17]#
H _ A#18 U5
H _ A#19 A[18]# X DP _ B P M# 0 +3 V S +3 V S
R3 AD4
A[19]# BPM[0]#
ADDR GROUP_1
C H _ A#20 W6 AD3 X DP _ B P M# 1 C
H _ A#21 A[20]# BPM[1]# X DP _ B P M# 2
U4 AD1
1
H _ A#22 A[21]# BPM[2]# X DP _ B P M# 3
Y5 AC4 1
H _ A#23 A[22]# BPM[3]# X DP _ B P M# 4
XDP/ITP SIGNALS
U1 AC2
H _ A#24 A[23]# PRDY# X DP _ B P M# 5 C1 U1 @ R9
R4 AC1
H _ A#25 A[24]# PREQ# X DP _ T CK 0 .1 U _0402_16V4Z 1 0K_0402_5%
T5 AC5
H _ A#26 A[25]# TCK X D P _ T DI 2
T3 AA6
2
H _ A#27 A[26]# TDI X D P _ T DO E C _ S MB _ CK 2
W2 AB3 1 8 E C _ S MB _ CK 2 < 1 6 ,2 3 ,3 5 ,3 9 >
H _ A#28 A[27]# TDO X DP _ T MS VDD SMCLK
W5 AB5
H _ A#29 A[28]# TMS X DP _ T RS T # H _ T H E R M DA E C _ S MB _ DA 2
Y4 AB6 2 7 E C _ S MB _ DA 2 < 1 6 ,2 3 ,3 5 ,3 9 >
H _ A#30 A[29]# TRST# X D P _ DB RE S E T # DP SMDATA
U2 C20 X D P _ DB RE S E T # < 2 7 >
H _ A#31 A[30]# DBR# H _THE RMDC
V4 1 2 3 6
H _ A#32 A[31]# C2 2 2 0 0 P _ 0 4 0 2 _ 5 0 V 7K DN ALERT#
W3
H _ A#33 A[32]# H_P ROCHOT# T H E RM#
AA4
A[33]#
TH E RMAL 4
THERM# GND
5
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