Service Manuals, User Guides, Schematic Diagrams or docs for : Quanta Quanta_R12_hp_pavilion_g4_g6_g7_rev_1a_sch
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1 2 3 4 5 6 7 8
R12 INTEL UMA/DISCRETE SYSTEM DIAGRAM
+3V/+5V
A A
PG.31
+1.05VTT/+1.8V SODIMM1 DDR3 INTEL 14.318MHz
Max. 4GB
PG.32
PG.12
Channel A
Arrandale AMD CLOCK GEN
PG.2
CPU Core PCI-E x8 Seymour-XT
37.5mm X 37.5mm
PG.33 SODIMM2 DDR3 989pin PGA
VGACore/+1.1V Max. 4GB
Channel B TDP 35W
PG.13
PG.34
PG.3~6 PG.14~18
+1.5VSUS DDR3 900MHz
FDI DMI
B
PG.35 VRAM B
64Mx16x4,64bit PG.19
Charger SATA0
PG.36 HDD PG.23 HDMI
Discharger Level
SATA1 Shifter HDMI PG.21
PG.37
ODD PG.23
INTEL PCH DP Port B PG.21
UMA VGACORE CRT
PG.38
Ibex Peak-m CRT PG.22
LVDS LVDS PG.20
27mm X 25mm
LAN3 LAN2 LAN1
C
1071pin FCBGA USB2.0 Ports Webcam BT C
Card reader LAN WLAN USB 2.0 TDP 5W X2 PG.26 PG.20 Softbreeze
PG.26
RTS5219-GR RTS8165EH BT COMBO PORT10 PORT0,1 PORT4 PORT13
10/100 PG.24 10/100 PG.27 PG.30 USB 2.0
Stackup
KBC LPC PG.7~11 TOP
EnE KB3930QF D2 PG.29
GND
Azalia
IN1
KB TP ROM FAN IN2
Speaker
AUDIO PG.25 VCC
D
CODEC BOT D
HP/MIC
PG.26
IDT92HD80B1
Analog MIC
PG.25 PG.25
Size Document Number Rev
Custom 1A
BLOCK DIAGRAM
Date: Tuesday, September 14, 2010 Sheet 1 of 39
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
25mA 150mA 150mA
02
+3V +VDDCORE_CLK Y6
+1.05V +VDDIO_CLK +3V +VDDSE_CLK L53 XTAL_IN 1 2XTAL_OUT +3V
L56 L57 1 2 C733 4.7U/6.3V_6
1 2 C742 0.1U/10V_4 1 2 C704 4.7U/6.3V_6 *HCB1608KF-181T15/1.5A_6
14.318MHZ
1
1
HCB1608KF-181T15/1.5A_6 C723 0.1U/10V_4 HCB1608KF-181T15/1.5A_6 C731 0.1U/10V_4 +1.5V C729 0.1U/10V_4
C747 10U/6.3VS_6 C705 0.1U/10V_4 L54 C711 0.1U/10V_4 C702 C703 R474
A A
C746 *10U/6.3V_8 1 2 C716 0.1U/10V_4 33P/50V_4 33P/50V_4 *10K_4
2
2
HCB1608KF-181T15/1.5A_6
Place each 0.1uF cap close to pin Place each 0.1uF cap close to pin Place each 0.1uF cap close to pin CPU_SEL
R476
0510 add for WiMAX 10K_4
close to U13
C714 *3.3P/50V_4
CLK_BUF_BCLK_P CLK_BUF_BCLK_N 0 1
CPU_SEL CPU0/1=133MHz CPU0/1=100MHz
(default)
U29
+VDDSE_CLK 5 23 CLK_BUF_BCLK_P CLK_BUF_BCLK_P <8>
VDD_LCD CPU-0 CLK_BUF_BCLK_N
29 VDD_REF CPU-0# 22 CLK_BUF_BCLK_N <8>
+VDDCORE_CLK 1 VDD_USB CPU-1 20
2 1 17 VDD_SRC CPU-1# 19
C722 *0.047U/10V_4 24
+VDDIO_CLK 18
VDD_CPU
9LRS3197 3 CLK_BUF_DREFCLK CLK_BUF_DREFCLK <8>
+3V
VDD_CPU_IO DOT96T_LPR CLK_BUF_DREFCLK#
B 2 1 15 VDD_SRC_IO DOT96C_LPR 4 CLK_BUF_DREFCLK# <8> B
C737 *0.047U/10V_4
<8,12,13> CGDAT_SMB 31 13 CLK_BUF_PCIE_3GPLL CLK_BUF_PCIE_3GPLL <8>
SDATA SRC-1 CLK_BUF_PCIE_3GPLL# R493
<8,12,13> CGCLK_SMB 32 SCLK SRC-1# 14 CLK_BUF_PCIE_3GPLL# <8>
1K_4
+3V R494 10K_4 16 10 CLK_BUF_DREFSSCLK CLK_BUF_DREFSSCLK <8>
CLK_ICH_14M R478 33_4 CPU_SEL CPU_STOP# SATA CLK_BUF_DREFSSCLK#
<8> CLK_ICH_14M 30 REF_0/CPU_SEL SATA# 11 CLK_BUF_DREFSSCLK# <8>
C708 *10P/50V_4 CK_PWRGD_R
CK_PWRGD_R 25 6 CLK_VGA_27M_NOSS R491 *22_4 PCH_CLK_27M_1
CK_PW RGD/PD#_3.3 27MHz_nonSS
Place R8044 within 0.5" of C/G 27MHz_SS 7 0918 SI Modify
3
XTAL_OUT 27 UMA remove Q39
XTAL_IN XOUT CLK_VGA_27M_SS 2N7002E
28 33
9
XIN
VSS_SATA
QFN32 GND
VSS_REF 26 8/25 SI for H/W
T46
R495
2 VSS_USB VSS_CPU 21 Discrete only <33> VR_PWRGD_CLKEN# 2 100K_4
8 VSS_LCD VSS_SRC 12
ICS9LVS3197
1
AL003197001
IC OTHER(32P) ICS9LVS3197AKLFT(MLF)
Vender Part Part Number Part Description
ICS ICS9LVS3197 AL003197000 IC OTHER(32P) ICS9LVS3197AKLFT(MLF)
Realtek RTM890N-632 AL000890000 IC OTHER(32P) RTM890N-632-GRT(QFN)
Silego SLG8LV595VTR AL000595000 IC OTHER(32P)SLG8LV595VTR(QFN) +3V
C
8/25 SI for H/W UMA remove C
C741 *0.1U/10V_4
DGPU_PWROK <10,17,29,34,35>
5
1
U30
PCH_CLK_27M_1 2 4 PCH_CLK_27M <15>
*74LVC1G126
+1.05V <7,8,9,11,39>
+1.5V <5,30>
+3V <3,7,8,9,10,11,12,13,14,17,20,21,22,23,24,25,27,28,29,30,33,34,36>
D D
Size Document Number Rev
Custom 1A
Clock Gen(9LRS3197)
Date: Sunday, September 19, 2010 Sheet 2 of 39
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
DIS UMA
<9> DMI_TXN0 A24
U15A
DMI_RX#[0]
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
B26 PEG_COMP R288
A26
B27
49.9/F_4
Ra
Rb
Rc
NA 0 ohm
0 ohm NA
0 ohm NA
03
<9> DMI_TXN1 C23 DMI_RX#[1] PEG_RBIAS A25 PEG_RBIAS R289 750/F_4
<9> DMI_TXN2 B22 DMI_RX#[2] PEG_RX#[0..7] <14>
<9> DMI_TXN3 A21 K35 PEG_RX#0 U15B
DMI_RX#[3] PEG_RX#[0] PEG_RX#1 R139 20/F_4 H_COMP3 AT23
PEG_RX#[1] J34 COMP3 BCLK A16 CLK_CPU_BCLK <10>
<9> DMI_TXP0 B24 J33 PEG_RX#2 R142 20/F_4 H_COMP2 AT24 B16 CLK_CPU_BCLK# <10>
DMI_RX[0] PEG_RX#[2] PEG_RX#3 R81 49.9/F_4 H_COMP1 G16 COMP2 BCLK#
A <9> DMI_TXP1 D23 DMI_RX[1] PEG_RX#[3] G35 COMP1 MISC A
<9> DMI_TXP2 B23 G32 PEG_RX#4 R143 49.9/F_4 H_COMP0 AT26 AR30 For ITP CLk
DMI_RX[2] PEG_RX#[4] PEG_RX#5 COMP0 BCLK_ITP
<9> DMI_TXP3 A22 DMI_RX[3] PEG_RX#[5] F34 AH24 SKTOCC# BCLK_ITP# AT30 CLK_PCIE_3GPLL <8>
F31 PEG_RX#6 CLK_PCIE_3GPLL# <8>
PEG_RX#[6] PEG_RX#7
D24 D35
CLOCKSPEG_CLK# E16 Rc
<9>
<9>
DMI_RXN0
DMI_RXN1 G24
F23
DMI_TX#[0]
DMI_TX#[1] DMI PEG_RX#[7]
PEG_RX#[8] E33
C33
H_CATERR# AK14
AT15
CATERR#
PEG_CLK
D16
Ra
<9> DMI_RXN2 DMI_TX#[2] PEG_RX#[9] <10> H_PECI PECI
<9> DMI_RXN3 H23 D32 <29,33> H_PROCHOT# AN26 THERMAL A18 DREFSSCLK_R DREFSSCLK <8>
DMI_TX#[3] PEG_RX#[10] PROCHOT# DPLL_REF_SSCLK DREFSSCLK#_R
PEG_RX#[11] B32 <10,29> PM_THRMTRIP# AK15 THERMTRIP# DPLL_REF_SSCLK# A17 DREFSSCLK# <8>
<9> DMI_RXP0 D25 DMI_TX[0] PEG_RX#[12] C31 Rb
<9> DMI_RXP1 F24 DMI_TX[1] PEG_RX#[13] B28
<9> DMI_RXP2 E23 B30 H_CPURST# AP26 F6 DDR3_DRAMRST#_C
DMI_TX[2] PEG_RX#[14] T31 RESET_OBS# SM_DRAMRST#
<9> DMI_RXP3 G23 DMI_TX[3] PEG_RX#[15] A31 <9> PM_SYNC AL15 PM_SYNC
J35 PEG_RX0
PEG_RX[0..7] <14> AN14
AN27
VCCPWRGOOD_1 DDR3 SM_RCOMP[0] AL1 SM_RCOMP_0
AM1 SM_RCOMP_1
R363
R364
100/F_4
24.9/F_4
PEG_RX[0] <10> H_PW RGOOD VCCPWRGOOD_0
2.7GT/s data rate PEG_RX[1] H34
H33
PEG_RX1
PEG_RX2
<9> PM_DRAM_PW RGD AK13 SM_DRAMPWROK MISC SM_RCOMP[1]
SM_RCOMP[2] AN1 SM_RCOMP_2 R365
R176
130/F_4
10K_4
<9> FDI_TXN[7:0] PEG_RX[2] +1.05V_VTT
FDI_TXN0 E22 F35 PEG_RX3 H_PW RGD_XDP AM26 AN15 PM_EXT_TS#0
R177 *0_4/S PM_EXTTS#0 <12,13>
FDI_TX#[0] PEG_RX[3] T45 TAPPWRGOOD PM_EXT_TS#[0]
FDI_TXN1 D21 G33 PEG_RX4 AP15 PM_EXT_TS#1
R166 *0_4/S PM_EXTTS#1 <13>
FDI_TXN2 FDI_TX#[1] PEG_RX[4] PEG_RX5 H_VTTPW RGD AM15 PM_EXT_TS#[1] R168 10K_4
D19 FDI_TX#[2] PEG_RX[5] E34 VTTPWRGOOD +1.05V_VTT
FDI_TXN3 D18 F32 PEG_RX6 <8,14,24,27,29,30> PLTRST# CPU_PLTRST# AL14
FDI_TXN4 FDI_TX#[3] PEG_RX[6] PEG_RX7 R124 1.5K/F_4 RSTIN# XDP_PRDY#
G21 FDI_TX#[4] PEG_RX[7] D34 PRDY# AT28 T44
FDI_TXN5 E19 F33 AP27 XDP_PREQ#
FDI_TXN6 F21
FDI_TX#[5]
Intel(R) FDI PEG_RX[8]
B33 R126 750/F_4 PWR MANAGEMENT
PREQ#
AN28 XDP_TCLK
T28
T25
PCI EXPRESS -- GRAPHICS
FDI_TXN7 FDI_TX#[6] PEG_RX[9] TCK
G18 FDI_TX#[7] PEG_RX[10] D31
A32 AP28 XDP_TMS T27
PEG_RX[11] TMS
<9> FDI_TXP[7:0] PEG_RX[12] C30
FDI_TXP0 D22 A28 AT27 XDP_TRST#
B
FDI_TXP1
FDI_TXP2
C21
D20
FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
B29
A30
AJ22
AK22
BPM#[0]
BPM#[1]
JTAG & BPM TRST#
TDI AT29 XDP_TDI_R
T32
T33 B
FDI_TXP3 C18 PEG_TX#[0..7] <14> AK24 AR27 XDP_TDO_R T30
FDI_TXP4 FDI_TX[3] C_PEG_TX#0 C543 PEG_TX#0 BPM#[2] TDO
G22 FDI_TX[4] PEG_TX#[0] L33 0.1U/10V_4 AJ24 BPM#[3] TDI_M AR29 XDP_TDI_M T29
FDI_TXP5 E20 M35 C_PEG_TX#1 C549 0.1U/10V_4 PEG_TX#1 AJ25 AP29 XDP_TDO_M T26
FDI_TXP6 FDI_TX[5] PEG_TX#[1] C_PEG_TX#2 C554 0.1U/10V_4 PEG_TX#2 BPM#[4] TDO_M
F20 FDI_TX[6] PEG_TX#[2] M33 AH22 BPM#[5]
FDI_TXP7 G19 M30 C_PEG_TX#3 C561 0.1U/10V_4 PEG_TX#3 AK23
FDI_TX[7] PEG_TX#[3] C_PEG_TX#4 C565 0.1U/10V_4 PEG_TX#4 BPM#[6]
PEG_TX#[4] L31 AH23 BPM#[7] DBR# AN25 XDP_DBRESET# <9>
F17 K32 C_PEG_TX#5 C570 0.1U/10V_4 PEG_TX#5
<9> FDI_FSYNC0 FDI_FSYNC[0] PEG_TX#[5]
E17 M29 C_PEG_TX#6 C577 0.1U/10V_4 PEG_TX#6 IC,AUB_CFD_rPGA,R1P0
<9> FDI_FSYNC1 FDI_FSYNC[1] PEG_TX#[6]
J31 C_PEG_TX#7 C582 0.1U/10V_4 PEG_TX#7
PEG_TX#[7]
<9> FDI_INT C17 FDI_INT PEG_TX#[8] K29
PEG_TX#[9] H30
<9> FDI_LSYNC0 F18 FDI_LSYNC[0] PEG_TX#[10] H29
<9> FDI_LSYNC1 D17 FDI_LSYNC[1] PEG_TX#[11] F29
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