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5 4 3 2 1
Welch's BLOCK DIAGRAM POWER
SYSTEM CHARGER (MAX8731)
PAGE 35
SYSTEM POWER (MAX17020)
PAGE 39
D D
GMCH (TPS51117RGYR)
FAN & THERMAL PAGE 36
AC/BATT CONNECTOR. EMC1423-1-AIZL-TR
PG 28 DDR2(TPS51116)
PG 41 CPU PAGE 38
RUN POWER SW Diamondville CLOCK
+3.3V_SUS/+5V_SUS
SLG8SP513V
437P (FCBGA8)/2.5W (QFN-64) CPU CORE(MAX8796)
+5V/+3.3V/+1.8V PG 40 PG 16
PAGE 37
PG 3,4
533 MHz FSB
LVDS Panel Connector
C 1G/512M DDR2 10.1" C
on board NORTH BRIDGE PG 17
PG 13
945GSE VGA
CRT CONN.
DDR2-SODIMM DDR II 400/533
PG 18
PG 14,15 PG 5,6,7,8,9
DMI x 2
ASF2.0
HDD/SSD Conn SATA
PCIE BCM5764M RJ45/Magnetics
PG 26
(10/100/1000) PG 32 PG 32
CCD Conn USB Port 4 SOUTH BRIDGE
USB Port 7
PG 17 Half MINI-CARD
B B
PCIE Port 2 WLAN
USB Port 6
ICH-7M PG 24
Bluetooth Conn
PG 24
USB Port 3
Card Reader Card Reader CONN.
USB Port x 3 USB *3 Port 0,1,2 RTS5158E PG 19 SD/MMC/SD-HC
Port 0,1,2 PG 10,11,12 USB
PG 33 PG 19
HDA LPC FLASH SPI
2M bytes Port 5
Touch Screen conn
PG23 PG 17
Codec ALC272
EC
DMIC DATA/CLOCK AMP TPA6017A2 EMC_5035 17X8 ECE1077 Keyboard
PG 22 PG 26 PG 26
PG 29
A
PS/2 A
Internal Audio SPK HP Jack x1 Touchpad QUANTA
USER
DMIC
conn x2 MIC Jack x1 Connector
INTERFACE Title
COMPUTER
Schematic Block Diagram
PG 30 PG 29 PG 29 PG 26 PG 27
Size Document Number Rev
ZM1 3A
Date: Tuesday, March 31, 2009 Sheet 1 of 46
5 4 3 2 1
1 2 3 4 5 6 7 8
Table of Contents Power States
CONTROL
PAGE DESCRIPTION POWER PLANE VOLTAGE PAGE DESCRIPTION ACTIVE IN
SIGNAL
1 Schematic Block Diagram
2 Front Page +PWR_SRC 10V~+19V 17,23,35-38,42 MAIN POWER S0~S5
3-4 Diamondville
+RTC_CELL +3.0V~+3.3V 10,13,22,23 RTC S0~S5
5-9 Calistoga-945GSE
A 10-12 ICH7M +3.3V_ALW +3.3V 22,23,28,29,34,35,38-40 8051 POWER ALWON S0~S5 A
13 On Board Memory support
+5V_ALW +5V 8,26,38,39,42 LCD/CHARGE POWER ALWON S0~S5
14-15 DDRII SO-DIMM(200P)
16 Clock Generator +15V_ALW +15V 39 LARGE POWER +5V_ALW S0~S5
17 LCD Conn.
+3.3V_LAN +3.3V 33 LAN POWER LAN_PWR_ON
18 CRT Conn
19 CARD READER/Conn +5V_SUS +5V 13,29,39 SLP_S5# CTRLD POWER SUS_ON
22 SIO (SMsC5035)
+3.3V_SUS +3.3V 08,11-13,17,24,29,33,39 SLP_S5# CTRLD POWER 3.3V_SUS_ON
23 FLASH/RTC
24 Mini Card(WLAN) +1.8V_SUS +1.8V 06,08,14,36,39 SODIMM POWER DDR_ON
25 SATA (HDD)
+0.9V_DDR_VTT +0.9V 15,36,39 SODIMM POWER 0.9V_DDR_VTT_ON
26 TP/KB/ECE1077
27 SWITCH /LED +5V_RUN +5V 13,18,20,27-31,39 SLP_S3# CTRLD POWER RUN_ON
28 FAN & Thermal
+2.5V_RUN +2.5V 8 945GMS power RUN_ON
29 Audio CODEC(ALC272)
B 30 D-MIC +3.3V_RUN +3.3V 06-08,10-14,16-19,22,,24,25,27,29--31,33,39,42 SLP_S3# CTRLD POWER 3.3V_RUN_ON B
31-32 LAN(BCM5764M)
33 USB
34 System Reset Circuit +1.5V_RUN +1.5V 04,06,08,11,13,24,25 CALISTOGA/ICH8 POWER 1.5V_RUN_ON
35 Battery Charger
+1.05V_VCCP +1.05V 03-05,07,08,10,13 CPU/CALISTOGA/ICH8 POWER 1.05V_RUN_ON
36 GMCH_VCCP,1.5V
37 CPU(MAX8796) +VCC_CORE +0.7V~+1.77V 04,37,42 CPU CORE POWER IMVP_VR_ON
38 DDR2_1.8VSUS, 0.9V LCDVCC_TST_EN
+LCDVCC +3.3V 17 LCD Power & ENVDD
39 MAX17020 (+5.5V,+3,3V)
40 RUN Power Switch
41 DCIN,Batt
+5V_HDD +5V 27 HDD Power HDDC_EN
42 PAD& SCREW
43 EMI CAP +PBATT +10V~+17V 35,40 MAIN BATTERY CHG_PBATT
44 SMBUS BLOCK
45 Power Block Dianram
C C
46 Port Mapping
GND PLANE PAGE DESCRIPTION
GNDA_CHG
35
GND_1.05V
36
AGND_DC/DC
38
GND POWER
33
AGND_DDR
AGND_ISL6260
GND ALL
D D
QUANTA
Title
COMPUTER
Index & Power Status
Size Document Number Rev
ZM1 3A
Date: Tuesday, March 31, 2009 Sheet 2 of 46
1 2 3 4 5 6 7 8
5 4 3 2 1
U24A U24B
(5) H_A#[31:3] (5) H_D#[63:0] H_D#[63:0] (5)
H_A#3 P21 V19 H_D#0 Y11 R3 H_D#32
A[3]# ADS# H_ADS# (5) D[0]# D[32]#
H_A#4 H20 Y19 H_D#1 W 10 R2 H_D#33
A[4]# BNR# H_BNR# (5) D[1]# D[33]#
H_A#5 N20 U21 H_D#2 Y12 P1 H_D#34
A[5]# BPRI# H_BPRI# (5) D[2]# D[34]#
H_A#6 R20 H_D#3 AA14 N1 H_D#35
A[6]# D[3]# D[35]#
0
GROUP
ADDR
DATA GRP 0
H_A#7 J19 T21 H_D#4 AA11 M2 H_D#36
A[7]# DEFER# H_DEFER# (5) D[4]# D[36]#
H_A#8 N19 T19 H_D#5 W 12 P2 H_D#37
A[8]# DRDY# H_DRDY# (5) D[5]# D[37]#
H_A#9 G20 Y18 H_D#6 AA16 J3 H_D#38
H_DBSY# (5)
DATA GRP 2
H_A#10 A[9]# DBSY# H_D#7 D[6]# D[38]# H_D#39
M19 A[10]# Y10 D[7]# D[39]# N3
H_A#11 H21 T20 H_D#8 Y9 G3 H_D#40
A[11]# BR0# H_BREQ#0 (5) D[8]# D[40]#
H_A#12 L20 H_D#9 Y13 H2 H_D#41
A[12]# D[9]# D[41]#
CONTROL
H_A#13 M20 F16 H_IERR# R63 56 +1.05V_VCCP H_D#10 W 15 N2 H_D#42
H_A#14 A[13]# IERR# D[10]# D[42]#
D
K19 A[14]# INIT# V16 H_INIT#R R62
H_INIT# (10)
H_D#11 AA13 D[11]# D[43]# L2 H_D#43
D
H_A#15 J20 1K/F R72 330 +1.05V_VCCP H_D#12 Y16 M3 H_D#44
H_A#16 A[15]# H_D#13 D[12]# D[44]# H_D#45
L21 A[16]# LOCK# W 20 H_LOCK# (5) W 13 D[13]# D[45]# J2
K20 H_D#14 AA9 H1 H_D#46
(5) H_ADSTB#0 ADSTB[0]# D[14]# D[46]#
T4 H_AP0 D17 D15 H_D#15 W9 J1 H_D#47
(5) H_REQ#[4:0] AP0 RESET# H_RESET# (5) D[15]# D[47]#
H_REQ#0 N21 W 18 H_RS#0 Y14 K2
REQ[0]# RS[0]# H_RS#0 (5) (5) H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 (5)
H_REQ#1 J21 Y17 H_RS#1 Y15 K3
REQ[1]# RS[1]# H_RS#1 (5) (5) H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 (5)
H_REQ#2 G19 U20 H_RS#2 W 16 L1
REQ[2]# RS[2]# H_RS#2 (5) (5) H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 (5)
H_REQ#3 P20 W 19 T6 V9 M4 H_DP#2 T11
REQ[3]# TRDY# H_TRDY# (5) DP#0 DP#2
H_REQ#4 R19 REQ[4]# (5) H_D#[63:0] H_D#[63:0] (5)
AA17 H_D#16 AA5 C2 H_D#48
(5) H_A#[31:3] HIT# H_HIT# (5) D[16]# D[48]#
H_A#17 C19 V20 H_D#17 Y8 G2 H_D#49
A[17]# HITM# H_HITM# (5) D[17]# D[49]#
H_A#18 F19 H_D#18 W3 F1 H_D#50
H_A#19 A[18]# ITP_BPM0# H_D#19 D[18]# D[50]# H_D#51
E21 A[19]# BPM[0]# K17 U1 D[19]# D[51]# D3
H_A#20 A16 J18 ITP_BPM1# H_D#20 W7 B4 H_D#52
A[20]# BPM[1]# D[20]# D[52]#
DATA GRP 1
H_A#21 D19 H15 ITP_BPM2# H_D#21 W6 E1 H_D#53
H_A#22 A[21]# BPM[2]# ITP_BPM3# H_D#22 D[21]# D[53]# H_D#54
C14 A[22]# BPM[3]# J15 Y7 D[22]# D[54]# A5
ADDR GROUP 1
H_A#23 C18 K18 ITP_BPM#4 H_D#23 AA6 C3 H_D#55
DATA GRP 3
XDP/ITP SIGNALS
H_A#24 A[23]# PRDY# ITP_BPM#5 H_D#24 D[23]# D[55]# H_D#56
C20 A[24]# PREQ# J16 Y3 D[24]# D[56]# A6
H_A#25 E20 M17 ITP_TCK H_D#25 W2 F2 H_D#57
H_A#26 A[25]# TCK ITP_TDI H_D#26 D[25]# D[57]# H_D#58
D20 A[26]# TDI N16 V3 D[26]# D[58]# C6
H_A#27 B18 M16 ITP_TDO H_D#27 U2 B6 H_D#59
H_A#28 A[27]# TDO ITP_TMS H_D#28 D[27]# D[59]# H_D#60
C15 A[28]# TMS L17 T3 D[28]# D[60]# B3
H_A#29 B16 K16 ITP_TRST# H_D#29 AA8 C4 H_D#61
H_A#30 A[29]# TRST# D[29]# D[61]#
B17 A[30]# BR1# V15 BR1# H_D#30 V2 D[30]# D[62]# C7 H_D#62
H_A#31 C16 H_D#31 W4 D2 H_D#63
H_A#32 A[31]# D[31]# D[63]#
A17 A[32]# PROCHOT# G17 R46 56 +1.05V_VCCP (5) H_DSTBN#1 Y4 DSTBN[1]# DSTBN[3]# E2 H_DSTBN#3 (5)
H_A#33 B14 E4 Y5 F3
THERM
A[33]# THRMDA H_THERMDA (28) (5) H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 (5)
H_A#34 B15 E5 Y6 C5
A[34]# THRMDC H_THERMDC (28) (5) H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 (5)
H_A#35 A14 T10 R4 D4 H_DP#3
A[35]# DP#1 DP#3
C
(5) H_ADSTB#1 B19 ADSTB[1]# THERMTRIP# H17 PM_THRMTRIP# PM_THRMTRIP# (6,10)
T12 C
H_AP1 M18 H_GTLREF A7 T1 COMP0 R309 27.4/F
T1 AP1 2. Delete R47 and Change R46 to 56 ohm R88 1K/F_NC ACLKPH GTLREF COMP[0] COMP1 R310 54.9/F
U5 ACLKPH COMP[1] T2 make trace length
U18 R85 1K/F_NC DCLKPH V5 F20 COMP2 R48 27.4/F
(10) H_A20M# A20M# T2 H_BINIT# DCLKPH COMP[2] COMP3 R45 54.9/F
shorter than 0.5"
(10) H_FERR# T16 FERR# BCLK[0] V11 CLK_CPU_BCLK (16) T17 BINIT# COMP[3] F21
H_IGNNE# J4 V12 T8 EDM R6 MISC
(10) H_IGNNE# IGNNE# BCLK[1] CLK_CPU_BCLK# (16) EDM
EXTGBREF
H CLK
(10) H_STPCLK# R16 STPCLK# M6 EXTBGREF DPRSTP# R18 H_DPRSTP# (10,37)
T15 T5 FORCEPR# N15 R17
(10) H_INTR LINT0 FORCEPR# DPSLP# H_DPSLP# (10)
R15 T9 H_HFPLL N6 U4
(10) H_NMI LINT1 HFPLL DPW R# H_DPWR# (5)
U17 T3 H_MCERR P17 V17
(10) H_SMI# SMI# MCERR# PW RGOOD H_PWRGOOD (10)
T7 H_RSP# T6 N18
RSP# SLP# H_CPUSLP# (5)
+1.05V_VCCP R54 1K_NC D6 C21 AJSLB73VT10 (16) CPU_BSEL0 J6 A13 CORE_DET
R84 1K_NC NC1 RSVD3 BSEL[0] CORE_DET CPU_CMREF T31
+1.05V_VCCP G6 C1 CPU(437P)AU80586GE025D 1.6G SLB73 WIN BS (16) CPU_BSEL1 H5 B7
NC
NC2 RSVD2 BSEL[1] CMREF[1]
H6 NC3 RSVD1 A3 (16) CPU_BSEL2 G5 BSEL[2]
Place near CPU K4 NC4 AJSLB73VT00 Diamondville_SC_Rev1
K5 NC5
M15
CPU(437P)AU80586GE025D 1.6G SLB73(FCBGA)
NC6
L16 NC7
+1.05V_VCCP
Diamondville_SC_Rev1
R299 1K/F H_A#32
R303 1K/F H_A#33
R301 1K/F H_A#34
R304 1K/F H_A#35 Populate ITP700Flex for bringup THRMTRIP#
+1.05V_VCCP
+1.05V_VCCP
Layout Note:
R80 1K_NC H_NMI Place couple 0.1uF Decoupling
B B
R66 1K_NC H_SMI#
R75 1K_NC H_INTR
caps with in 0.1" ITP connector.
R76 1K_NC H_STPCLK# +1.05V_VCCP +3.3V_RUN
H_THERMTRIP# (22,28,39)
R65 1K_NC H_DPSLP# R11 R15 R16 +1.05V_VCCP +3.3V_SUS
R55 1K_NC H_DPRSTP# 51_NC 39 150
R53 1K_NC H_PWRGOOD JITP1 C13 0.1U/10V_NC
10 R43
For defensive design ITP_TDI 1 27 R44 10M
TDI VTT0
3
reservation only in this ITP_TMS 2 28 C12 0.1U/10V_NC Q17
ITP_TCK TMS VTT1 10 56 2N7002W-7-F
initial release 5 TCK VTAP 26 2
3
ITP_TDO 7 TDO
1
ITP_TRST# 3 PM_THRMTRIP# 2
1
TRST# C29
Q18 0.1U/10V
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