Service Manuals, User Guides, Schematic Diagrams or docs for : Quanta Quanta_ZN8
<< Back | HomeMost service manuals and schematics are PDF files, so You will need Adobre Acrobat Reader to view : Acrobat Download Some of the files are DjVu format. Readers and resources available here : DjVu Resources
For the compressed files, most common are zip and rar. Please, extract files with Your favorite compression software ( WinZip, WinRAR ... ) before viewing. If a document has multiple parts, You should download all, before extracting.
Good luck. Repair on Your own risk. Make sure You know what You are doing.
Image preview - the first page of the document
>> Download Quanta_ZN8 documenatation <<
Text preview - extract from the document
5 4 3 2 1
M3 System Block Diagram
LED Panel
M/B LCD Panel (LVDS)
AM3 socket
D D
DDR3-SODIMM 1&2 DDR3 1066/1333 MT/s MXM_LVDS
CPU LCD Panel (DP)
MXM_DP1
AMD MXM 3.0
DDR3-SODIMM 3&4 DDR3 1066/1333 MT/s
Athlon II
Type A MXM_DP3
PCIE2.0 16X
Scalar Board
HT-Link
0~3 MUX UMA_DP2
PI3PCIE
NB 2612-A ST Mars
4~7 MUX UMA_DP1
AMD PI3PCIE
14.318MHz
CLOCK GEN 2612-A
SLG8SP628 RS880M UMA_LVDS
C A-Link C
25MHz 32.768KHz
25MHz
PCI-E_NB
SATA Gen2
SATA Gen1 USB2.0
SB
32.768KHz
AMD
SB820M
PCI-E_SB
IR Blaster LPC
I2C
B B
IR Blaster
Rear I/O Board
ODD board
PWR BTN ODD Eject
IR Board
A A
DMic
Quanta Computer Inc.
PROJECT : ZN8
Size Document Number Rev
A
System Block Diagram
Date: Monday, March 22, 2010 Sheet 1 of 43
5 4 3 2 1
5 4 3 2 1
CLK_GEN_SLG8SP628
VCC3 CLK_VDD VCC1.2 CLK_VDDIO
L10 L16
BK1608HS600 BK1608HS600
C113 C117 C517 C495 C488 C491 C519 C520 C111 C489 C122 C497 C518 C521
C92 C121
22U/6.3V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 22U/6.3V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
D D
Clock chip has internal serial terminations
for differencial pairs, external resistors are
reserved for debug purpose.
Place within 0.5"
of CLKGEN
U20 B-1 R319 *261/F_4
4 50 CPUCLK_R RP23 1 2 0X2 CPUCLK CPUCLK 5
VCC3 CLK_VDD_USB CLK_VDD VDDDOT CPUK8_0T CPUCLK#_R CPUCLK# To CPU
16 49 3 4
L46 26
VDDSRC
VDDATIG
CPUK8_0C CPUCLK# 5
200 Mhz
35
BK1608HS600 VDDSB_SRC NBGFX_CLK_R RP20
40 30 1 2 0X2 NBGFX_CLK
NBGFX_CLK 9
C496 C486 VDDSATA ATIG0T NBGFX_CLK#_R NBGFX_CLK# To NB
48 29 3 4
C492 22U/6.3V_8 55
VDDCPU
VDDHTT
ATIG0C
ATIG1T
28 CLK_PCIE_MXM_R RP19 1 2 0X2 CLK_MXM
NBGFX_CLK# 9
CLK_MXM 21
RS880M for VGA
0.1u/10V_4 10uF_0805 56 27 CLK_PCIE_MXM#_R 3 4 CLK_MXM#
VDDREF ATIG1C CLK_MXM# 21
63
VDD48
2
37 CLK_SBLINK_R RP25 1 2 0X2 CLK_SBLINK CLK_SBLINK 9
C C493 SB_SRC0T CLK_SBLINK#_R CLK_SBLINK# To NB C
11 36 3 4
2.2U_0805 CLK_VDDIO 17
VDDSRC_IO0 SB_SRC0C
32 SBSRC_CLK_R RP28 1 2 0X2 SBSRC_CLK
CLK_SBLINK# 9
SBSRC_CLK 12
100 Mhz
1
VDDSRC_IO1 SB_SRC1T SBSRC_CLK#_R SBSRC_CLK# B-34 To SB
25 31 3 4 SBSRC_CLK# 12
VDDATIG_IO SB_SRC1C
34
VDDSB_SRC_IO
47
VDDCPU_IO
22
SRC0T To LAN Controller
21
SRC0C RP17
1 20 CLK_PCIE_TV_R 1 2 0X2 CLK_PCIE_TV
CLK_PCIE_TV 24
GND48 SRC1T CLK_PCIE_TV#_R CLK_PCIE_TV# To Mini PCIE Slot(TV)
7 19 3 4 CLK_PCIE_TV# 24
GNDDOT SRC1C CLK_PCIE_WLAN_R RP16
10 15 1 2 0X2 CLK_PCIE_WLAN
CLK_PCIE_WLAN 24
GNDSRC0 SRC2T CLK_PCIE_WLAN#_R CLK_PCIE_WLAN# To Mini PCIE Slot(WLAN)
18 14 3 4
24
GNDSRC1
GNDATIG QFN64
SRC2C
SRC3T
13
CLK_PCIE_WLAN# 24
100 Mhz
33 12 To 6 in 1 Controller
C511 33P CG_XIN GNDSB_SRC SRC3C CLK_PCIE_USB3.0_RRP15
43 9 1 2 0X2 CLK_PCIE_USB3.0
CLK_PCIE_USB3.0 30
GNDSATA SRC4T CLK_PCIE_USB3.0#_R CLK_PCIE_USB3.0# To USB 3.0
46 8 3 4 CLK_PCIE_USB3.0# 30
2
GNDCPU SRC4C
52
Y4 GNDHTT
60
GNDREF CLK_PCIE_LOMP_R RP24
14.318MHZ/20P 42 1 2 0X2 CLK_PCIE_LOMP
CLK_PCIE_LOMP 30
SRC6T/SATAT CLK_PCIE_LOMN_R CLK_PCIE_LOMN
41 3 4 CLK_PCIE_LOMN 30
1
CG_XOUT CG_XIN SRC6C/SATAC
61 6 T76
C500 33P CG_XOUT X1 SRC7T/27M_SS
62 5 T75
X2 SRC7C/27M_NS
2 54 NBHT_REFCLK_R RP10 1 2 0X2 CLK_NB_HTREF_PR
13,17,18,19,20,24
13,17,18,19,20,24
PCLK_SMB
PDAT_SMB 3
SMBCLK
SMBDAT
HTT0T/66M
HTT0C/66M
53 NBHT_REFCLK#_R 3 4 CLK_NB_HTREF#_PR
CLK_NB_HTREF_PR 9
CLK_NB_HTREF#_PR 9
To NB HT BUS 100 Mhz
CLK_PD# 51 64 CLK_48M_USB_R R294 22_4 CLK_48M_USB
CLK_VDD PD# 48MHz_0 CLK_48M_USB 13,22
To SB USB
Ra 48 Mhz
T106 23 59 SEL_HTT66 R308 158/F_4 EXT_NB_OSC
CLKREQ0# REF0/SEL_HTT66 EXT_NB_OSC 9
R86 8.2K_4 CLK_PD# T114 45 58 SEL_SATA Rb
B CLKREQ1# REF1/SEL_SATA SEL_27 To NB B
T115 44 57
CLKREQ2# REF2/SEL_27 R307 90.9/F_4
T116 39
CLKREQ3#
T117 38
CLKREQ4# R87 33_4 EXT_SB_OSC
TGND0
TGND1
TGND2
TGND3
TGND4
TGND5
TGND6
TGND7
TGND8
TGND9 EXT_SB_OSC 13
C112 C487
*10p/50V_4 *10p/50V_4
SLG8SP628
65
66
67
68
69
70
71
72
73
74
CLOCK INPUT TABLE
CLOCKS RS780
1 66 MHz 3.3V single ended HTT clock
SEL_HTT66 HT_REFCLKP 100M DIFF
0* 100 MHz differential HTT clock
HT_REFCLKN 100M DIFF
1* 100 MHz non-spreading differential SRC clock
SEL_SATA REFCLK_P 14M SE (1.1V)
0 100 MHz spreading differential SRC clock
CLK_VDD REFCLK_N vref
1 27MHz and 27M SS outputs
SEL_27 GFX_REFCLK 100M DIFF(IN/OUT)*
0* 100 MHz SRC clock
R85 GPP_REFCLK NC or 100M DIFF OUTPUT
*8.2K_4 * default
GPPSB_REFCLK 100M DIFF
SEL_SATA
SEL_HTT66
A SEL_27 A
R312 R299 R90
8.2K_4 8.2K_4 8.2K_4
Quanta Computer Inc.
PROJECT : ZN8
Size Document Number Rev
1A
Clock Generator
Date: Monday, March 22, 2010 Sheet 2 of 43
5 4 3 2 1
5 4 3 2 1
CPU HyperTransport and Debug
U24A
7 HT_CLKINP1 N6 AD5 HT_CLKOUTP1 7
D L0_CLKIN_H1 L0_CLKOUT_H1 D
7 HT_CLKINN1 P6 AD4 HT_CLKOUTN1 7
L0_CLKIN_L1 L0_CLKOUT_L1
7 HT_CLKINP0 N3 AD1 HT_CLKOUTP0 7
L0_CLKIN_H0 L0_CLKOUT_H0 HT_CADOUTP[15..0]
7 HT_CLKINN0 N2 AC1 HT_CLKOUTN0 7 HT_CADOUTP[15..0] 7
L0_CLKIN_L0 L0_CLKOUT_L0
V4 Y6 HT_CADOUTN[15..0]
7 HT_CTLINP1 L0_CTLIN_H1 L0_CTLOUT_H1 HT_CTLOUTP1 7 HT_CADOUTN[15..0] 7
7 HT_CTLINN1 V5 W6 HT_CTLOUTN1 7
L0_CTLIN_L1 L0_CTLOUT_L1 HT_CLKOUTP[1..0]
7 HT_CTLINP0 U1 W2 HT_CTLOUTP0 7 HT_CLKOUTP[1..0] 7
L0_CTLIN_H0 L0_CTLOUT_H0
7 HT_CTLINN0 V1 W3 HT_CTLOUTN0 7
L0_CTLIN_L0 L0_CTLOUT_L0 HT_CLKOUTN[1..0]
HT_CLKOUTN[1..0] 7
HT_CADINP15 U6 Y5 HT_CADOUTP15 HT_CTLOUTP[1..0]
HT_CADINN15 L0_CADIN_H15 L0_CADOUT_H15 HT_CADOUTN15 HT_CTLOUTP[1..0] 7
V6 Y4
HT_CADINP14 L0_CADIN_L15 L0_CADOUT_L15 HT_CADOUTP14 HT_CTLOUTN[1..0]
T4 AB6 HT_CTLOUTN[1..0] 7
HT_CADINN14 L0_CADIN_H14 L0_CADOUT_H14 HT_CADOUTN14
T5 AA6
HT_CADINP13 L0_CADIN_L14 L0_CADOUT_L14 HT_CADOUTP13 HT_CADINP[15..0]
R6 AB5 HT_CADINP[15..0] 7
HT_CADINN13 L0_CADIN_H13 L0_CADOUT_H13 HT_CADOUTN13
T6 AB4
HT_CADINP12 L0_CADIN_L13 L0_CADOUT_L13 HT_CADOUTP12 HT_CADINN[15..0]
P4 AD6 HT_CADINN[15..0] 7
HT_CADINN12 L0_CADIN_H12 L0_CADOUT_H12 HT_CADOUTN12
P5 AC6
HT_CADINP11 L0_CADIN_L12 L0_CADOUT_L12 HT_CADOUTP11 HT_CLKINP[1..0]
M4 AF6
HT_CADINN11 L0_CADIN_H11 L0_CADOUT_H11 HT_CADOUTN11 HT_CLKINP[1..0] 7
M5 AE6
HT_CADINP10 L0_CADIN_L11 L0_CADOUT_L11 HT_CADOUTP10 HT_CLKINN[1..0]
L6 AF5 HT_CLKINN[1..0] 7
HT_CADINN10 L0_CADIN_H10 L0_CADOUT_H10 HT_CADOUTN10
M6 AF4
HT_CADINP9 L0_CADIN_L10 L0_CADOUT_L10 HT_CADOUTP9 HT_CTLINP[1..0]
K4 AH6 HT_CTLINP[1..0] 7
HT_CADINN9 L0_CADIN_H9 L0_CADOUT_H9 HT_CADOUTN9
K5 AG6
HT_CADINP8 L0_CADIN_L9 L0_CADOUT_L9 HT_CADOUTP8 HT_CTLINN[1..0]
J6 AH5 HT_CTLINN[1..0] 7
HT_CADINN8 L0_CADIN_H8 L0_CADOUT_H8 HT_CADOUTN8
K6 AH4
L0_CADIN_L8 L0_CADOUT_L8
HT LINK
HT_CADINP7 U3 Y1 HT_CADOUTP7
HT_CADINN7 L0_CADIN_H7 L0_CADOUT_H7 HT_CADOUTN7
U2 W1
HT_CADINP6 L0_CADIN_L7 L0_CADOUT_L7 HT_CADOUTP6
R1 AA2
HT_CADINN6 L0_CADIN_H6 L0_CADOUT_H6 HT_CADOUTN6
T1 AA3
HT_CADINP5 L0_CADIN_L6 L0_CADOUT_L6 HT_CADOUTP5
R3 AB1
HT_CADINN5 L0_CADIN_H5 L0_CADOUT_H5 HT_CADOUTN5
R2 AA1
HT_CADINP4 L0_CADIN_L5 L0_CADOUT_L5 HT_CADOUTP4
N1 AC2
HT_CADINN4 L0_CADIN_H4 L0_CADOUT_H4 HT_CADOUTN4
P1 AC3
HT_CADINP3 L0_CADIN_L4 L0_CADOUT_L4 HT_CADOUTP3
L1 AE2
HT_CADINN3 L0_CADIN_H3 L0_CADOUT_H3 HT_CADOUTN3
M1 AE3
HT_CADINP2 L0_CADIN_L3 L0_CADOUT_L3 HT_CADOUTP2
L3 AF1
C HT_CADINN2 L0_CADIN_H2 L0_CADOUT_H2 HT_CADOUTN2 C
L2 AE1
HT_CADINP1 L0_CADIN_L2 L0_CADOUT_L2 HT_CA◦ Jabse Service Manual Search 2024 ◦ Jabse Pravopis ◦ onTap.bg ◦ Other service manual resources online : Fixya ◦ eServiceinfo