Service Manuals, User Guides, Schematic Diagrams or docs for : Quanta Quanta_ZA8
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5 4 3 2 1
X'TAL
14.318MHz
ZA8 Block Diagram HOST 200MHz
LED D/B
CHARGER
PCIE 100MHz ISL88731 PG 25
CLOCK GENERATOR WLAN/3G SW
USB 48MHz +3VPCU
Silego:SLG84605TTR BT SW 3V/5V
Thermal Sensor +3V_S5
DDRII-SODIMM1 DDR II 667 MHz AMD S1g1 REF 14.318MHz IDT:ICS951462 ISL6237
G781 WLAN/WiMax LED +3VSUS
D Channel A D
PG 8 PG 6 HTREF 66MHz PG 3 3G LED +3V
BT LED +5VPCU
TF20/S.C 1.2G/12W BAT LED +5V
PG 26
PG 4,5,6,7 X'TAL
PG 23
25MHz
Side port CPU_CORE CPU CORE
HT1 800MHz
memory PCIE-2 LAN(10/100) Transformer RJ45 ISL6264A PG 27
16bit DDR2 RTL8103EL LAN D/B
PG 9 PG 20 +NB_CORE NB CORE
UP6111AQDD
PG 28
LVDS(1ch)
RS690E PCIE-1 (Reserve)
LED Panel 3G Card SIM CARD
(11.6'',1366x768)
PG 21 +1.8VSUS
PG 21 DDR
PG 18 465 FCBGA +1.8V
+SMDDR_VTERM
TPS51116
PCIE-3 +SMDDR_VREF
8W
21mm*21mm PG 29
CRT R/G/B
PG 9,10,11,12 Mini Card (WLAN)
C
CRT D/B PG 18
Port 7
+2.5V +2.5V
C
PG 21
X'TAL
A_LINK (X4) RT9025 PG 30
25MHz
+1.5V +1.5V
Port 5
RT9025 PG 30
+1.2V_S5 +1.2V_S5
SATA - HDD SATA0 Port 3
CCD RT9025 PG 30
(SSD option) SB600 PG 18
PG 22 +1.2V
+1.2V
Port 6 G9334+AO4466
BT PG 23 PG 30
USB2.0
Port 0
USB2.0 I/O Ports X1 Thermal
Azalia Audio Codec PG 22
Azalia Protection PG 31
23mm*23mm 4W
B ALC272 B
PG 19 Port 1/2
PG 13,14,15,16,17 X'TAL USB2.0 I/O Ports X2 Card reader D/B
32.768KHz PG 22
LPC
Port 8
Card Reader controller 4 in 1
H.P MIC AMP Int. MIC RTS5159 Connector
PG 22
JACK JACK G1453L Digital
PG 19 PG 19 PG 19 PG 19
EC
Card reader D/B WPCE775L
Speaker
PG 24
PG 19 X'TAL
32.768KHz
SPI PS/2
A A
FAN Flash Touch
(PWM) Keyboard ROM Pad
PG 6 PG 23 PG 24 PG 23
TP D/B Quanta Computer Inc.
PROJECT : ZA8
Size Document Number Rev
1A
BLOCK DIAGRAM
Date: Friday, May 08, 2009 Sheet 1 of 35
5 4 3 2 1
5 4 3 2 1
ZA8 Power On Sequence BOM naming rule
From AC,Battery VIN
Items Function Name Description
+5VPCU +3VPCU
D D
From PWM SYS_HWPG(PCU) 1 3G Module 3G@
From Power Button NBSWON# 2 HDT debug function HDT@
From EC S5_ON
3
+3V_S5
+1.2V_S5 30ms 4
From EC RSMRST# 100ms 5
From EC DNBSWON#
6
From SB PCIE_WAKE#
From SB SUSB#,SUSC# 10ms
7
From EC SUSON 8
+3VSUS +1.8VSUS +SMDDR_VREF +SMDDR_VTERM
9
From PWM HWPG_1.8V (SUS) 10ms
From EC MAINON 10
+5V +3V +2.5V +1.8V +1.5V 11
C C
From PWM HWPG_1.5V,HWPG_2.5V 10ms
12
From EC VRON
CPU_CORE 13
From PWM CPU_COREPG +1.2V_ON
14
From EC +1.2V_ON
15
+1.2V
From PWM HWPG_1.2V 16
+NB_CORE 17
From PWM HWPG_1.2V_NB
18
HWPG 100ms
From EC ECPWROK 19
NB_PWRGD -22ms~500ms 20
SB_PWRGD 47ms~66ms
21
B
From SB CPU_PWRGD 71ms~73ms B
From SB PLTRST# 1.9ms~2.1ms
22
From SB LDT_RST# 23
From SB LDT_STOP#
24
*Note: EC will sampling SUSB# & 25
SUSC# every 5ms.
AMD SB600 SMBUS Table EC SMBUS Table
CLK GEN RAM Mini Card (WLAN) Battery CPU thermal Sensor EC EEPROM
SB600 SDATA0/SCLK0(+3V) V V V EC775 SDATA1/SCLK1(+3VPCU) V
SB600 SDATA1/SCLK1(+3V_S5) EC775 SDATA2/SCLK2(+3VPCU) V
Power Plane +3V +3V +3V EC775 SDATA3/SCLK3(+3VPCU) V
A A
MOS CKT Reserve Reserve Reserve EC775 SDATA4/SCLK4(+3VPCU)
Power Plane +3VPCU +3V +3VPCU
MOS CKT X X X
Quanta Computer Inc.
PROJECT : ZA8
Size Document Number Rev
1A
SYSTEM INFORMATION
Date: Friday, May 08, 2009 Sheet 2 of 35
5 4 3 2 1
5 4 3 2 1
CLK_GEN(CLK)
+3V L25
CLK_VDD Put Decoupling Caps close to Clock Gen. power pin
CLK_VDDA
BK1608HS600-T/0.5A/60ohm_6
L28 +3V
3
BK1608HS600-T/0.5A/60ohm_6
C252 C144 C247 C250 C249 C142 C248 C251 C143 C242 C261
22u/6.3V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 10u/10V_8
D D
B-test
BK1608HS600-T/0.5A/60ohm_6 CLK_VDD
+3V L26 CLK_VDD_USB U5
54 50 CLK_VDDA
C240 C241 VDDCPU VDDA R144 261/F_4
14 49
1u/6.3V_4 *0.1u/10V_4 VDD_SRC1 GNDA
23
VDD_SRC2 CPUCLK_EXT_R R140 47.5/F_4
28 56 CPUCLKP (6)
VDD_SRC3 CPUCLK8T0 CPUCLK#_EXT_R R139 47.5/F_4
44 55 CPUCLKN (6)
CLK_VDD_USB VDD_SRC4 CPUCLK8C0
5 52 T137
BK1608HS600-T/0.5A/60ohm_6 VDD_48 CPUCLK8T1
39 51 T65
L24 CLK_VDD_REF CLK_VDD_REF VDD_ATIG CPUCLK8C1
+3V 2
VDD_REF SBLINK_CLKP_R
60 16 3 4 SBLINK_CLKP (11)
C226 VDDHTT SRCCLKT6 SBLINK_CLKN_R RP3
17 1 2 33X2 SBLINK_CLKN (11)
C229 SRCCLKC6 NBSRC_CLKP_R
53 41 1 2 NBSRC_CLKP (11)
GND_CPU ATIGCLKT0 NBSRC_CLKN_R RP13
2.2u/6.3V_6 *0.1u/10V_4 15 40 3 4 33X2 NBSRC_CLKN (11)
GND_SRC1 ATIGCLKC0
22 37 T134
GND_SRC2 ATIGCLKT1
29 36 T136
GND_SRC3 ATIGCLKC1
45 35 T135
GND_SRC4 ATIGCLKT2
8 34 T138
C160 22p/50V_4 GND_48 ATIGCLKC2
38 30 T50
CLK_VDD GND_ATIG ATIGCLKT3
C 1 31 T52 C
2
GND_REF ATIGCLKC3
58 18
Y2 R100 GNDHTT SRCCLKT5
19
R96 14.318MHZ_20pF *1M_4 CLK_XIN SRCCLKC5
3 20
XIN SRCCLKT4
21
1
10K_4 C141 22p/50V_4 CLK_XOUT SRCCLKC4 GPP_CLK1P_R
4 24 3 4 SBSRCCLKP (13)
XOUT SRCCLKT3
25 GPP_CLK1N_R RP2 1 2 33X2 SBSRCCLKN (13)
SRCCLKC3 GPP_CLK2P_R
26
Parallel Resonance Crystal SRCCLKT2
27 GPP_CLK2N_R RP1
3
1
4
2 33X2
CLK_PCIE_LAN (20)
CLK_PCIE_LAN# (20)
SRCCLKC2 GPP_CLK3P_R
11 47 1 2 CLK_PCIE_3G (21)
T66 RESET_IN# SRCCLKT0 RP14
61 46 GPP_CLK3N_R 3 4 *33X2 CLK_PCIE_3G# (21)
NC SRCCLKC0
43 T133
SRCCLKT1
42 T68
SRCCLKC1 GPP_CLK0P_R
12 3 4 CLK_PCIE_WLAN (21)
SRCCLKT7 GPP_CLK0N_R
13 1 2 CLK_PCIE_WLAN# (21)
SRCCLKC7 RP4 33X2
SCLK0 9 57 CLKREQA#
(8,14,21) SCLK0 SMBCLK CLKREQA#
SDATA0 10 32 CLKREQB#
(8,14,21) SDATA0 SMBDAT CLKREQB#
R148
R149
R149
R82
R83
R84
R85
R76
R76
R77
R151
R150
R74
R75
R75
33 CLKREQC# T73
CLKREQC# +3V
48 7 CLK_48M_1_R T160 B-test
IREF 48MHz_1 CLK_48M_2_R
Ioh = 5 * Iref 48MHz_0
6 B-test
R95 33_4
(2.32mA) R163
USBCLK (14)
R97
*49.9/F_4
*49.9/F_4
*49.9/F_4
Voh = 0.71V @ 60 ohm 475/F_4 63
FS1/REF1
49.9/F_4
49.9/F_4
49.9/F_4
49.9/F_4
49.9/F_4
49.9/F_4
49.9/F_4
49.9/F_4
49.9/F_4
49.9/F_4
49.9/F_4
49.9/F_4
64 *10K_4
FS0/REF0 CLKREQA# R93 *Short_4
62 CLKREQ_WLAN# (21)
FS2/REF2
59
HTTCLK0
B-test
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