Service Manuals, User Guides, Schematic Diagrams or docs for : Samsung Audio HT-DM150 HT-DM150J HT-DM550 SAMSUNG_HT-DM150_HT-DM150J_HT-DM550_Full
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DVD RECEIVER AMP
HT-DM150
HT-DM150J
HT-DM550
SERVICE Manual
DVD RECEIVER AMP SYSTEM CONTENTS
1. Alignment and Adjustments
2. Exploded Views and Parts List
3. Electrical Parts List
4. Block Diagrams
5. PCB Diagrams
6. Wiring Diagram
7. Schematic Diagrams
8. IC block Diagrams
9. Troubleshooting
- Confidential -
* NOTE !
HT-DM150J (SAMSUNG) = SAMSUNG HT-DM150 DVD Receiver AMP + JBL Speaker System
So, Service of HT-DM150J Speaker System must be performed by JBL Service Center.
8. IC Block Diagrams
8-1 Main
1. AK4355
AK4355
192kHz 24-Bit 6ch DAC for DVD-Audio
GENERAL DESCRIPTION
ESCRIPTION
The AK4355 offers the perfect mix for cost and performance based multi-channel audio systems. AKM's
advanced multi-bit architecture delivers a wide dynamic range and low outband noise. The AK4355 has
full differential SCF outputs, removing the need for AC coupling capacitors and increasing performance
for systems with excessive clock jitter. The 24 Bit word length and 192kHz sampling rate make this part
sampling
ideal for a wide range of application including DVD-Audio.
FEATURES
Sampling Rate: 8kHz to 192kHz
24Bit 8 times Digital Filter with Slow roll-off option
THD+N: -90dB
DR, S/N: 106dB
High Tolerance to Clock Jitter
Low Distortion Differential Output
Digital De-emphasis for 32, 44.1 & 48kHz sampling
Zero Detect Pin
Channel Independent Digital Attenuator with soft-transition
Soft Mute
I/F format: 24-Bit MSB justified, 24/20/16-Bit LSB justified or I2S
Master Clock
Normal Speed: 256fs, 384fs, 512fs or 768fs
Double Speed: 128fs, 192fs, 256fs or 384fs
Quad Speed: 128fs, 192fs
Power Supply: 4.75 to 5.25V
28pin VSOP Package
DZF Audio AK4355
LOUT1+ I/F
LOUT1-
SCF DAC DATT
MCLK
ROUT1+ LRCK
ROUT1-
SCF DAC DATT BICK
LOUT2+ CSN
LOUT2-
SCF DAC DATT Control
CCLK
Register
CDTI
ROUT2+
ROUT2-
SCF DAC DATT
LOUT3+
LOUT3-
SCF DAC DATT
SDTI1
SDTI2
ROUT3+
SCF DAC DATT SDTI3
ROUT3-
Samsung Electronics 8-1
2. TDA7440D [ TDA7440D
TONE CONTROL
DIGITALLY CONTROLLED AUDIO PROCESSOR
INPUT MULTIPLEXER
- 4 STEREO INPUTS
- SELECTABLE INPUT GAIN FOR OPTIMAL
ADAPTATION TO DIFFERENT SOURCES
ONE STEREO OUTPUT
TREBLE AND BASS CONTROL IN 2.0dB
STEPS SO28
VOLUME CONTROL IN 1.0dB STEPS
TWO SPEAKER ATTENUATORS:
ORDERING NUMBER: TDA7440D
- TWO INDEPENDENT SPEAKER CONTROL
IN 1.0dB STEPS FOR BALANCE FACILITY
- INDEPENDENT MUTE FUNCTION
ALL FUNCTION ARE PROGRAMMABLE VIA Selectable input gain is provided. Control of all
SERIAL BUS the functions is accomplished by serial bus.
The AC signal setting is obtained by resistor net-
works and switches combined with operational
DESCRIPTION amplifiers.
The TDA7440D is a volume tone (bass and Thanks to the used BIPOLAR/CMOS Technology,
treble) balance (Left/Right) processor for quality Low Distortion, Low Noise and DC stepping are
audio applications in Hi-Fi systems. obtained
BLOCK DIAGRAM
MUXOUTL INL TREBLE(L) BIN(L) BOUT(L)
4 8 9 18 14 15
L-IN1
100K RB
5
L-IN2
100K
SPKR ATT 27
6 G VOLUME TREBLE BASS LOUT
L-IN3 LEFT
100K
7
L-IN4
100K
21
0/30dB 2
SCL
2dB STEP I CBUS DECODER + LATCHES 22
3 SDA
R-IN1 20
DIG_GND
100K
2
R-IN2
100K SPKR ATT 26
G VOLUME TREBLE BASS ROUT
RIGHT
1
R-IN3 VREF
100K
24
28 VS
R-IN4 SUPPLY 25
INPUT MULTIPLEXER RB AGND
100K + GAIN
10 11 19 12 13 23
MUXOUTR INR TREBLE(R) BIN(R) BOUT(R) CREF D98AU883
8-2 Samsung Electronics
3. TDA7449L
[ TDA7449L
LOW COST
DIGITALLY CONTROLLED AUDIO PROCESSOR
INPUT MULTIPLEXER
- 2 STEREO INPUTS
- SELECTABLE INPUT GAIN FOR OPTIMAL
ADAPTATION TO DIFFERENT SOURCES
ONE STEREO OUTPUT
VOLUME CONTROL IN 1.0dB STEPS
TWO SPEAKER ATTENUATORS:
- TWO INDEPENDENT SPEAKER CONTROL
DIP20
IN 1.0dB STEPS FOR BALANCE FACILITY
- INDEPENDENT MUTE FUNCTION
ALL FUNCTION ARE PROGRAMMABLE VIA
SERIAL BUS ORDERING NUMBER: TDA7449L
DESCRIPTION
The TDA7449L is a volume control and balance works and switches combined with operational
(Left/Right) processor for quality audio applica- amplifiers.
tions in TV systems. Thanks to the used BIPOLAR/CMOS Technology,
Selectable input gain is provided. Control of all Low Distortion, Low Noise and DC stepping are
the functions is accomplished by serial bus. obtained.
The AC signal setting is obtained by resistor net-
BLOCK DIAGRAM
MUXOUTL
10
8
L-IN1
100K
9
L-IN2 SPKR ATT 5
G VOLUME LOUT
100K LEFT
19
0/30dB 2 SCL
7 2dB STEP I CBUS DECODER + LATCHES 20
R-IN1 SDA
18
100K DIG_GND
6
R-IN2 SPKR ATT 4
G VOLUME ROUT
100K RIGHT
VREF
2
VS
SUPPLY 3
INPUT MULTIPLEXER AGND
+ GAIN
11 1
MUXOUTR CREF D98AU868
Samsung Electronics 8-3
4. M62463AFP
8-4 Samsung Electronics
Samsung Electronics 8-5
8-2 DVD
1. ZIVA- 5 DVD CONTROLER
XTAL/VCLK216BP
VDAC_DVDD
VDAC_DVSS
VDAC_VDD0
VDAC_VDD1
VDAC_VDD2
VDAC_VDD3
VDAC_VDD4
HSYNC/IRQ2
VDAC_RREF
VDD_RREF
VSS_RREF
DA-IEC958
DA-DATA3
DA-DATA2
DA-DATA1
DA-DATA0
VDAC_0B
VDAC_1B
VDAC_2B
VDAC_3B
VDAC_4B
DA-LRCK
VDD_3.3
VDD_3.3
A_VDD1
A_VDD2
DA-BCK
VDAC_0
VDAC_1
VDAC_2
VDAC_3
VDAC_4
A_VSS1
A_VSS2
DA-XCK
VDATA0
VDATA1
VDATA2
VDATA3
VDATA4
VDATA5
VDATA6
VDATA7
XVDD
VDDC
XVSS
VCLK
XTAL
VSS
VSS
VSS
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
DAI-DATA 157 104 VDD_3.3
DAI-BCK/SYSCLKBP 158 103 VSS
DAI-LRCK/IEC958BP 159 102 MDATA31
I2C_CL 160 101 MDATA30
I2C_DA 161 100 MDATA29
RTS1 162 99 MDATA28
RXD1 163 98 VDD_3.3
TXD1 164 97 MDQM3
CTS1 165 96 VSS
VSS 166 95 MDATA27
VDD_3.3 167 94 MDATA26
SD-DATA7 168 93 MDATA25
SD-DATA6 169 92 MDATA24
SD-DATA5 170 91 MDATA23
SD-DATA4 171 90 MDATA22
VSS 172 89 MDATA21
VDDC 173 88 MDATA20
SD-DATA3 174 87 VDD_3.3
SD-DATA2 175 86 MDQM2
SD-DATA1 176 85 VSS
SD-DATA0 177 84 MDATA19
SD-REQ 178 83 MDATA18
SD-EN 179 82 MDATA17
VSS 180 81 MDATA16
VDD_3.3 181 ZiVA-5 Controller 80 VDDC
SD-ERROR 182 79 VSS
SD-CLK
VSYNC/HIRQ1
183
184
Top View 78
77
MDATA15
MDATA14
RTS2/SPI_CLK 185 76 MDATA13
RXD2/SPI_MISO 186 75 MDATA12
TXD2/SPI_MOSI 187 74 VDD_3.3
CTS2/SPI_CS 188 73 MDQM1
VDD_5 189 72 VSS
HCS4 190 71 MDATA11
HCS3 191 70 MDATA10
HCS2 192 69 MDATA9
HCS1 193 68 MDATA8
HCS0 194 67 MDATA7
VSS 195 66 MDATA6
VDD_3.3 196 65 MDATA5
TRST 197 64 MDATA4
TDO 198 63 VDD_3.3
TDI 199 62 MDQM0
TMS 200 61 VSS
TCK 201 60 MDATA3
RESET 202 59 MDATA2
ALE 203 58 MDATA1
VSS 204 57 MDATA0
VDDC 205 56 MCLK
HAD3 206 55 VDD_3.3
HAD2 207 54 VSS
VSS 208 53 MWE
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
1
2
3
4
5
6
7
8
9
HDTACK/WAIT
UDS/UWE
LDS/LWE
R/W
VDD_3.3
HA1
HAD15
HAD14
HAD13
HAD12
HAD11
HAD10
HAD9
HAD8
HAD7
VDD_3.3
HAD6
HAD5
HAD4
HAD3
HAD2
HAD1
VDD_3.3
HAD0
HIRQ0
IRRX1
VDD_3.3
MADDR9
MADDR8
MADDR7
MADDR6
MADDR5
MADDR4
MADDR3
MADDR2
MADDR1
MADDR0
VDD_3.3
MADDR10
MADDR11
BA1
BA0
MCS0
MCS1
VSS
VSS
VSS
VDDC
VSS
VSS
MRAS
MCAS
Figure 1 ZiVA-5 controller Pinout (208-pin PQFP)
Table 1 ZiVA-5 controller Pin List
Pin No. Pin Name I/O Voltage I/O Type
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