Service Manuals, User Guides, Schematic Diagrams or docs for : Sony Sony Vaio VGN-BX 195 196 500 Quanta c836c RJ1
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1 2 http://hobi-elektronika.net 3 4 5
Dothan RJ1 Block Diagram 1
478 PIN (micro FC-PGA)
P3,4
A 14, 15, 15w , 17w inch XGA, SXGA+ 400/533 MHz A
LVDS LCD LVDS
P7
UNBUFFERED
DVI
Alviso DDRII 400/533 DDRII
SODIMM
M24/M26 915GM/PM P10
R/G/B CRT R/G/B
P9 UNBUFFERED
DDRII 400/533 DDRII
1257 PIN (micro FCBGA) SODIMM
Hyper memory PCIE 16Lanes P5,6,7,8 P10
P31,32,33
DMI
RJ45
LAN PCIE Azalia Link
(Giga) MARVELL
B
88E8053
P19
ICH6-M B
ALC260 MDC Module
P22 P17
PCI BUS
609 BGA(31x31mm)
P11,12,13
TI-TPA6011A4 P23
RJ11
USB 1.1/2.0
USB 1.1/2.0
3.3V LPC,33MHZ
SATA
USB Mini PCI SATA MIC. Jack Audio Jack INT.SPKR.
VT6212
TI_7411 Wireless LAN Sil 3512
P35 P14,15,16 P17 P36
mini-PCI 802.11 a/b/g TPM Infineon SLD 9630
(Intel Calexico II USB*3 BAY HDD P24
module) P18
P21 P18
C C
Doacking Docking*3
Felica P24 P24
P18 SLOT0 1394 Memory Stick Pro(DUO)
P16 P14
BAY Finger
Blue Tooth P18
P18 Print
Camera
SD/MMC PCU
P21
NS PC97551
WWAN P20
P18
TOUCH PAD INT.K/B BIOS Card Reader
P21 P20
HDD LED
T/P SWITCH Track Point
Wireless SW
Wireless LED
D D
Bluetooth SW
Bluetooth LED QUANTA
LED
Power/Speep/Bat/HDD
COMPUTER
Size Document Number Rev
RJ1 Main Board 1A
Date: Friday, April 22, 2005 Sheet 1 of 36
1 2 3 4 5
1 2 3 http://hobi-elektronika.net
4 5 6 7 8
C1 C2
CLK_VDDA 1
L1
2
MLB_160808-0300P-N2
VCC3
14M_ICH C5 *10P
2
C4 C959 10U 0.1U_4 HCLK_MCH R3 49.9/F_4
27P 0.1U_4 HCLK_MCH# R5 49.9/F_4
XIN HCLK_CPU R7 49.9/F_4
HCLK_CPU# R8 49.9/F_4
2
11
37
38
Y1 R9 U1 CLK_PCIE_M24 R11 @49.9/F_4
C6 14.318MHz/20PF/20ppm 1M_4 50 52 R2 33 14M_ICH CLK_PCIE_M24# R12 @49.9/F_4
VDDA
VDDA
GNDA
X1 REF1 14M_ICH (12)
27P
A 1 R10 1 2 0_4 XOUT 49 44 R_HCLK_MCH RP30 1 2 33X2 HCLK_MCH CLK_PCIE_DOCK R13 49.9/F_4 A
X2 CPU0 HCLK_MCH (5)
43 R_HCLK_MCH# 3 4 HCLK_MCH# CLK_PCIE_DOCK#R14 49.9/F_4
CPU0# HCLK_MCH# (5)
10 41 R_HCLK_CPU RP31 1 2 33X2 HCLK_CPU CLK_PCIE_SATA R19 49.9/F_4
(25) -CLK_EN VTT_PWRGD#/PD CPU1 HCLK_CPU (3)
55 40 R_HCLK_CPU# 3 4 HCLK_CPU# CLK_PCIE_SATA# R21 49.9/F_4
(12) -STP_PCI PCI_STOP#/SRC_STOP# CPU1# HCLK_CPU# (3)
(12,25) -STP_CPU 54 CPU_STOP#
36 R_CLK_PCIE_M24 RP32 1 2 @33X2 CLK_PCIE_M24 DREFSSCLK R24 *@49.9/F_4
CPU2_ITP/SRC7 CLK_PCIE_M24 (31)
46 35 R_CLK_PCIE_M24# 3 4 CLK_PCIE_M24# DREFSSCLK# R25 *@49.9/F_4
(10,12) PCLK_SMB SCLK CPU2#_ITP/SRC7# CLK_PCIE_M24# (31)
(10,12) PDAT_SMB 47 SDATA
CK-410M 33 DREFCLK R28 *@49.9/F_4
CLK48_7411 R17 12.1/F_4 CLKREQA# R544 10K_4 DREFCLK# R29 *@49.9/F_4
(14) CLK48_7411 CLKREQB# 32
CLK48_USB R20 12.1/F_4 CPU_BSEL2
(12) CLK48_USB
CPU_BSEL1
12 FSA/USB_48 ICS954227 R_CLK_PCIE_DOCK RP33
16 FSB/TEST_MODE SRC5 31 1 2 33X2 CLK_PCIE_DOCK
CLK_PCIE_DOCK (24)
CLK_PCIE_ICH R32 49.9/F_4
CPU_BSEL0 53 30 R_CLK_PCIE_DOCK# 3 4 CLK_PCIE_DOCK# CLK_PCIE_ICH# R33 49.9/F_4
CLK_VDD REF0/FSC/TEST_SEL SRC5# CLK_PCIE_DOCK# (24)
26 R_CLK_PCIE_SATA RP34 3 4 33X2 CLK_PCIE_SATA CLK_PCIE_MCH R475 49.9/F_4
SRC4_SATA CLK_PCIE_SATA (11)
L2 1 2 MLB_160808-0300P-N2 CLK_VDD 48 27 R_CLK_PCIE_SATA# 1 2 CLK_PCIE_SATA# CLK_PCIE_MCH# R476 49.9/F_4
VCC3 VDD_REF SRC4_SATA# CLK_PCIE_SATA# (11)
42 VDD_CPU
24 R_CLK_PCIE_ICH RP35 3 4 33X2 CLK_PCIE_ICH CLK_PCIE_LAN R484 49.9/F_4
SRC3 CLK_PCIE_ICH (12)
C7 C8 C9 C10 C11 1 25 R_CLK_PCIE_ICH# 1 2 CLK_PCIE_ICH# CLK_PCIE_LAN# R485 49.9/F_4
VDD_PCI_1 SRC3# CLK_PCIE_ICH# (12)
0.1U_4 0.1U_4 0.1U_4 0.1U_4 0.1U_4 7 VDD_PCI_2 R_CLK_PCIE_MCH RP40
SRC2 22 3 4 33X2 CLK_PCIE_MCH
CLK_PCIE_MCH (7)
21 23 R_CLK_PCIE_MCH# 1 2 CLK_PCIE_MCH#
VDD_SRC0 SRC2# CLK_PCIE_MCH# (7)
28 PCLK_MP C16 *15P
VDD_SRC1 R_CLK_PCIE_LAN RP41
34 VDD_SRC2 SRC1 19 3 4 33X2 CLK_PCIE_LAN
CLK_PCIE_LAN (19)
C12 C13 C14 C15 20 R_CLK_PCIE_LAN# 1 2 CLK_PCIE_LAN# PCLK_6212 C17 *15P
SRC1# CLK_PCIE_LAN# (19)
0.1U_4 0.1U_4 0.1U_4 10U/6.3V/X5R
17 R_DREFSSCLK RP36 3 4 *@33X2 DREFSSCLK PCLK_3512 C18 *15P
27FIX/LCDCLK_T/SRC0 DREFSSCLK (5)
18 R_DREFSSCLK# 1 2 DREFSSCLK# (96MHz)
27SS/LCDCLK_C/SRC0# DREFSSCLK# (5)
B R528 @121 M26_27MHZ PCLK_7411 C21 *15P B
M26_27MHZ (31)
R529 @33 M26_27MHZ# (27MHz)
M26_27MHZ# (31)
14 R_DREFCLK RP37 3 4 *@33X2 DREFCLK (1.2v) CLK48_USB C22 *15P
DOT96 DREFCLK (5)
15 R_DREFCLK# 1 2 DREFCLK#
DOT96# DREFCLK# (5)
CLK48_7411 C23 *15P
5 R_PCLK_MP R38 33 PCLK_MP R578
*SEL_SRC0/PCICLK3 PCLK_MP (17)
71.5/F PCLK_551 C667 *15P
R40 475/F IREF 39 4 R_PCLK_6212 R39 33 PCLK_6212
IREF *SEL_SATA/PCICLK2 PCLK_6212 (35)
R474 12.1/F_4 PCLK_9630 PCLK_ICH6 C25 *15P
PCLK_9630 (24)
3 R_PCLK_3512 R41 12.1/F_4 PCLK_3512
PCICLK1 PCLK_3512 (36)
56 R_PCLK_7411 R42 33 PCLK_7411 PCLK_9630 C671 *15P
PCICLK0 PCLK_7411 (14)
R_PCLK_6212 R44 *10K_4 9 R_PCLK_ICH6 R43 33 PCLK_ICH6
GND
GND
GND
GND
GND
GND
*SEL_LCD(27#)/PCIF0 PCLK_ICH6 (11)
R_PCLK_MP R4 10K_4 8 R_PCLK_551 R452 33 PCLK_551
ITP_EN/PCICLK4 PCLK_551 (20)
R_PCLK_ICH6 R6 @10K_4 R15 10K_4
13
51
29
45
* Internal pull up to VDD
2
6
**Internal pull down to
GND SATA Spread and Frequency Selection Table
(SEL_SATA) :
SEL_SRC0(Pin 17,18)(R4) SEL_SATA(Pin 26,27)(R44) VCO 27,26 Spread
SEL_SATA SS3 SS2 MHZ MHZ %
0: LCDCLK Pair 0: Clock from SRC PLL
1: SRCCLK0 pair 1: Clock from SATA PLL 1 0 0 tbd 100 -0.2 Down
1 0 1 tbd 100 -0.3 Down
SEL_LCD(Pin 17,18)(R6) ITP_EN Function(Pin 35,36)(R15)
IREF (Pin 39) : 3 1 1 0 tbd 100 -0.4 Down
0: 27MHZSS/27MHZSS# pair (M24/M26) 0 : SRC_7 Pair (Pin 35,36)
C C
1: LCDCLK pair (915GM) 1 : CPU_2_ITP Pair (Pin 35,36) 475_1% : Sets the IREF current to 2.32mA SOT23 1 1 1 tbd 100 -0.5 Down
2 1
LCDCLK Spread and Frequency Selection Table (SEL_LCD) : 2N7002 Signal 915GM 915PM
R46 10K_4 CPU_BSEL2 VCO 17,18 Spread VCO 17,18 Spread CLK_PCIE_M24 RP32 NI 33X2
VCC3 SEL_LCD MHZ MHZ SEL_LCD
SS3 SS2 SS1 SS0 % SS3 SS2 SS1 SS0 MHZ MHZ % R11 NI 49.9/F_4
1 0 0 0 0 500 100 +/-1.5 0 0 0 0 0 864 27 +/-0.25
R12 NI 49.9/F_4
R553 1K_4 1 0 0 0 1 500 100 +/-1.25 0 0 0 0 1 864 27 +/-0.5
VCCP
DREFSSCLK RP36 33X2 NI
R47 0_4 CPU_BSEL1 R80 4.7K 1 0 0 1 0 500 100 +/-1.0 0 0 0 1 0 864 27 +/-0.75
(4) CPUBSEL1 MCH_BSEL1 (5)
R24 49.9/F_4 NI
Center
Center
1 0 0 1 1 500 100 +/-0.8 0 0 0 1 1 864 27 +/-1
R50 4.7K CPU_BSEL0 R25 49.9/F_4 NI
(4) CPUBSEL0
1 0 1 0 0 500 100 +/-0.6 0 0 1 0 0 864 27 +/-1.25
R51 4.7K DREFCLK RP37 33X2 NI
MCH_BSEL0 (5)
1 0 1 0 1 500 100 +/-0.5 0 0 1 0 1 864 27 +/-1.5
R554 1K_4 R28 49.9/F_4 NI
VCCP
1 0 1 1 0 500 100 +/-0.4 0 0 1 1 0 864 27 +/-1.75
R29 49.9/F_4 NI
FSC FSB FSA Spread 1 0 1 1 1 500 100 +/-0.3 0 0 1 1 1 864 27 +/-2
BSEL0 BSEL1 BSEL2 CPU SRC PCI REF USB DOT % DREFSSCLK R528 NI 121
1 1 0 0 0 500 100 3 0 1 0 0 0 864 27 -0.5
100 R529 NI 33
0 0 0 266.66 33.33 14.318 48 96 0.5 Down 1 1 0 0 1 500 100 2.5 0 1 0 0 1 864 27 -1
100 R_PCLK_ICH6 R6 NI 10K_4
D * 0 0 1 133.33 33.33 14.318 48 96 0.5 Down 1 1 0 1 0 500 100 2 0 1 0 1 0 864 27 -1.25 D
Down
Down
100
0 1 0 200.00 33.33 14.318 48 96 0.5 Down 1 1 0 1 1 500 100 1.75 0 1 0 1 1 864 27 -1.5
100
0 1 1 166.66
100
33.33 14.318 48 96 0.5 Down 1 1 1 0 0 500 100 1.5 0 1 1 0 0 864 27 -1.75 QUANTA
1 0 0 333.33
100
33.33 14.318 48 96 0.5 Down 1 1 1 0 1 500 100 1.25 0 1 1 0 1 864 27 -2 COMPUTER
0 1 0.5 Down 1 1 1 1 0 500 100 0 1 1 1 0 864 27 Title
* 1 100.00 33.33 14.318 48 96 1 -2.5
100 CLOCK GENERATOR
1 1 0 400.00 33.33 14.318 48 96 0.5 Down 1 1 1 1 1 500 100 0.8 0 1 1 1 1 864 27 -3
100 Size Document Number Rev
1 1 1 200.00 33.33 14.318 48 96 0.5 Down Custom RJ1 Main Board 1A
1.This part should not contain any substances which are specified in SS-00259-1
2.Purchase ink, paint, wire rods and molding resins only from the business partners that Sony approves as Green Partners. Date: Tuesday, May 10, 2005 Sheet 2 of 36
1 2 3 4 5 6 7 8
A B http://hobi-elektronika.net C D E
U2A
MOLEX 51248-4798 H_D#[0..63]
H_D#[0..63] (5)
H_CPURST# R53 *54.9/F_4
3
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