Service Manuals, User Guides, Schematic Diagrams or docs for : acer Acer Aspire 7740G_Wistron_JV70-CP_Rev-1
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5 4 3 2 1
Project code: 91.4GC01.001 PCB STACKUP
JV70-CP Block Diagram PCB P/N : 48.4GC01.011 TOP
REVISION : 09293--1 VCC
Intel CPU S
Clock Generator DDRIII Slot 0 ATi
D
ICS9LRS3197AKLFT 800/1066/1333 20
DDRII Channel A Arrandale PCI EXPRESS GRAPHIC Madison
VRAM S D
sDDR3 1Gb*8
SLG8SP585VTR 3 Clarksfield X16 Park
58...63
64...67
GND
DDRIII Slot 1 DDR II Channel B 4,5,..,9,10 BOTTOM
800/1066/1333 21
Digital Display
LVDS 2CH
RGB CRT
DMIx4 FDIx8
SYSTEM DC/DC
TPS51123
INPUTS OUTPUTS
PCH RGB CRT Switch CRT
INTEL 24
5V_S5
DCBATOUT
Mini-Card LCD 3D3V_S5
WLAN 37
PCIE+USB 2.0 PCH PCH LVDS 2CH Switch
WXGA+ 23
47
14 USB 2.0/1.1 ports SYSTEM DC/DC
ETHERNET (10/100/1000Mb) PCH Digital Display
TPS51117
C Switch HDMI25 C
INPUTS OUTPUTS
High Definition Audio
Giga LAN 6 SATA ports
RJ45 PCIE DCBATOUT 1D5V_S3
CONN BCM57780 8 PCIE ports 48
31
30 ACPI 1.1
WEBCAM
SYSTEM DC/DC
LPC I/F 23 TPS51117
PCI/PCI BRIDGE INPUTS OUTPUTS
USB 2.0 BLUETOOTH
28
DCBATOUT 1D05V_S0
LINE IN HD AUDIO 48
CODEC
MIC IN
AZALIA USB x 4 30 SYSTEM DC/DC
ALC669X 32 TPS51117
INPUTS OUTPUTS
INT MIC Card Reader
SD/MMC
AU6433 MS/MS Pro/xD DCBATOUT 1D05V_VTT
36 36 49
B B
CPU DC/DC
OP AMP ISL62883
SPI
Flash ROM
INPUTS OUTPUTS
2CH SPEAKER MAX 9789C
33 4MB 41
11,12,...,18,19 DCBATOUT VCC_CORE
45,46
LINE OUT
LPC Bus LPC debug MAXIM CHARGER
40
ISL88731A
MODEM
INPUTS OUTPUTS
RJ11 KBC
MDC CARD SPI
35 USB BD FP Base BD
NPCE781B DCBATOUT
39 09582-1 29 09587-1 41
BT+
51
A JV70-CP A
SATA HDD 26 SATA
Thermal Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Touch Int. Flash ROM Taipei Hsien 221, Taiwan, R.O.C.
Sensor
SATA ODD 27
PAD KB39 128KB 40 Title
G787 38 41
Block Diagram
Size Document Number Rev
A3
JV70-CP -1
Date: Thursday, October 08, 2009 Sheet 1 of 68
5 4 3 2 1
A B C D E
PCH Strapping Processor Strapping
Name Schematics Notes Pin Name Strap Description Configuration (Default value for each bit is Default
SPKR Reboot option at power-up 1 unless specified otherwise) Value
Default Mode: Internal weak Pull-down.
CFG[4] Embedded 1: Disabled - No Physical Display Port attached to 1
No Reboot Mode with TCO Disabled: Connect to Vcc3_3 with 8.2-k Embedded DisplayPort.
- 10-k weak pull-up resistor. DisplayPort
Presence 0: Enabled - An external Display Port device is
INIT3_3V# Weak internal pull-down. Do not pull high. connected to the Embedded Display Port.
4 GNT3#/ Default Mode: Internal pull-up. CFG[3] PCI-Express Static 1: Normal Operation. 1
4
GPIO55 Low (0) = Top Block Swap Mode (Connect to ground with 4.7-k weak Lane Reversal 0: Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
pull-down resistor).
CFG[0] PCI-Express 1: Single PCI-Express Graphics 1
INTVRMEN High (1) = Integrated VRM is enabled Configuration 0: Bifurcation enabled
Low (0) = Integrated VRM is disabled Select
GNT0#, Default (SPI): Left both GNT0# and GNT1# floating. No pull up
GNT1# required. CFG[7] Reserved - Clarksfield (only for early samples pre-ES1) - 0
Temporarily used Connect to GND with 3.01K Ohm/5% resistor
Boot from PCI: Connect GNT1# to ground with 1-k pull-down
resistor. Leave GNT0# Floating. for early Note: Only temporary for early CFD samples
Clarksfield (rPGA/BGA) [For details please refer to the WW33
Boot from LPC: Connect both GNT0# and GNT1# to ground with 1-k samples. MoW and sighting report].
pull-down resistor. For a common motherboard design (for AUB and CFD),
GNT2#/ Default - Internal pull-up. the pull-down resistor should be used. Does not
GPIO53 Low (0)= Configures DMI for ESI compatible operation (for servers impact AUB functionality.
only. Not for mobile/desktops).
GPIO33 Default: Do not pull low.
Disable ME in Manufacturing Mode: Connect to ground with 1-k
pull-down resistor.
SPI_MOSI Enable iTPM: Connect to Vcc3_3 with 8.2-k weak pull-up resistor.
3 Disable iTPM: Left floating, no pull-down required. 3
NV_ALE Enable Danbury: Connect to Vcc3_3 with 8.2-k weak pull-up
resistor.
Disable Danbury: Connect to ground with 4.7-k weak pull-down
resistor.
NC_CLE Weak internal pull-up. Do not pull low.
HAD_DOCK_EN# Low (0): Flash Descriptor Security will be overridden.
/GPIO[33] High (1) : Flash Descriptor Security will be in effect.
HDA_SDO Weak internal pull-down. Do not pull high.
HDA_SYNC Weak internal pull-down. Do not pull high.
GPIO15 Weak internal pull-down. Do not pull high.
GPIO8 Weak internal pull-up. Do not pull low.
GPIO27 Default = Do not connect (floating)
High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.
2 2
USB
PCIE Routing
LANE1 LAN Pair Device
0 USB1
LANE2 MiniCard WLAN 1 USB2
2 USB4
3 MINICARD1
4 WECAM
5 NC
6 NC
7 NC
8 NC
9 USB3(HS)
JV70-CP
10 Finger Print
1 1
11 Blue Tooth
Wistron Corporation
12 NC 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
13 Cardreader
Title
Table of Content
Size Document Number Rev
A3
JV70-CP -1
Date: Thursday, October 08, 2009 Sheet 2 of 68
A B C D E
3D3V_1D5V_CK505
1D5V_S0
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
1
1
C358 C361
R174
DY 0R3J-0-U-GP
2
2
R178
1
4 1 2 3D3V_1D5V_CK505 4
3D3V_S0 0R3J-0-U-GP 3D3V_S0
-1 0929
1 R186 2 3D3V_CK505 3D3V_CK505_IO 1 R180 2
0R0603-PAD 0R0603-PAD
1
1
1
1
1
1
1
1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C355 C359 C349 C341 C351 C340 C339 C356
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC1U10V2ZY-GP
SC10U6D3V3MX-GP
SC1U10V2ZY-GP
SC10U6D3V3MX-GP
DY DY
2
2
2
2
2
2
2
2
24
17
29
15
18
1
5
U24
VDDCPU_3_3
VDDSRC_3_3
VDDREF_3_3
VDDDOT96MHZ_3_3
VDDSRC_IO
VDDCPU_IO
VDD_27MHZ
-1 0923
ATI_ES
12 DREFCLK# 1 R200 20R0402-PAD DREFCLK#_R 4 6 VGA_XIN1_L R746 1 2 0R2J-2-GP VGA_XIN1 59
R204 20R0402-PAD DREFCLK_R DOT96C_LPR 27MHZ_NONSS OSC_SPREAD_L R747 1
12 DREFCLK 1 3 DOT96T_LPR 27MHZ_SS 7 2 0R2J-2-GP OSC_SPREAD 59
DY
12 CLKIN_DMI# 1 R181 20R0402-PAD CLKIN_DMI#_R 14
R182 20R0402-PAD CLKIN_DMI_R SRCC1_LPR CPU_STOP#
12 CLKIN_DMI 1 13 SRCT1_LPR CPU_STOP# 16
3 25 CLK_EN 3
R183 20R0402-PAD CLK_PCIE_SATA#_R 11 CLKPWRGD/PD#_3_3 FSC R223
12 CLK_PCIE_SATA# 1 SATAC_LPR REF_3L/FSLC_3_3 30 1 2 33R2J-2-GP CLK_ICH14 12
12 CLK_PCIE_SATA 1 R184 20R0402-PAD CLK_PCIE_SATA_R 10
SATAT_LPR
1
12 CLK_CPU_BCLK# 1 R202 20R0402-PAD CLK_CPU_BCLK#_R 22 28 GEN_XTAL_IN DY C365
R207 20R0402-PAD CLK_CPU_BCLK_R 23 CPUC0_LPR X1 GEN_XTAL_OUT
12 CLK_CPU_BCLK 1 CPUT0_LPR X2 27
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
2
19 31 PCH_SMBDATA_1 1 R215 2
GNDDOT96MHZ
CPUC1_LPR SDATA_3_3 PCH_SMBDATA 12,20,21
20 32 PCH_SMBCLK_1 1 R211 2 PCH_SMBCLK 12,20,21
CPUT1_LPR SCLK_3_3
GND27MHZ
0R0402-PAD
GNDSATA
GNDCPU
GNDSRC
GNDREF
0R0402-PAD
GND
ICS9LRS3197AKLFT-GP-U
33
26
21
12
2
8
9
71.93197.003
2ND = 71.08585.003
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