Service Manuals, User Guides, Schematic Diagrams or docs for : acer Acer Ferrari One 200_Quanta_ZH6_Rev1A
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5 4 3 2 1
X'TAL
14.318MHz
ZH6 Block Diagram HOST 200MHz
CHARGER
PCIE 100MHz ISL88731 PG 24
USB 48MHz CLOCK GENERATOR +3VPCU
Thermal Sensor +3V_S5 3V/5V
DDRII-SODIMM A DDR II 800 MHz AMD S1g1 REF 14.318MHz ISL6237
G781 +3VSUS
D Channel A D
PG 8 PG 6 HTREF 66MHz PG 3 +3V
+5VPCU
DDRII-SODIMM B DDR II 800 MHz
L310/S.C 1.2G/13W +5V
Channel B PG 25
PG 8 PG 4,5,6,7 X'TAL
25MHz
Side port CPU_CORE CPU VCORE
HT1 800MHz
memory PCIE-2 LAN(10/100/1000) Transformer RJ45 OZ828 PG 26
128MB 16bit DDR2
AR8131
D/B
PG 9 +NB_CORE NB CORE
UP6111AQDD
PG 27
LVDS(1ch)
RS780MN PCIE-1 (Reserve)
LED Panel 3G Card SIM CARD
(11.6'',1366x768)
PG 21 +1.8VSUS
PG 21 DDR
PG 18 465 FCBGA +1.8V
+SMDDR_VTERM
TPS51116
PCIE-3 +SMDDR_VREF
8W
21mm*21mm PG 28
CRT R/G/B
C PG 9,10,11,12 Mini Card (WLAN) C
Port 7
PG 18 +1.1V
PG 21 +1.1V
X'TAL
A_LINK (X4)
UP6111AQDD
25MHz PG 29
Port 5
SATA - HDD SATA0 Port 3 +2.5V +2.5V
CCD PG 18 RT9025 PG 30
(SSD option) PG 22 SB710
Port 6 +1.5V +1.5V
BT (Optional) PG 23 RT9025 PG 30
USB2.0 +1.2V_S5 +1.2V_S5
Port 0
USB2.0 I/O Ports X1 RT9025 PG 30
Azalia Audio Codec PG 22 +1.2V
Azalia +1.2V
23mm*23mm 4W
B ALC269 G9334+AO4466 B
PG 19 Port 1/2
PG 13,14,15,16,17
X'TAL USB2.0 I/O Ports X2 D/B PG 30
32.768KHz PG 22
LPC Thermal
Port 8 Protection PG 31
Card Reader controller 4 in 1
H.P MIC Speaker Int. MIC RTS5159 Connector
PG 22
JACK JACK Digital
PG 19 PG 19 PG 19 PG 19
D/B EC
WPCE775L
PG 24
X'TAL
32.768KHz
SPI PS/2
A A
FAN Flash Touch
(PWM) Keyboard ROM Pad
PG 6 PG 23 PG 24 PG 23
TP D/B Quanta Computer Inc.
PROJECT : ZH6
Size Document Number Rev
1A
BLOCK DIAGRAM
Date: Monday, August 24, 2009 Sheet 1 of 33
5 4 3 2 1
5 4 3 2 1
ZH6 Power On Sequence BOM naming rule
From AC,Battery VIN
Items Function Name Description
+5VPCU +3VPCU
D D
From PWM SYS_HWPG(PCU) 1 3G Module 3G@
From Power Button NBSWON# 2 HDT debug function HDT@
From EC S5_ON
3
+3V_S5
+1.2V_S5 >10ms 4
From EC RSMRST# >100ms 5
From EC DNBSWON#
6
From SB PCIE_WAKE#
From SB to EC SUSB#,SUSC# SUSON 7
From EC SUSON 8
+3VSUS +1.8VSUS +SMDDR_VREF +SMDDR_VTERM
9
From PWM HWPG_1.8V (SUS) MAINON
From EC MAINON 10
+5V +3V +2.5V +1.8V +1.5V 11
C C
From PWM HWPG_1.5V,HWPG_2.5V
VRON
12
From EC VRON
+VCC_CORE 13
From PWM CPU_COREPG +1.2V_ON
14
From EC +1.2V_ON
15
From EC +1.2V
From PWM HWPG_1.2V +1.2V_ON+RC 16
From EC +1.2V_ON+RC 17
From EC +NB_CORE
18
From PWM HWPG_1.2V_NB
HWPG 19
From EC ECPWROK 20
NB_PWRGD -22ms~500ms
21
B
SB_PWRGD 47ms~66ms B
From SB CPU_PWRGD 71ms~73ms 22
From SB PLTRST# PCIRST# 1.9ms~2.1ms 23
From SB LDT_RST#
24
From SB LDT_STOP#
25
*Note: EC will sampling SUSB# &
SUSC# every 5ms.
AMD SB710 SMBUS Table EC SMBUS Table
CLK GEN RAM Mini Card (WLAN) Battery CPU thermal Sensor EC EEPROM
SB710 SDATA0/SCLK0(+3V) V V V EC775 SDATA1/SCLK1(+3VPCU) V
SB710 SDATA1/SCLK1(+3V_S5) EC775 SDATA2/SCLK2(+3VPCU) V
Power Plane +3V +3V +3V EC775 SDATA3/SCLK3(+3VPCU) V
A A
MOS CKT Reserve Reserve Reserve EC775 SDATA4/SCLK4(+3VPCU)
Power Plane +3VPCU +3V +3VPCU
MOS CKT X X X
Quanta Computer Inc.
PROJECT : ZH6
Size Document Number Rev
1A
SYSTEM INFORMATION
Date: Monday, August 24, 2009 Sheet 2 of 33
5 4 3 2 1
5 4 3 2 1
60 ohm, 0.5A CLOCKS name UMA DISCRETE Clock pin function
+1.2V L25 +1.2V_CLKVDDIO
BLM18PG221SN1D/1.4A/220ohm_6 NBGFX_CLKP RP49 STUFF RP49 STUFF to NB for VGA reference clock
600 ohms@100Mhz C252 NBGFX_CLKN
C224 C247 C246 C227 C385
22U/6.3V_8
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
EXT_GFX_CLKP RP48 NC RP48 STUFF to M86-M external reference clock
EXT_GFX_CLKN
D D
DCR: 0.5 ohm NBGPP_CLKP to NB for RX780 for PCIEX2 interface reference clock only
600 ohms@100Mhz NBGPP_CLKN RP43 NC RP43 NC RS780 is internal share with AC-LINK clock,RS780 not need
+3V_CLKVDD
+3V L37 +3V_CLKVDD
BLM18PG221SN1D/1.4A/220ohm_6
60 ohm, 0.5A C235 SBLINK_CLKP to NB for AC-LINK reference clock
C228 C248 C391 C225 C226 C388 C244 SBLINK_CLKN RP51 STUFF RP51 STUFF
22U/6.3V_8
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
EMI reserved
R158 *261_4
U6
+3V_CLKVDD 4 50 R164 0_4 CPUCLKP
VDDDOT CPUK8_0T CPUCLKP 6
16 49 R154 0_4 CPUCLKN
VDDSRC CPUK8_0C CPUCLKN 6
26
VDDATIG
+3V
Place very 35
VDDSB_SRC
40 30 NBGFX_CLKP
close to 48
VDDSATA ATIG0T
29 NBGFX_CLKN
NBGFX_CLKP 11
VDDCPU ATIG0C NBGFX_CLKN 11
C/G 55 28 LASSO_CLKP
LASSO_CLKP 21
VDDHTT ATIG1T LASSO_CLKN
56 27 LASSO_CLKN 21
L24 +3V_CLK_VDDA VDDREF ATIG1C
63
BLM18PG221SN1D/1.4A/220ohm_6 VDD48
37 SBSRC_CLKP
SB_SRC0T SBSRC_CLKP 13
C245 C240 11 36 SBSRC_CLKN
VDDSRC_IO0 SB_SRC0C SBSRC_CLKN 13
2.2u/6.3V_6 0.1u/10V_4 17 32 SBLINK_CLKP
VDDSRC_IO1 SB_SRC1T SBLINK_CLKP 11
25 31 SBLINK_CLKN
C VDDATIG_IO SB_SRC1C SBLINK_CLKN 11 C
34
+1.2V_CLKVDDIO VDDSB_SRC_IO
47
VDDCPU_IO PCIE_MINI1_CLKP
22 CLK_PCIE_WLAN 20
SRC0T PCIE_MINI1_CLKN
21 CLK_PCIE_WLAN# 20
SRC0C PCIE_MINI2_CLKP
1 20 CLK_PCIE_3G 20
GND48 SRC1T PCIE_MINI2_CLKN
7 19 CLK_PCIE_3G# 20
GNDDOT SRC1C
10 15
GNDSRC0 SRC2T
18 14
C238 33P/50V_4 CG_XIN GNDSRC1 SRC2C PCIE_LAN_CLKP
24
33
GNDATIG QFN64 SRC3T
13
12 PCIE_LAN_CLKN
CLK_PCIE_LAN 22
GNDSB_SRC SRC3C CLK_PCIE_LAN# 22
43 9 CLK48MUSB
Y3 GNDSATA SRC4T
46 8
GNDCPU SRC4C
14.318MHz 52
GNDHTT C249
60
C242 33P/50V_4 CG_XOUT GNDREF *10P/50V_4
42 T93
SRC6T/SATAT
41 T87
CG_XIN SRC6C/SATAC CLK_VGA_27M_SS
61 6 T108
CG_XOUT X1 SRC7T/27M_SS CLK_VGA_27M_NSS
Ver.B update XTAL. 62
X2 SRC7C/27M_NS
5 T107
+3V
2 54 NBHTREFCLK0P R183 0_4 NBHT_REFCLKP
8,14,20 SCLK0 SMBCLK HTT0T/66M NBHT_REFCLKP 11
3 53 NBHTREFCLK0N R176 0_4 NBHT_REFCLKN
8,14,20 SDATA0 SMBDAT HTT0C/66M NBHT_REFCLKN 11
CLK_PD# R175 8.2K_4 CLK_PD# 51 64 CLK48MUSB R215 33_4 CLK_48M_USB
PD# 48MHz_0 CLK_48M_USB 14
CLKREQ0# 23 59 SEL_HT66
CLKREQ1# CLKREQ0# REF0/SEL_HTT66 SEL_SATA R194 33_4
45
CLKREQ1# REF1/SEL_SATA
58 EXT_SB_OSC 13 Ra
44 57 SEL_27 R189 158/F_4
CLKREQ3# CLKREQ2# REF2/SEL_27
39
CLKREQ3# Rb
38 R186 90.9/F_4
CLKREQ4# EXT_NB_OSC 11
B B
TGND0
TGND1
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