Service Manuals, User Guides, Schematic Diagrams or docs for : acer Acer TravelMate 6493_Compal_JAQ10_LA-4311P_Rev0.4
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A B C D E
1 1
Compal Confidential
JAQ10 M/B Schematics Document
2 2
Intel Penryn Processor with Cantiga + DDRIII + ICH9M
3
2008-04-21 3
REV:0.4
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/09/29 Deciphered Date 2007/09/29 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom JAQ10 M/B Schematic 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, April 15, 2008 Sheet 1 of 44
A B C D E
5 4 3 2 1
Montevina Commercial UMA
Compal confidential
File Name : JAQ10 CK505
Thermal Sensor Mobile Penym
EMC1402-1 Clock Generator
uFCPGA-478 CPU SLG8SP553V
page 4
D
LED page 15 D
page 4,5,6
page 34
LCD conn
page 17
Fan Control
page 4 H_A#(3..35) FSB
CRT CNN H_D#(0..63)
667/800/1066MHz 1.05V
RTC CKT. page 16
page 19 Dual Channel LVDS
Docking
CRT
Analog SW Intel Cantiga GM DDR3 800/1066 MHz 1.5/0.75V
DDR3-SO-DIMM X2
BANK 0, 1, 2, 3
Power On/Off CKT. PI5C330 page 13,14
DVI BUS FCBGA 1329 Dual Channel
page 31 DVI-D CNN 7318
page 30
page 7,8,9,10,11,12
DC/DC Interface CKT. Docking Analog
page 33 DVI PI3HDMI412
DMI X4
TI 1394A 1394-1
TSB43AB22A 1394-2
PCI-E BUS x 6 To Docking
C IEEE 1394-1 iTPM C
IEEE 1394-2 HDCP PCI BUS
iAMT 4.0 Card reader
Mini-Card 1 Giga LAN USB2.0 x 12 OZ711MZ0 5 in 1 Slot
USB 2.0 To Docking PCI-e WLAN page 22 INTEL Intel ICH9M-E Azalia
Card BUS /
BOAZ-LM mBGA-676
PCI-e page 23 Reader PCMCIA
Mini-Card 2 page 18,19,20,21
Controller CONN
For 3G
page 22
SMBUS Smart
Analog Switch
SATA BUS X 6
10/100/1000 Card
SB SPI
USB P7~8 PI3L500-A
USIM page 23
USB P4~6 USB Port X 3
page28
CNN
LPC BUS
MODEM
Bottom Dock
USB P3 BT Conn USB x 1
Parallel Port USB P1
Transfomer
To Docking SPI ROM USB P0 Fingerprinter USB USB x1(Camara)
Serial Port GSL5009 23
page MX25L6405D x1 AES1610 on LVDS CNN
B page28 B
4MB X 1 or
PS2 K/B 2MB X 2 ?? RJ11 Conn
RJ45 CONN MDC Module page 29
page 23 page 25 To Docking
EnE KB926
PS2 Mouse page 33
Audio CKT APA2057
ALC 268 HP JACK
1 or 2 SATA BUS
page 24
page 26 MIC JACK
PS2 BUS X 3
VGA Parallel Port LPC BUS 2.5" SATA HDD
To Docking Serial Port
SIO IT8305E
page 28 Connector 0 page 22 To Docking
S-Video DEL TV Function
EC SPI
DEV MediaBay CNN
M/B MediaBay CNN
FIR
DVI
page 29 PS2 K/B
ODD / HDD Board
To Docking PS2 Mouse Int.KBD
page 33 2.5" SATA HDD Connector
S/PDIF
A A
SPI ROM SATA ODD Connector
Mic in/ Line in / Line out Touch Pad MX25L1005
Track point
CONN.
page 34 page 34
Power JACK
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/09/29 Deciphered Date 2007/09/29 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C JAQ10 M/B Schematic 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 18, 2008 Sheet 2 of 44
5 4 3 2 1
A B C D E
SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Voltage Rails
Full ON HIGH HIGH HIGH HIGH ON ON ON ON
Power Plane Description S1 S3/M1 S5/M1 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
VIN Adapter power supply (19V) N/A N/A N/A S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
B+ AC or battery power rail for power circuit. N/A N/A N/A
1
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF 1
+CPU_CORE Core voltage for CPU ON OFF OFF
+0.75VS 0.75VS power rail for DDR3 terminator ON OFF/ON OFF/ON S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.05VS 1.05V switched power rail ON OFF OFF
+1.05VM 1.05VM switched power rail ON OFF/ON OFF/ON
+1.5V 1.5V power rail for HDA ON ON OFF/ON Board ID / SKU ID Table for AD channel
+1.5VS 1.5V switched power rail ON OFF OFF Vcc 3.3V +/- 5%
+1.8VS 1.8V switched power rail ON OFF OFF Ra/Rc/Re 100K +/- 5%
Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+3VALW 3.3V always on power rail ON ON ON* 0 0 0 V 0 V 0 V
+3V_LAN 3.3V power rail for LAN ON OFF/ON OFF/ON 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+3VS 3.3V switched power rail ON OFF OFF 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+5VALW 5V always on power rail ON ON ON 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+5VS 5V switched power rail ON OFF OFF 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+VSB VSB always on power rail ON ON ON* 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+RTCVCC RTC power ON ON ON* 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
7 NC 2.500 V 3.300 V 3.300 V
2 2
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
BOARD ID Table BTO Option Table
External PCI Devices Board ID PCB Revision BTO Item BOM Structure
Device IDSEL# REQ#/GNT# Interrupts
0 0.1 Discrete PM@
1 0.2 UMA GM@
1394 TI AD21 3 PIRQ-F
2 0.3 CIR CIR@
PCMCIA + Card Reader + Small Card AD22 2 PIRQ-E
3 1.0 8111C 8111C@
4 1A 8102E 8102E@
External PCI-e Devices 5 ALC888VC 888VC@
Device PORT NO. Interrupts
6 ALC888VB 888VB@
7 ALC268 268@
MINI CARD1 WLAN P1 ??
MINI CARD2 3G P2 ??
DOCKING PCI-E P5 ??
INTEL GIGA LAN P6 ??
3 3
EC SM Bus1 address EC SM Bus2 address
Device Address Device Address
Smart Battery 0001 011X b ADI ADM1032 1001 100X b
GMT G781-1 1001 101X b
ICH9M SM Bus address
Device Address
Clock Generator 1101 001Xb
(ICS9LPRS365)
4 4
DDR DIMM0 1001 000Xb
DDR DIMM2 1001 010Xb
HDMI Analog S/W 1100 000Xb
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/09/20 Deciphered Date 2008/09/20 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
JAQ10 M/B Schematic
Date: Tuesday, April 15, 2008 Sheet 3 of 44
A B C D E
5 4 3 2 1
D D
+VCCP
XDP_TDI R60 1 2 150_0402_1%
XDP_TMS R50 1 2 39_0402_1%
CONN@
(7) H_A#[3..16]
JP2A XDP_BPM#5 R61 1 2 54.9_0402_1%
H_A#3 J4 H1 H_ADS#
A[3]# ADS# H_ADS# (7)
ADDR GROUP_0
H_A#4 L5 E2 H_BNR# @
A[4]# BNR# H_BNR# (7)
H_A#5 L4 G5 H_BPRI#
A[5]# BPRI# H_BPRI# (7)
H_A#6 K5 XDP_TRST# R62 1 2 56_0402_5%
H_A#7 A[6]# H_DEFER#
M3 A[7]# DEFER# H5 H_DEFER# (7)
H_A#8 N2 F21 H_DRDY# XDP_TCK R49 1 2 54.9_0402_1%
A[8]# DRDY# H_DRDY# (7)
H_A#9 J1 E1 H_DBSY#
A[9]# DBSY# H_DBSY# (7)
H_A#10 N3
H_A#11 A[10]# H_BR0#
P5 A[11]# BR0# F1 H_BR0# (7)
H_A#12 P2 A[12]#
CONTROL
H_A#13 L2 D20 H_IERR# T1 PAD
H_A#14 A[13]# IERR# H_INIT#
P4 A[14]# INIT# B3 H_INIT# (19)
H_A#15 P1
H_A#16 A[15]# H_LOCK#
R1 A[16]# LOCK# H4 H_LOCK# (7)
H_ADSTB#0 M1
(7) H_ADSTB#0 ADSTB[0]#
C1 H_RESET#
RESET# H_RESET# (7)
H_REQ#0 K3 F3 H_RS#0
(7) H_REQ#0 REQ[0]# RS[0]# H_RS#0 (7)
H_REQ#1 H2 F4 H_RS#1
(7) H_REQ#1 REQ[1]# RS[1]# H_RS#1 (7)
H_REQ#2 K2 G3 H_RS#2
(7) H_REQ#2 REQ[2]# RS[2]# H_RS#2 (7)
H_REQ#3 J3 G2 H_TRDY#
(7) H_REQ#3 REQ[3]# TRDY# H_TRDY# (7)
H_REQ#4 L1
(7) H_REQ#4 REQ[4]#
G6 H_HIT#
(7) H_A#[17..35] HIT# H_HIT# (7)
H_A#17 Y2 E4 H_HITM#
C A[17]# HITM# H_HITM# (7) C
H_A#18 U5
H_A#19 A[18]#
R3 A[19]# BPM[0]# AD4 T14 PAD
ADDR GROUP_1
H_A#20 W6 AD3 T15 PAD
H_A#21 A[20]# BPM[1]#
U4 A[21]# BPM[2]# AD1 T16 PAD
H_A#22 Y5 AC4 T17 PAD
A[22]# BPM[3]#
XDP/ITP SIGNALS
H_A#23 U1 AC2 T18 PAD
H_A#24 A[23]# PRDY# XDP_BPM#5
R4 A[24]# PREQ# AC1
H_A#25 T5 AC5 XDP_TCK +3VS
H_A#26 A[25]# TCK XDP_TDI
T3 A[26]# TDI AA6
H_A#27 W2 AB3 T19 PAD
H_A#28 A[27]# TDO XDP_TMS
W5 A[28]# TMS AB5
0.1U_0402_16V4Z
H_A#29 Y4 AB6 XDP_TRST# 1
H_A#30 A[29]# TRST# XDP_DBRESET#
U2 A[30]# DBR# C20 XDP_DBRESET# (20)
H_A#31 V4 C2
H_A#32 A[31]#
W3 A[32]#
H_A#33 2
AA4 A[33]# THERMAL
H_A#34 AB2 H_PROCHOT# R13 1 2 68_0402_5% U1
H_A#35 A[34]# +VCCP SMB_EC_CK2
AA3 A[35]# PROCHOT# D21 1 VDD SCLK 8 SMB_EC_CK2 (33,38)
H_ADSTB#1 V1 A24 H_THERMDA_R R14 1 2 0_0402_5% H_THERMDA
(7) H_ADSTB#1 ADSTB[1]# THERMDA
B25 H_THERMDC_R R15 1 2 0_0402_5% H_THERMDC H_THERMDA 2 7 SMB_EC_DA2
THERMDC D+ SDATA SMB_EC_DA2 (33,38)
H_A20M# A6 C3
(19) H_A20M# A20M#
ICH
H_FERR# A5 C7 H_THERMTRIP# 1 2 H_THERMDC 3 6
(19) H_FERR# FERR# THERMTRIP# H_THERMTRIP# (7,19) D- ALERT/THERM2
H_IGNNE# C4 2200P_0402_50V7K
(19) H_IGNNE# IGNNE#
4 THERM GND 5
H_STPCLK# D5
(19) H_STPCLK# STPCLK#
H_INTR C6 H CLK
(19) H_INTR LINT0 ADT7421ARMZ-REEL_MSOP8
H_NMI B4 A22 CLK_CPU_BCLK
(19) H_NMI LINT1 BCLK[0] CLK_CPU_BCLK (15)
H_SMI# A3 A21 CLK_CPU_BCLK# SA00001Z700
(19) H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# (15)
Address:100_1100
M4 RSVD[01]
N5 RSVD[02] H_THERMDA, H_THERMDC routing together,
T2
B
V3
RSVD[03]
RSVD[04]
Trace width / Spacing = 10 / 10 mil 2007/09/011 FAN1 Conn B
B2
RESERVED
RSVD[05]
D2 RSVD[06]
D22 +5VS
RSVD[07] C638 +5VS
D3 RSVD[08]
F6 RSVD[09] 1 2 change D54 and C639 4/9
10U_0805_10V4Z
U19
1 VEN GND 8
3
2
Penryn 2 7
+VCC_FAN1 VIN GND D54
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