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5 4 3 2 1
D D
C C
BAP/BXP30
B
A02 Build B
2010.05.22
A A
TITLE
INVENTEC
BAP/BXP30
SIZE CODE DOC.NUMBER REV
Custom CS CS-131 X01
CHANGE by IEC DATE Saturday, May 22, 2010 SHEET 1 of 41
5 4 3 2 1
8 7 6 5 4 3 2 1
1. Schematic Page Description :
BAP30/BXP30 Schematic Ver : X01
D
01. Title 16. Processor(2/3) 31. EASY PORT D
02. Schematic Page DESCR 17. Processor(3/3) 32. Hybrid Switch (1/2)
03. Block Diagram 18. PCH_RTC,SATA,PCI-E,CLK 33. Hybrid Switch (2/2)
04. Power Block Diagram 19. PCH_DMI,MISC,LVDS,CRT 34. N10x PCIE/ I/O(1/6)
05. Annotations 20. PCH_USB, PCI,NVRAM,XDP 35. N10x Memory(2/6)
06. Schematic Modify 21. PCH Power 1 36. N10x Power(3/6)
07. Timing Diagram 22. PCH Power 2 37 1.8V/1.05V/NVDD(4/6)
08. PWR_Adaptor in/Charge 23. Clock Generator 38. DDR3 VRAM
09. PWR_CPU Core Power 24. DDR3 SDRAM SO-DIMM 0/1 39. CX20672-11Z
10. PWR_Graphics Core 25. LCD/CAM/DVI PLUG/CRT 40. Card reader/ Audio
C
11. PWR_DDR PWR 26. USB/LID/LED 41. POWER SEQUENCE C
12. PWR_1.1VS_VTT/1.1VS 27. BCM57760
13. PWR_5VA/5VLA/3VA/3VLA 28. 3G/USIM
14. PWR_3VS/5VS/1.8VS/5VUSB 29. HDD/ODD/DAUGHTER CONN
15. Processor(1/3) 30. KBC ITE8502E*
2. PCI & IRQ & DMA Description :
IDSEL CHIP PCIINT CHIP Interface REQ CHIP
B B
None None None
3. USB & PCI-Express & SATA Description :
USB Port DEVICE USB Port DEVICE PCI-E DEVICE SATA DEVICE
Port 0 System (ESATA) Port 7 Bluetooth Port 1 New Card Port 1 HDD
Port 1 System Port 8 Port 2 Docking Port 2 E-SATA
A
Port 2 System Port 9 Web Cam Port 3 Mini Card(WLAN) Port 4 BAY A
Port 3 System Port 10 Port 4 Mini Card(3G) Port 5 None
Port 4 CardReader Port 11 FingerPrint Port 5 Mini Card(ROBSON)
Port 5 Port 12 Port 6 Giga-LAN
TITLE
INVENTEC
BAP/BXP30
Port 6 Port 13 3G schematics page DESCR
SIZE CODE DOC.NUMBER REV
Custom CS CS-131 X01
CHANGE by IEC DATE Friday, May 21, 2010 SHEET 2 of 41
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
3. Block Diagram : FAN
P.10
133MHz+/- x2
Thermal x1
D
AUBURNDALE CLK_GEN 100MHz+/- D
P.10 N10X 48MHz x1
RTM875N 27MHz/96MHz+/- x1
With DDR3
Maxium 512MB P.11
PCI-E x16 BUS CPU+GMCH
BGA 969P
RPGA,989P
SODIMM0
29mmx29mm
DVI
P.49 DDR3 1.5V
800/1066/1333MHz
37.5mmx37.5mm
SODIMM1
CRT & LVDS DDR3 1.5V P.17
LVDS 800/1066/1333MHz
LCD P.12-16
P.18
MUX
P.17
FDI DMI x4
RGB
CRT
P.19 LAN
C
CRT & LVDS RJ45 C
PCI-Express x1 2.5GHz
BCM57760 P.24
Ibexpeak-M P.24
PCI-Express x1 2.5GHz MiniCard #1
UMTS SIM Slot
HDD mBGA 1071pin Port#4 P.30 P.30
HALL SWITCH
P.32 MiniCard #2
PCI-Express x1 2.5GHz
P.18 WLAN
SATA 150
Port#3 P.30
Out
USB3 USB2 USB1 USB0 SPK
P.26
Port3 Port2 Port1 Port0 IntMic
IN
P.30 P.31 P.31 P.31 HDA 24MHz Audio Stereo P.27
USB 2.0/1.1 EHCI#1 IN Analog In
Codec
Support MDC1.5 P.27
S0~S3 state
P.31
USB 2.0/1.1
CX20671 Out Analog Out
B USB7 USB6 USB5 USB4 RJ11 P.27 B
P.26
P.31
Bluetooth CardReader Out
P.28 SPDIF P.27
P.31 P.31 P.32
LPC 3.3V 33MHz
USB10 USB9 USB8
FingerPrint Web Cam PMU&KBC
ITE8512F 80Port
P.28 P.31 P.28
P.33 P.30
USB 2.0/1.1 EHCI#2
Support
S0~S3 state
USB 2.0/1.1 KB
P.33
USB13 USB12 USB11 Glide Pad
UMTS Stick Point
P.31
P.18 P.18
MiniCard #1
5 In 1
P.20-23
A CardReader A
SPI Flash
solt 27mmx25mm
ROM P.33
SPI
Flash ROM
P.33 TITLE
INVENTEC
BAP/BXP30
Block Diagram
SIZE CODE DOC.NUMBER REV
Custom CS CS-131 X01
CHANGE by IEC DATE Friday, May 21, 2010 SHEET 3 of 41
8 7 6 5 4 3 2 1
5 4 3 2 1
Power Block Diagram :
Adaptor SS5P4 TPS51621 CPU core
20V
D D
ISL6251
TPS51611 VGFX_CORE
Battery 1 FDMC4435BZ
09V~12.6V
TPS51117 1.5V G2997 DIMM_VTT
FDS8884 1.5VS
C SC471 1.1VS_VTT C
DOCKING TPS51218 1.1VS
Adaptor
20V
TPS51125 5VA TPC6111 5VS
3VA TPC6111 3VS
B B
SI2301 dGPU_3VS G961 PEG_1.8VS
5VLA
For NV GE1
3VLA SI2301 EC_3VLA
SC471 NVVDD
A A
TPS51218 PEG_1.05V
For NV GE1
TPS51117 PEG_1.5V
TITLE
INVENTEC
BAP/BXP30
Power Block Diagram
SIZE CODE DOC.NUMBER REV
Custom CS CS-131 X02
CHANGE by IEC DATE Friday, May 21, 2010 SHEET 4 of 41
5 4 3 2 1
8 7 6 5 4 3 2 1
4. Net name Description :
Voltage Rails
DCIN Primary DC system power supply
3VLA 3.3V always on power rail by DCIN
5VLA 5.0V always on power rail by DCIN
D
EC_3VLA 3.3V always on power rail by 5VAUXON D
3VA 3.3V always on power rail by LATCH_ON
5VA 5.0V always on power rail by LATCH_ON
3VM 3.3V power rail by SUSM#
1.05VM 1.05V switched power rail by SUSM#
1.5V 1.5V switched power rail by SUSC#
1.8V 1.8V power rail by SUSC#
3VS 3.3V power rail by SUSB#
5VS 5.0V power rail by SUSB#
1.5VS 1.5V power rail by SUSB#
1.05VS 1.05V power rail by SUSB#
PWR_DIMM_VTT 0.75V DDR Termination Voltage by SUSB#
VGFX_CORE 1.05V power rail for UMA by SUSB#
PEG_1.8VS 1.8V switched power rail for NB9x by SUSB#
C PEG_PEX_1.1VS 1.1V switched power rail for NB9x by SUSB# C
PEG_NVDD Variable switched power rail for NB9x by SUSB#
Vcore_CPU Core switched power rail for CPU
Part Naming Conventions
C = Capacitor Q = Transistor
CN = Connector R = Resistor
D = Diode RP = Resistor Pack
F = Fuse U = Arbitrary Logic Device
L = Inductor Y = Crystal and Osc
Name Suffix
# = Active Low signal
NU = No Stuff
B
5. Board Stack up Description B
PCB Layers
Layer 1 Component Side, Microstrip signal Layer
Layer 2 Ground Plane
Layer 3 Stripline Layer
Layer 4 Power Plane
Layer 5 Stripline Layer
Layer 6 Stripline Layer
Layer 7 Ground Plane
Layer 8 Solder Side,Microstrip signal Layer
A A
TITLE
INVENTEC
BAP/BXP30
Annotations
SIZE CODE DOC.NUMBER REV
Custom CS CS-131 X01
CHANGE by IEC DATE Friday, May 21, 2010 SHEET 5 of 41
8 7 6 5 4 3 2 1
5 4 3 2 1
6.Schematic modify Item and History :
D D
C C
B B
A A
TITLE
INVENTEC
BAP/BXP30
schematics modify
SIZE CODE DOC.NUMBER REV
Custom CS CS-131 X01
CHANGE by IEC DATE Friday, May 21, 2010 SHEET 6 of 41
5 4 3 2 1
5 4 3 2 1
8.SYSTEM POWER SEQUENCE :
Power on/off sequence AC insert(First) Battery only Power on/off sequence
Power on sequence Power off sequence Power on sequence Power off sequence
SW OFF: RTCVCC SW OFF: RTCVCC
D 5VLA,3VLA 5VLA,3VLA D
5VAUXON 5VAUXON
EC_3VLA EC_3VLA
SW ON: PWR_SWIN# SW ON: PWR_SWIN#
LATCH_ON LATCH_ON
3VA,5VA 3VA,5VA
RSMRST# MRST#
PWR_BTN# PWR_BTN#
SUSB# SUSB#
SUSC# SUSC#
1.5V,1.8V 1.5V,1.8V
5VS,3VS 5VS,3VS
1.5VS,1.05VS 1.5VS,1.05VS
C 0.75VS_DIMM 0.75VS_DIMM C
+VCCP 99ms +VCCP 99ms
VCCP_PWRGD VCCP_PWRGD
VR_ON VR_ON
VCORE_GD VCORE_GD
CLK_PWROK CLK_PWROK
ICH_PWROK ICH_PWROK
PLT_RST# PLT_RST#
Power on/off sequence AC insert(S4) Suspend resume sequence(S3)
Suspend sequence Resume sequence
Power on sequence Power off sequence RTCVCC
RTCVCC
5VLA,3VLA
3VLA,5VLA
5VAUXON
5VAUXON
B B
EC_3VLA
EC_3VLA
PWR_SWIN#
PWR_SWIN#
LATCH_ON
LATCH_ON
3VA,5VA
3VA,5VA
RSMRST#
RSMRST#
PWR_BTN#
PWR_BTN#
SUSB#
SUSB#
SUSC#
SUSC#
1.5V,1.8V
1.5V,1.8V
5VS,3VS
5VS,3VS
1.5VS,1.05VS
1.5VS,1.05VS
0.75VS_DIMM
0.75VS_DIMM
+VCCP 99ms
+VCCP 99ms
A A
VCCP_PWRGD
VCCP_PWRGD
VR_ON
VR_ON
VCORE_GD
VCORE_GD
CLK_PWROK
CLK_PWROK
ICH_PWROK TITLE
INVENTEC
ICH_PWROK BAP/BXP30
PLT_RST# Timing Diagram
PLT_RST# SIZE CODE DOC.NUMBER REV
Custom CS CS-131 X01
CHANGE by IEC DATE Friday, May 21, 2010 SHEET 7 of 41
5 4 3 2 1
5 4 3 2 1
31 DOCK_ADPIN
DOCK_ADPIN D20
1
K
2
SS5P4-E3/86A 40V 5A TO277A 13,29,30 3VLA
L44
CN13
4 1 NFE31PT222Z1E9L 6A Murata Q4 3.5A
AM4825P 30V 11.5A SO8
G1 2 1 2 3 8 ADPIN
G2 2 7
C554
100K-5%-1/16W-0402
G3 3 1 6 R28
4
3
C553 0.1uF 50V 10% 0603 X7R
C555 10pF 50V 0.5% 0402 C0H
C552 0.1uF 50V 10% 0603 X7R
R49
G4 5 220K 1% 1/16W 0402
S
D
D
G
3P DC-IN 2DC2019-000121 SINGATRON
10pF 50V 0.5% 0402 C0H
D 6026B0172602 TH D
4
30 BATTERY1_IN
C25
4.7uF 25V 10% 0805 X5R + C561 H: no battery C15 R22 SHORT-0402-5MIL
6026B0172602 65W AL 68uF 25V 20% 6.3X5.8
L: battery insert
100pF 50V 5% 0402 NPO_NU
100pF 50V 5% 0402 NPO_NU
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