Service Manuals, User Guides, Schematic Diagrams or docs for : acer Acer TravelMate C110_Wistron_A1+_Rev-1
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A B C D E
DC/DC IMVP4
Switching Power
Max1907AETL 32
A1+ Block Diagram
INPUTS OUTPUT CPU
PIV Banias
4 DCBATOUT VCC_CORE 4
ULV/LV
900MHz/1GHz
1.2/1.05V DC/DC CLOCK uFCBGA
Generator 4,5
TPS5110 ICS950813CG 3 HOST BUS
33
INPUTS OUTPUTS 400MHz
1D2V_S0 CRT
DCBATOUT DDR 266 12
1D05V_S0 DDR Montara-GM
DRAM
6,7,8 LCD
Socket 9,10,11
13
DC/DC&CHARGER *2
Hub I/F CARDBUS
Max1645 SLOT * 1
36 20
3
IDE BUS PCI BUS R5C551 3
INPUTS OUTPUTS CARDBUS
HDD
AD+ BT+ 28 Ultra
DMA-100
ICH4-M & 1394
18,19
IEEE 1394
14,15,16 CONNECTOR
20
3V/5V/2D5V/1D8V LPC BUS
DC/DC
TPS5130 MINIPCI
35
USB2.0
INPUTS OUTPUTS 802.11b
USB1.1
802.11a 21
3D3V_S5
SIO BIOS KBC DEBUG
DCBATOUT 5V_S5
NS87392 ROM M38857 PORT MII LAN PHY
2D5V_S3
49LF004A-33-4C 82562ET
29 28 27 28 22 RJ-45 22
1D8D_S0
2
AC-LINK 2
CM8500/APL1805 USB 2.0
PORT Line-out
34 0,1
23
INPUTS OUTPUTS MODEM
FIR TOUCH INT AC 97
DAUGHTER
TFDU6102 DIGITIZER PAD KB BLUETOOTH CARD Codec
2D5V_S3 1D25V_DC_S0 23 13 27 27 21 CS4299-XQ
21 Line-in/Mic
3D3V_S5 1D5V_DC_S0
24 Amplifier
RJ-11 APA2020A 25
22
1 1
Port Replicator (100 PIN) Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
AC SEARIAL LINE LINE Title
BLOCK DIAGRAM
IN RJ11 RJ45 PORT CRT PRINTER USB*2 PS2 MIC IN OUT Size
A3
Document Number
A1+
Rev
-1
Date: Monday, March 03, 2003 Sheet 1 of 39
A B C D E
A B C D E
A1+ PCI Routing Table ver. 0.1
DEVICE IDSEL IRQ DREQ/DGNT
R5C551 AD17 A/D REQ0#/GNT#0
Mini PCI AD21 B/C REQ3#/GNT#3
4 4
N/B H/W TRAP
Pin Name Strap Description Configuration I/F Type Buffer Type
LCLKCTLB CPU Strap Low=Banias processor (default) GPIO
Key:PSB/Sys Mem Core/GFX DVO
GST(1) Clock Config:Bit_1 Core/(CL/CH(Core Clock)):
GST(0) Clock Config:Bit_0 00(def)=Config#0
(400/266/200/(133/200))
01=Config#1
(400/200/200/(100/200))
10=Config#2
(400/200/133/(100/133))
WOL & WOR
WOL
3 3
AC Adaptor Battery Only
S1 Can Can
S3 Can No
S4 Can No
S5 Can No
3D3V_S5 3D3V_S0
3D3V_S0
ICH-4 SMBC_ICH CK-408_SCL
SMBD_ICH CK-408_SDA
DIMM
2 2
3D3V_S0
CLK. Gen.
INV_SMB_CTL
INV_SCL
inverter
INV_SDA EEPROM
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
REVISION HISTORY
Size Document Number Rev
A3 A1+ SA
Date: Thursday, December 26, 2002 Sheet 2 of 39
A B C D E
A B C D E
Freq. Setting
Freqency Select
FS1 FS0 CPU AGP PCI CPU,3V66,PCI
FS4 FS3 FS2
0 0 100.00 66.66 33.33 0 0 0 Standard Clocking 0.3% Center Spread
0 1 133.33 66.66 33.33 0 0 1 Standard Clocking 0 to -0.5%, Down Spread
0 1 0 Standard Clocking 0.3% Center Spread
1 0 200.00 66.66 33.33 0 1 1 Standard Clocking 0 to - 0.75%, Down Spread
1 1 166.66 66.66 33.33 1 0 0 Pwr Save Clocking Spread Off
1 0 1 3% Overclocking 0.3% Center Spread
4 1 1 0 5% Overclocking 0.3% Center Spread 4
1 1 1 10% Overclocking 0.3% Center Spread PLACE NEAR EACH PIN
CLKGEN_+3VRUN
L11
1 2 3D3V_S0
MLB-201209-19
1
1
1
1
1
1
1
1
C65
C450 C70 C451 C51 C48 C50 C452
SC10U10V5ZY SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1 SCD1U10V2MX-1
2
2
2
2
2
2
2
2
L9
CLKGEN_APWR 1 2 3D3V_S0
MLB-201209-18
1
1
C463 C69 C466
SCD1U10V2MX-1 SCD01U16V2KX SC10U10V5ZY
2
2
R268 1 2 0R2-0 RN39
4 CLK_ITP_CPU
R243 1 2 42D2R3F CLK_ITP_R 2 3 CLK_ITP_CK408
R242 1 2 42D2R3F CLK_ITP#_R 1 4 CLK_ITP#_CK408
R267 1 2 0R2-0 U46
4 CLK_ITP_CPU# 3D3V_S0
SRN33-2-U2 Filtering CKT for
R266 1 2 0R2-0 RN38 52 8
6 CLK_MCH
R241 42D2R3F CPUCLKT0 VDDPCI 48MHz power plane
1 2 CLK_MCH_R 2 3 CLK_MCH_CK408
51 14 L6
R240 42D2R3F CPUCLKC0 VDDPCI
1 2 CLK_MCH#_R1 4 CLKGEN_48MPWR 1 2
R265 1 2 0R2-0 49 50
6 CLK_MCH# CPUCLKT1 VDDCPU
1
1
1
SRN33-2-U2 CLK_MCH#_CK408
48 46 MLB-201209-18
R264 10R2 RN37 CPUCLKC1 VDDCPU C380 C36 C49 C30
4 CLK_CPU 1 2
R239 1 2 42D2R3F CLK_CPU_R 2 45
3 CLK_CPU_CK408 26 SC10U10V5ZY SCD01U50V3KX SCD1U10V2MX-1 SCD1U16V
2
2
2
3 R238 42D2R3F CPUCLKT2 VDDA 3
1 2 CLK_CPU#_R1 44
4 CLK_CPU#_CK408 37
R263 10R2 CPUCLKC2 VDD48
4 CLK_CPU# 1 2 32
SRN33-2-U2 VDD3V66
19
VDD3V66
CK-408_FS1 55 1
FS1 VDDREF
SC-3-1 CK-408_FS0 54
FS0
33R2 5 PCLK_DEBUG_CK408 R321 1 2 33R2
3D3V_S0 PCICLK_F0 PCLK_DEBUGBD 28
R280 1 2 CLK48_ICH_CK408 39 6 PCLK_FWH_CK408 R320 1 2 33R2
14 CLK48_ICH 48MHZ_USB/FS2 PCICLK_F1 PCLK_FWH 28
R279 1 2 CLK48_DREF_CK408 38 7 CLKPCIF_ICH_CK408 R311 1 2 33R2
7 CLK48_DREF 48MHZ_DOT ASEL/PCICLK_F2 CLKPCIF_ICH 15
33R2 33R2
R282 1 2 DREFSSCLK_CK408 35
7 DREFSSCLK 3V66_1/VCH_CLK/FS3
1
FS4 33 10
R62 3V66_0/FS4 PCICLK0
11 PCLK_PCM_CK408 R315 1 2 33R2
PCLK_PCM 18
10KR2 E_PCICLK1/PCICLK1
12 PCLK_MINI_CK408 R314 1 2 33R2
PCLK_MINI 21
PCICLK2
CK-408_MULT0 43 13
MULTSEL E_PCICLK3/PCICLK3 R313 33R2
R61 15 PM_STPCPU# 53 16 PCLK_KBC_CK408 1 2 PCLK_KBC 27
2
CPU_STOP# PCICLK4
29 CK_PWRSAVE# 1 2 CK-408_PWRSAVE# 40 17
PWRSAVE# PCICLK5 R312 33R2
15 PM_STPPCI# 34 18 PCLK_SIO_CK408 1 2 PCLK_SIO 29
PCI_STOP# PCICLK6
DUMMY-0R2-0 CK-408_IREF 42
R289 33R2 IREF R319 33R2
15 CLK14_ICH 1 2 CLK14_CK408 56 21 CLK66_ICH_CK408 1 2 CLK66_ICH 14
REF 3V66_2
22 CLK66_GMCH_CK408 R318 1 2 33R2
CLK66_GMCH 7
3V66_3
23
R65 33R2 3V66_4
29 CLK14_SIO 1 2 24
3V66_5
4
GND
9 25 PM_SLP_S1# 15
GND PD#
15 29 CK-408_SDA
GND SDATA CK-408_SCL
20 30
GND SCLK
1
27 28 CLK_PWRGD# 32
2
R278 GND VTT_PWRGD# 2
47 C424
GND
41
475R3F GND
36 2 CK-408_X1 1 2
GND X1
31 3 CK-408_X2
2
GND X2
2
SC10P50V2JN-1
X3
ICS950813YGT
X-14D318MHZ-1-U
C414
1
3D3V_S0 3D3V_S0
1 2
3D3V_S0
1
3D3V_S0 SC10P50V2JN-1
R371
3
4
1
1
10KR2 3D3V_S0
RN5
1
1
1
R271 R284
2
SRN10KJ
1
DUMMY-R2 DUMMY-R2
SMB_CLK_EN R42 R274 R60 R43
DUMMY-R2 DUMMY-R2 DUMMY-R2 10KR2
2
1
2
2
1
G
Q35 CK-408_FS1
2
2
2
2
13,15 SMBC_ICH 3 2 CK-408_SCL CK-408_SCL 9 CLK48_ICH CK-408_FS0
2N7002 DREFSSCLK CK-408_MULT0
1
S
FS4
D
G
1
1
1
Q38
1
1
1
3 2 CK-408_SDA R275 R281
13,15 SMBD_ICH CK-408_SDA 9 10KR2 10KR2
1
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