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A B C D E
1 1
Compal Confidential
2 2
NAWF3/F4/H3 M/B Schematics Document
Intel Penryn Processor with Cantiga + DDRIII + ICH9M
3
2009-09-01 3
REV:0.1
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/08/25 Deciphered Date 2009/08/25 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NAWF3 M/B LA-4854P Schematic
Date: Wednesday, September 02, 2009 Sheet 1 of 45
A B C D E
A B C D E
Compal Confidential
Intel Penryn Processor Thermal Sensor Clock Generator
Fan Control
Model Name : NAWF3 page 4
EMC 1402 ICS9LPRS387
uPGA-478 Package page 4 page 16
File Name : LA-4854P
(Socket P) page 4,5,6
P/N : DA60000FJ00
1 1
P/N : FSB
H_A#(3..35) 667/800/1066MHz H_D#(0..63)
LCD Conn. CRT Conn.
page 17 page 18
Memory BUS(DDRIII) 204pin DDRIII-SO-DIMM X2
Intel Cantiga
Dual Channel BANK 0, 1, 2, 3 page 14,15
1.5V DDRIII 800/1066
LVDS uFCBGA-1329
page 7,8,9,10,11,12,13
DMI C-Link USB conn x2 Bluetooth CMOS Card Reader
USB port 0, 6 Conn Camera Realtek RTS5159
page 28 page 28 page 17 page 24
PCI-Express
2
Intel ICH9-M 3.3V 48MHz USB
2
3.3V 24.576MHz/48Mhz HD Audio
S-ATA
BGA-676
New Card MINI Card x1 LAN ATHEROS page 19,20,21,22
Socket WLAN AR8132 port 0 port 1
page 28 page 27 page 26 MDC 1.5 HDA Codec Audio AMP
Conn 31 ALC272
15 " HDD page page 32 page 33
15" and 17" ODD
Conn. Conn.
page 23
RJ45 page 23
Phone Jack x2
page 27 port 4 page 33
17 " HDD LPC BUS
Conn.
3 3
page 23
LS-4851P ENE KB926 D2
RTC CKT. POWER/B Conn. page 29
page 20 page 30
Power On/Off CKT. Touch Pad Int.KBD
page 30 page 30
page 31 LS-4852P
ODD/B Conn.
page 23
DC/DC Interface CKT. BIOS
LS-4853P
page 34 BATTERY/B Conn. page 30
page 36
Power Circuit DC/DC
4
page 35,36,37,38 4
39,40,41,42
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/08/25 Deciphered Date 2009/08/25 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NAWF3 M/B LA-4854P Schematic
Date: Wednesday, September 02, 2009 Sheet 2 of 45
A B C D E
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SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Voltage Rails
Full ON HIGH HIGH HIGH HIGH ON ON ON ON
Power Plane Description S1 S3 S5 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
VIN Adapter power supply (19V) N/A N/A N/A S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
B+ AC or battery power rail for power circuit. N/A N/A N/A
1
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF 1
+CPU_CORE Core voltage for CPU ON OFF OFF
+0.75VS 0.75V power rail for DDR ON OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.05VS 1.05V switched power rail ON OFF OFF
+1.5V 1.5V power rail for HDA ON ON OFF Board ID / SKU ID Table for AD channel
+1.5VS 1.5V switched power rail ON OFF OFF Vcc 3.3V +/- 5%
+1.8V 1.8V power rail for DDR ON ON OFF Ra/Rc/Re 100K +/- 5%
Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+2.5VS 2.5V switched power rail ON OFF OFF 0 0 0 V 0 V 0 V
+3VALW 3.3V always on power rail ON ON ON* 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+3V 3.3V power rail for SB ON ON OFF 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+3V_LAN 3.3V power rail for LAN ON ON ON 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+3VS 3.3V switched power rail ON OFF OFF 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+5VALW 5V always on power rail ON ON ON* 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
+5VS 5V switched power rail ON OFF OFF 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+VSB VSB always on power rail ON ON ON* 7 NC 2.500 V 3.300 V 3.300 V
2 2
+RTCVCC RTC power ON ON ON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
BOARD ID Table BTO Option Table
External PCI Devices Board ID PCB Revision BTO Item BOM Structure
0 GM45 GM@
Device IDSEL# REQ#/GNT# Interrupts
1 0.1 (PVT2) GL40 GL@
2 15" 15@
3 17" 17@
4 8114 8114@
5 8132 8132@
6
7 PCIE table
PCIE port1 Express Card(Reserved)
EC SM Bus1 address EC SM Bus2 address USB table
PCIE port2 Wireless Card
3
Port0 MB USB Conn. 3
Device Address Device Address UHCI1
Port1 PCIE port3 PCIE LAN
Smart Battery 0001 011X b ADI ADT7421 1001 100X b
Port2
EEPROM(24C16/02) 1010 000X b EHCI1 UHCI2 PCIE port4
Port3 CMOS Camera
GMT G781-1 1001 101X b
Port4 Card Reader PCIE port5
UHCI3
Port5 New Card(Reserved)
PCIE port6
Port6 MB USB Conn.
UHCI4
Port7
ICH9M SM Bus address SATA table
EHCI2 Port8 Blue Tooth
UHCI5
Port9 SATA port0 HDD
Device Address
Port10 Wireless Card
Clock Generator
UHCI6 SATA port1 ODD
1101 001Xb Port11
(ICS9LPRS387, SLG8SP556V)
DDR DIMM0 1001 000Xb
SATA port2
DDR DIMM2 1001 010Xb SATA port3
SATA port4 for 17" 2nd HDD
4 4
SATA port5
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/08/25 Deciphered Date 2009/08/25 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NAWF3 M/B LA-4854P Schematic
Date: Wednesday, September 02, 2009 Sheet 3 of 45
A B C D E
5 4 3 2 1
H_A#[3..35]
7 H_A#[3..35]
H_REQ#[0..4]
7 H_REQ#[0..4]
H_RS#[0..2]
FAN1 Conn
7 H_RS#[0..2]
JCPU1A +5VS
H_A#3 J4 H1 C114 10U_0805_10V4Z +5VS
A[3]# ADS# H_ADS# 7
ADDR GROUP_0
H_A#4 L5 E2 H_BNR# 7 1 2
H_A#5 A[4]# BNR#
D L4 A[5]# BPRI# G5 H_BPRI# 7 D
1
H_A#6 K5 R245
H_A#7 A[6]# 0_0603_5% U5 D6
M3 A[7]# DEFER# H5 H_DEFER# 7
H_A#8 N2 F21 @ 1 8 1SS355_SOD323-2
A[8]# DRDY# H_DRDY# 7 VEN GND
H_A#9 J1 E1 2 7
A[9]# DBSY# H_DBSY# 7 VIN GND
H_A#10 N3 +VCC_FAN1 3 6
2
H_A#11 A[10]# EN_DFAN1 VSET VO GND D7
P5 A[11]# BR0# F1 H_BR0# 7 29 EN_DFAN1 1 2 4 VSET GND 5
H_A#12 P2 R51 330_0402_5% 1 2
A[12]#
CONTROL
H_A#13 L2 D20 H_IERR# 1 G993P1UF_SOP8
H_A#14 A[13]# IERR# C106 BAS16_SOT23-3
P4 A[14]# INIT# B3 H_INIT# 20
H_A#15 P1 0.01U_0402_16V7K C122
H_A#16 A[15]# 10U_0805_10V4Z
R1 A[16]# LOCK# H4 H_LOCK# 7 2
7 H_ADSTB#0 M1 ADSTB[0]# 1 2
C1 H_RESET# H_RESET# 7
RESET# +3VS
H_REQ#0 K3 REQ[0]# RS[0]# F3 H_RS#0 20080430 C121
H_REQ#1 H2 F4 H_RS#1 Add soft-start for +5VS drop issue 1000P_0402_50V7K
H_REQ#2 REQ[1]# RS[1]# H_RS#2
K2 REQ[2]# RS[2]# G3 1 2
1
H_REQ#3 J3 G2 H_TRDY# 7
H_REQ#4 REQ[3]# TRDY# R55
L1 REQ[4]#
G6 10K_0402_5%
HIT# H_HIT# 7
H_A#17 Y2 E4 40mil
A[17]# HITM# H_HITM# 7
H_A#18 U5 JP12
2
H_A#19 A[18]# +VCC_FAN1
R3 A[19]# BPM[0]# AD4 1
ADDR GROUP_1
H_A#20 W6 AD3
A[20]# BPM[1]# 29 FAN_SPEED1 2
H_A#21 U4 AD1
H_A#22 A[21]# BPM[2]# 3
Y5 A[22]# BPM[3]# AC4 1
XDP/ITP SIGNALS
H_A#23 U1 AC2 C115 ACES_85205-03001
H_A#24 A[23]# PRDY# XDP_BPM#5 1000P_0402_50V7K CONN@
R4 A[24]# PREQ# AC1
H_A#25 T5 AC5 XDP_TCK
C H_A#26 A[25]# TCK XDP_TDI 2 C
T3 A[26]# TDI AA6 JP15
H_A#27 W2 AB3
H_A#28 A[27]# TDO XDP_TMS +VCC_FAN1
W5 A[28]# TMS AB5 1 1
H_A#29 Y4 AB6 XDP_TRST# 2
H_A#30 A[29]# TRST# XDP_DBRESET# 2
U2 A[30]# DBR# C20 XDP_DBRESET# 21 3 3
H_A#31 V4 29 FANPW M 4
H_A#32 A[31]# 4
W3 A[32]#
H_A#33 AA4 THERMAL
H_A#34 A[33]# +1.05VS ACES_85205-0400
AB2 A[34]#
H_A#35 AA3 D21 H_PROCHOT# @
A[35]# PROCHOT# H_THERMDA
7 H_ADSTB#1 V1 ADSTB[1]# THERMDA A24
B25 H_THERMDC
THERMDC
20 H_A20M# A6 A20M#
ICH
ICH
A5 C7 H_THERMTRIP# 8,20 XDP_TDI R43 1 2 54.9_0402_1%
20 H_FERR# FERR# THERMTRIP#
20 H_IGNNE# C4 IGNNE#
left NC if no ITP
20 H_STPCLK# D5 STPCLK#
C6 H CLK XDP_TMS R42 1 2 54.9_0402_1% 39Ohm
20 H_INTR LINT0
20 H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK 16
A3 A21 XDP_BPM#5 R16 1 2 54.9_0402_1%
20 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 16
@
M4 RSVD[01]
N5 RSVD[02]
T2 H_PROCHOT# R70 2 1 56_0402_5%
RSVD[03]
V3 RSVD[04]
RESERVED
B2 Layout Note: H_IERR# R54 2 1 56_0402_5%
RSVD[05]
D2 RSVD[06]
D22 H_THERMDA&H_THERMDC Trace / Space = 10 / 10 mil
RSVD[07]
D3 RSVD[08]
B B
F6 RSVD[09]
XDP_TRST# R41 2 1 54.9_0402_1%
XDP_TCK R17 1 2 54.9_0402_1%
Penryn
CONN@
+3VS
C159
0.1U_0402_16V4Z
1 2
+1.05VS U9
BSEL2 BSEL1 BSEL0 BCLK H_THERMDA
0 0 0 266 1 VDD SMCLK 8 EC_SMB_CK2 29
1
1
R12 C158 2 7
DP SMDATA EC_SMB_DA2 29
0 1 0 200 56_0402_5%
2200P_0402_50V7K
@ 3 DN ALERT# 6 1 2 +3VS
2 R109
2
0 1 1 166 4 5 10K_0402_5%
H_THERMDC THERM# GND
2
B
E
A
H_PROCHOT# 3 1 OCP# 21 EMC1402-1-ACZL-TR_MSOP8 A
C
Q2
MMBT3904_SOT23-3
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