Service Manuals, User Guides, Schematic Diagrams or docs for : asus Asus F5Z - REV 2.0
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5 4 3 2 1
AMD
F5Z REV 2.0 BLOCK DIAGRAM CPU DDR2 Dual Channel DDR2
D
400-800 SO-DIMM X 2 D
S1g2
Page 7 ~ 9
Page 3 ~ 6
HDMI HT 3.0
Page 71
2.6GHZ
LVDS
Page 45
AMD
CRT
Page 46 PCI-E RS780M
TVCARD
Page 55 PCIE Page 10 ~ 18
C X4 C
8IN1 Page 74
MINICARD PCI
R5C833
Page 53
AMD 33MHz
Page 75
Page 73~ 74 1394
PCI-E LAN SB700 LPC
RTL8111C 33MHz Debug Conn.
Page 33 ~ 34 Page 44
Page 20 ~ 28 USB
SATA EC ITE8752 SPI ROM 071113
NEWCARD
Page 30
Page 43 SATA HDD Page 30 ~ 31
TPM 1.2
Page 51
B Page 62 B
Azalia AZALIA ALC662
AUDIO AMP
SATA ODD Page 37
Page 36
AUDIO JACK &
Page 51 MIC Page 38
E-SATA
USB CCD MDC Header
Page 76
CLOCK Page 45 Page 35
ICS9LPRS479AGLFT
Page 29
BLUE TOOTH
FAN + SENSOR Module
Page 50 Page 61
A USB 2.0 A
Power On Sequence X5
Page Page 52
Finger print
Page 77 Title : BLOCK DIAGRAM
ASUSTeK COMPUTER INC Engineer:
Size Project Name Rev
Custom F5Z
F 2.0
Date: Monday, May 19, 2008 Sheet 1 of 94
5 4 3 2 1
5 4 3 2 1
D D
CPU_VLDT U0301A CPU_VLDT
D1 VLDT_A2 HT LINK VLDT_B1 AE2
D2 VLDT_A3 VLDT_B2 AE3
D3 VLDT_A1 VLDT_B3 AE4
D4 VLDT_A4 VLDT_B4 AE5
HT_CPU_RXD0 E3 AD1 HT_CPU_TXD0
HT_CPU_RXD#0 L0_CADIN_H[0] L0_CADOUT_H[0] HT_CPU_TXD#0
E2 L0_CADIN_L[0] L0_CADOUT_L[0] AC1
HT_CPU_RXD1 E1 AC2 HT_CPU_TXD1
L0_CADIN_H[1] L0_CADOUT_H[1] HT_CPU_TXD[0..15] 10
HT_CPU_RXD#1 F1 AC3 HT_CPU_TXD#1
HT_CPU_RXD2 L0_CADIN_L[1] L0_CADOUT_L[1] HT_CPU_TXD2
G3 L0_CADIN_H[2] L0_CADOUT_H[2] AB1
HT_CPU_RXD#2 G2 AA1 HT_CPU_TXD#2
L0_CADIN_L[2] L0_CADOUT_L[2] HT_CPU_TXD#[0..15] 10
HT_CPU_RXD3 G1 AA2 HT_CPU_TXD3
HT_CPU_RXD#3 L0_CADIN_H[3] L0_CADOUT_H[3] HT_CPU_TXD#3
H1 L0_CADIN_L[3] L0_CADOUT_L[3] AA3
HT_CPU_RXD4 J1 W2 HT_CPU_TXD4
HT_CPU_RXD#4 L0_CADIN_H[4] L0_CADOUT_H[4] HT_CPU_TXD#4
K1 L0_CADIN_L[4] L0_CADOUT_L[4] W3
HT_CPU_RXD5 L3 V1 HT_CPU_TXD5
HT_CPU_RXD#5 L0_CADIN_H[5] L0_CADOUT_H[5] HT_CPU_TXD#5
L2 L0_CADIN_L[5] L0_CADOUT_L[5] U1
HT_CPU_RXD6 L1 U2 HT_CPU_TXD6
HT_CPU_RXD#6 L0_CADIN_H[6] L0_CADOUT_H[6] HT_CPU_TXD#6
M1 L0_CADIN_L[6] L0_CADOUT_L[6] U3
HT_CPU_RXD7 N3 T1 HT_CPU_TXD7
HT_CPU_RXD#7 L0_CADIN_H[7] L0_CADOUT_H[7] HT_CPU_TXD#7
N2 L0_CADIN_L[7] L0_CADOUT_L[7] R1
HT_CPU_RXD8 E5 AD4 HT_CPU_TXD8
HT_CPU_RXD#8 L0_CADIN_H[8] L0_CADOUT_H[8] HT_CPU_TXD#8
F5 L0_CADIN_L[8] L0_CADOUT_L[8] AD3
C HT_CPU_RXD9 HT_CPU_TXD9 C
10 HT_CPU_RXD[0..15] F3 L0_CADIN_H[9] L0_CADOUT_H[9] AD5
HT_CPU_RXD#9 F4 AC5 HT_CPU_TXD#9
HT_CPU_RXD10 L0_CADIN_L[9] L0_CADOUT_L[9] HT_CPU_TXD10
G5 L0_CADIN_H[10] L0_CADOUT_H[10] AB4
HT_CPU_RXD#10 H5 AB3 HT_CPU_TXD#10
10 HT_CPU_RXD#[0..15] L0_CADIN_L[10] L0_CADOUT_L[10]
HT_CPU_RXD11 H3 AB5 HT_CPU_TXD11
HT_CPU_RXD#11 L0_CADIN_H[11] L0_CADOUT_H[11] HT_CPU_TXD#11
H4 L0_CADIN_L[11] L0_CADOUT_L[11] AA5
HT_CPU_RXD12 K3 Y5 HT_CPU_TXD12
HT_CPU_RXD#12 L0_CADIN_H[12] L0_CADOUT_H[12] HT_CPU_TXD#12
K4 L0_CADIN_L[12] L0_CADOUT_L[12] W5
HT_CPU_RXD13 L5 V4 HT_CPU_TXD13
HT_CPU_RXD#13 L0_CADIN_H[13] L0_CADOUT_H[13] HT_CPU_TXD#13
M5 L0_CADIN_L[13] L0_CADOUT_L[13] V3
HT_CPU_RXD14 M3 V5 HT_CPU_TXD14
HT_CPU_RXD#14 L0_CADIN_H[14] L0_CADOUT_H[14] HT_CPU_TXD#14
M4 L0_CADIN_L[14] L0_CADOUT_L[14] U5
HT_CPU_RXD15 N5 T4 HT_CPU_TXD15
HT_CPU_RXD#15 L0_CADIN_H[15] L0_CADOUT_H[15] HT_CPU_TXD#15
P5 L0_CADIN_L[15] L0_CADOUT_L[15] T3
HT_CPU_RX_CLK0 J3 Y1 HT_CPU_TX_CLK0
10 HT_CPU_RX_CLK0 L0_CLKIN_H[0] L0_CLKOUT_H[0] HT_CPU_TX_CLK0 10
HT_CPU_RX_CLK#0 J2 W1 HT_CPU_TX_CLK#0
10 HT_CPU_RX_CLK#0 L0_CLKIN_L[0] L0_CLKOUT_L[0] HT_CPU_TX_CLK#0 10
HT_CPU_RX_CLK1 J5 Y4 HT_CPU_TX_CLK1
10 HT_CPU_RX_CLK1 L0_CLKIN_H[1] L0_CLKOUT_H[1] HT_CPU_TX_CLK1 10
HT_CPU_RX_CLK#1 K5 Y3 HT_CPU_TX_CLK#1
10 HT_CPU_RX_CLK#1 L0_CLKIN_L[1] L0_CLKOUT_L[1] HT_CPU_TX_CLK#1 10
HT_CPU_RX_CTL0 N1 R2 HT_CPU_TX_CTL0
10 HT_CPU_RX_CTL0 L0_CTLIN_H[0] L0_CTLOUT_H[0] HT_CPU_TX_CTL0 10
HT_CPU_RX_CTL#0 P1 R3 HT_CPU_TX_CTL#0
10 HT_CPU_RX_CTL#0 L0_CTLIN_L[0] L0_CTLOUT_L[0] HT_CPU_TX_CTL#0 10
HT_CPU_RX_CTL1 P3 T5 HT_CPU_TX_CTL1
10 HT_CPU_RX_CTL1 L0_CTLIN_H[1] L0_CTLOUT_H[1] HT_CPU_TX_CTL1 10
HT_CPU_RX_CTL#1 P4 R5 HT_CPU_TX_CTL#1
10 HT_CPU_RX_CTL#1 L0_CTLIN_L[1] L0_CTLOUT_L[1] HT_CPU_TX_CTL#1 10
SOCKET638
12G011306384 071113
B Do not cross plane. B
071219 Recover
+1.2V_CPU_NB_SB
Irat=2A
1
CPU_VLDT
120Ohm/100Mhz
L0301
2
MLCC 180PF/50V (0402) NPO 5%
1
1
1
1
1
1
1
C0302 C0306
C0301 C0303 C0304 C0305 C0307
2
2
2
4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 0.22UF/6.3V 0.22UF/6.3V 180PF/50V C26 D26 E26 F26 G26 H26 J26 K26 L26 M26 N26 P26 R26 T26 U26 V26 W26 Y26 AA26 AB26 AC26 AD26
2
2
2
2
B25 C25 D25 E25 F25 G25 H25 J25 K25 L25 M25 N25 P25 R25 T25 U25 V25 W25 Y25 AA25 AB25 AC25 AD25 AE25
180PF/50V A24
A23
B24
B23
C24
C23
D24
D23
E24
E23
F24
F23
G24
G23
H24
H23
J24
J23
K24
K23
L24
L23
M24
M23
N24
N23
P24
P23
R24
R23
T24
T23
U24
U23
V24
V23
W24
W23
Y24
Y23
AA24
AA23
AB24
AB23
AC24
AC23
AD24
AD23
AE24
AE23
AF24
AF23
GND MLCC 180PF/50V (0402) NPO 5% A22
A21
B22
B21
C22
C21
D22
D21
E22
E21
F22
F21
G22
G21
H22
H21
J22
J21
K22
K21
L22
L21
M22
M21
N22
N21
P22
P21
R22
R21
T22
T21
U22
U21
V22
V21
W22
W21
Y22
Y21
AA22
AA21
AB22
AB21
AC22
AC21
AD22
AD21
AE22
AE21
AF22
AF21
A20 B20 C20 D20 E20 F20 H20 J20 K20 L20 M20 N20 P20 R20 T20 U20 V20 Y20 AA20 AB20 AC20 AD20 AE20 AF20
A19 B19 C19 D19 E19 F19 H19 J19 K19 L19 M19 N19 P19 R19 T19 U19 V19 Y19 AA19 AB19 AC19 AD19 AE19 AF19
A18 B18 C18 D18 E18 F18 G18 H18 J18 K18 L18 M18 N18 P18 R18 T18 U18 V18 W18 Y18 AA18 AB18 AC18 AD18 AE18 AF18
A17 B17 C17 D17 E17 F17 G17 H17 J17 K17 L17 M17 N17 P17 R17 T17 U17 V17 W17 Y17 AA17 AB17 AC17 AD17 AE17 AF17
A A16 B16 C16 D16 E16 F16 G16 H16 J16 K16 L16 M16 N16 P16 R16 T16 U16 V16 W16 Y16 AA16 AB16 AC16 AD16 AE16 AF16
A
GND A15
A14
B15
B14
C15
C14
D15
D14
E15
E14
F15
F14
G15
G14
H15
H14
J15
J14
K15
K14
L15
L14
T15
T14
U15
U14
V15
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