Service Manuals, User Guides, Schematic Diagrams or docs for : asus UX50
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5 4 3 2 1
UX50 CLOCK GENERATOR
RTM875T-336
Penryn SFF FAN & THERMAL
D D
956 uFCBGA SENSOR
FSB 800MHz
LVDS DDR2 SDRAM 800 MHz
nVIDIA PCIE * 16
GS45 Express
CRT
NB9M-GS 1363 uFCBGA STANDARD STANDARD
HDMI DDR2 DIMM DDR2 DIMM
DMI 100MHz
C C
SATA
2.5" HDD
USB
ALCOR AU-6371 CARD READER
ICH9M SFF
DMIC Array 569 uFCBGA
10/100/1000
PCI-E LAN controller
ALC269 Azalia
Atheros RJ45
EXT MIC
Audio Codec AR8131
USB 2.0 X 8
POWER
LPC 33MHz
Line out
VCORE
B B
INT SPK SYSTEM
MINICARD
Half Mini Card
EMBEDDED
I/O_1.5VS & 1.05VS
CONTROLLER
IT8512E
USB2.0 * 3 I/O_DDR & VTT
BIOS ROM INTERNAL I/O_ +1.8VS
BLUETOOTH
KB & TP
CHARGER
CAMERA
A LCD DRIVER A
Title : Block diagram
ASUSTeK COMPUTER INC Engineer: Tony Su
Size Project Name Rev
Custom UX50 1.0a
Date: Tuesday, March 31, 2009 Sheet 1 of 97
5 4 3 2 1
A B C D E
UX50 SCHEMATIC Revision 1.0
1 1
PAGE Content PAGE Content
SYSTEM PAGE REF.
3 CPU-PENRYN ULV FSB (1)
4 CPU-PENRYN ULV POWER (2)
5 CPU-CAPACITORS
7 DIM-DDR2 SO-DIMM CHANNEL A
8 DIM-DDR2 SO-DIMM CHANNEL B
9 DIM-DDR2 VREF & TERMINATION POWER PAGE REF.
10 NB_-GS45-HOST (1)
2 11 NB_-GS45-DMI (2) 80_POWER_VCORE 2
12 NB_-GS45-DISPLAY (3) 81_POWER_SYSTEM
13 NB_-GS45-DDR2 BUS (4) 82_POWER_I/O_+1.05VO
14 NB_-GS45-POWER (5) 83_POWER_I/O_DDR & VTT
15 NB_-GS45-POWER (6) 84_POWER_I/O_ +1.8V
16 NB_-GS45-GND (7) 88_POWER_CHARGER
17 NB_-GS45-STRAPPING (8) 90_POWER_DETECT
20 SB_ICH9M-HDA, IDE, LPC (1) 91_POWER_LOAD SWITCH
21 SB_ICH9M-PCI,PCIE,DMI,USB(2) 92_POWER_PROTECT
22 SB_ICH9M-GPIO, PMGT (3) 93_POWER_SIGNAL
23 SB_ICH9M-POWER_GND (4) 94_POWER_FLOWCHART
24 SB_ICH9M-SPI ROM & HDCP (5) 95_POWER_LED_VCC BOOST
3
29 CLK-RTM875T-336-GRT 3
30 KBC-ITE8512
31 ROM-FLASH ROM,TOUCH PAD,KB
32 UMA LEVEL SHIFTERS
36 AUD-ALC 269
38 AUD-HP&SPK&MIC&SPDIF CONN
42 CARD READER_AU-6433
44 BUG-DEBUG PORT
45 HDMI CONN
46 CRT-LVDS CONN
47 CRT-D-SUB CONN
49 VID CONTROLLER
4 50 FAN-THERMAL SENSOR, FAN CONN 4
51 XDD-SATA HDD CONN
52 USB-USB 2.0 CONN*2
56 LED- PWR,LED,FPC CONN
57 DSG-DISCHARGE CIRCUIT
60 DC_-DC, BATT CONN
61 BT_-BLUETOOTH CONN
65 ME_-SCREW HOLE, SMT NUT
67 CMO-CMOS CAMERA
68 Board to Board CONN
96 History
97 Power On Sequence
5 5
Title : PAGE REF.
ASUSTeK COMPUTER INC Engineer: Tony Su
Size Project Name Rev
Custom UX50 1.0a
Date: Tuesday, March 31, 2009 Sheet 2 of 97
A B C D E
5 4 3 2 1
H_D#[63:0]
10 H_D#[63:0]
H_A#[35:3]
10 H_A#[35:3]
H_REQ#[4:0]
10 H_REQ#[4:0]
T0306
T0307
1
U0301A U0301B
1
D D
H_A#3 P2 M4 H_D#0 F40 AP44 H_D#32
A[3]# ADS# H_ADS# 10 D[0]# D[32]#
H_A#4 V4 J5 H_D#1 G43 AR43 H_D#33
A[4]# BNR# H_BNR# 10 D[1]# D[33]#
H_A#5 W1 L5 H_D#2 E43 AH40 H_D#34
A[5]# BPRI# H_BPRI# 10 D[2]# D[34]#
H_A#6 T4 H_D#3 J43 AF40 H_D#35
H_A#7 A[6]# H_D#4 D[3]# D[35]# H_D#36
AA1 A[7]# DEFER# N5 H_DEFER# 10 H40 D[4]# D[36]# AJ43
H_A#8 AB4 F38 H_D#5 H44 AG41 H_D#37
A[8]# DRDY# H_DRDY# 10 D[5]# D[37]#
H_A#9 T2 J1 H_D#6 G39 AF44 H_D#38
A[9]# DBSY# H_DBSY# 10 D[6]# D[38]#
H_A#10 AC5 H_D#7 E41 AH44 H_D#39
H_A#11 A[10]# +VCCP H_D#8 D[7]# D[39]# H_D#40
AD2 A[11]# BR0# M2 H_BR0# 10 L41 D[8]# D[40]# AM44
H_A#12 AD4 H_D#9 K44 AN43 H_D#41
H_A#13 A[12]# H_IERR# RN0302A H_D#10 D[9]# D[41]# H_D#42
AA5 A[13]# IERR# B40 1 56OHM 2 N41 D[10]# D[42]# AM40
H_A#14 AE5 D8 H_D#11 T40 AK40 H_D#43
A[14]# INIT# H_INIT# 20 D[11]# D[43]#
H_A#15 AB2 H_D#12 M40 AG43 H_D#44
H_A#16 A[15]# H_D#13 D[12]# D[44]# H_D#45
AC1 A[16]# LOCK# N1 H_LOCK# 10 G41 D[13]# D[45]# AP40
Y4 H_D#14 M44 AN41 H_D#46
10 H_ADSTB#0 ADSTB[0]# D[14]# D[46]#
G5 H_D#15 L43 AL41 H_D#47
RESET# H_CPURST# 10 D[15]# D[47]#
H_REQ#0 R1 K2 K40 AK44
REQ[0]# RS[0]# H_RS#0 10 10 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 10
H_REQ#1 R5 H4 J41 AL43
REQ[1]# RS[1]# H_RS#1 10 10 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 10
H_REQ#2 U1 K4 P40 AJ41
REQ[2]# RS[2]# H_RS#2 10 10 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 10
H_REQ#3 P4 L1
REQ[3]# TRDY# H_TRDY# 10
H_REQ#4 W5 H_D#16 P44 AV38 H_D#48
REQ[4]# H_D#17 D[16]# D[48]# H_D#49
HIT# H2 H_HIT# 10 V40 D[17]# D[49]# AT44
H_A#17 AN1 F2 H_D#18 V44 AV40 H_D#50
A[17]# HITM# H_HITM# 10 D[18]# D[50]#
H_A#18 AK4 H_D#19 AB44 AU41 H_D#51
H_A#19 A[18]# XDP_BPM#0 H_D#20 D[19]# D[51]# H_D#52
AG1 A[19]# BPM[0]# AY8 R41 D[20]# D[52]# AW 41
H_A#20 AT4 BA7 XDP_BPM#1 H_D#21 W 41 AR41 H_D#53
H_A#21 A[20]# BPM[1]# XDP_BPM#2 H_D#22 D[21]# D[53]# H_D#54
AK2 A[21]# BPM[2]# BA5 N43 D[22]# D[54]# BA37
H_A#22 AT2 AY2 XDP_BPM#3 H_D#23 U41 BB38 H_D#55
H_A#23 A[22]# BPM[3]# XDP_BPM#4 H_D#24 D[23]# D[55]# H_D#56
AH2 A[23]# PRDY# AV10 AA41 D[24]# D[56]# AY36
C H_A#24 AF4 AV2 XDP_BPM#5 H_D#25 AB40 AT40 H_D#57 C
H_A#25 A[24]# PREQ# XDP_TCK H_D#26 D[25]# D[57]# H_D#58
AJ5 A[25]# TCK AV4 AD40 D[26]# D[58]# BC35
H_A#26 AH4 AW 7 XDP_TDI +VCCP H_D#27 AC41 BC39 H_D#59
H_A#27 A[26]# TDI XDP_TDO H_D#28 D[27]# D[59]# H_D#60
AM4 A[27]# TDO AU1 AA43 D[28]# D[60]# BA41
H_A#28 AP4 AW 5 XDP_TMS H_D#29 Y40 BB40 H_D#61
A[28]# TMS D[29]# D[61]#
2
H_A#29 AR5 AV8 XDP_TRST# T0312 H_D#30 Y44 BA35 H_D#62
H_A#30 A[29]# TRST# XDP_DBR# R0302 H_D#31 D[30]# D[62]# H_D#63
AJ1 A[30]# DBR# J7 1 T44 D[31]# D[63]# AU43
H_A#31 AL1 1KOhm U43 AY40 Comp 0,2: Zo=27.4 Ohm, trace length < 0.5"
A[31]# 10 H_DSTBN#1 DSTBN[1]# DSTBN[3]# H_DSTBN#3 10
H_A#32 AM2 1% W 43 AY38
A[32]# 10 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 10 Comp 1,3: Z0=55 Ohm, trace length < 0.5"
H_A#33 AU5 R43 BC37
10 H_DINV#1 H_DINV#3 10
1
H_A#34 A[33]# DINV[1]# DINV[3]#
AP2 A[34]#
H_A#35 AR1 D38 H_PROCHOT_S# GTL_REF AW 43 AE43 H_COMP0 R0306 1 2 27.4Ohm 1%
A[35]# PROCHOT# R0304 @ GTLREF COMP[0]
10 H_ADSTB#1 AN5 ADSTB[1]# THRMDA BB34 CPU_THRM_DXP 50 2 1 1KOhm 1% CPU_TEST1 E37 TEST1 COMP[1] AD44 H_COMP1 R0307 1 2 54.9Ohm 1%
2
T0308 1 BD34 R0305 2 @ 1 1KOhm 1% CPU_TEST2 D40 AE1 H_COMP2 R0308 1 2 27.4Ohm 1%
THRMDC CPU_THRM_DXN 50 TEST2 COMP[2]
1
C7 C0301 R0303 T0303 1 CPU_TEST3 C43 AF2 H_COMP3 R0309 1 2 54.9Ohm 1%
20 H_A20M# A20M# TEST3 COMP[3]
D4 B10 0.1UF/10V 2KOhm CPU_TEST4 AE41 1
20 H_FERR# FERR# THERMTRIP# H_THRMTRIP# 5,11,20 TEST4
F10 @ 1% T0304 1 CPU_TEST5 AY10 G7 T0310
20 H_IGNNE# H_DPRSTP# 11,20,80
2
IGNNE# TEST5 DPRSTP#
1
T0309 T0301 C0302 T0305 CPU_TEST6 GND
1 1 AC43 B8 H_DPSLP# 20
1
0.1UF/10V TEST6 DPSLP#
20 H_STPCLK# F8 STPCLK# DPW R# C41 H_DPWR# 10
C9 @ A37 E7
20 H_INTR 29 CPU_BSEL0 H_PWRGD 20
1
2
LINT0 GND GNDGND BSEL[0] PW RGOOD
20 H_NMI C5 LINT1 BCLK[0] A35 CLK_CPU_BCLK 29 29 CPU_BSEL1 C37 BSEL[1] SLP# D10 H_CPUSLP# 10
20 H_SMI# E5 SMI# BCLK[1] C35 CLK_CPU_BCLK# 29 29 CPU_BSEL2 B38 BSEL[2] PSI# BD10 1
Zo=55 Ohm, 0.5" max GND T0311
1
V2 Close to CPU SU9400/SU9300
RSVD01 for GTL_REF
Y2 RSVD02
AG5 RSVD03 T0302 BCLK FSB BSEL2 BSEL1 BSEL0
AL5 RSVD04
J9 RSVD05 166 667 0 1 1
F4 RSVD06
B
H8 RSVD07 200 800 0 1 0 B
266 1067 0 0 0
SU9400/SU9300
ITP Debug Port
R1.1 +VCCP
J0301
31 SIDE1 SIDE4 34
1 1 2 2 CLK_ITP_BCLK 29
29 CLK_ITP_BCLK# 3 3 4 4 SMB_DAT_S 7,8,22,29
7,8,22,29 SMB_CLK_S 5 5 6 6
7 8 ITP_CPURST# 1KOhm 1 @ 2 R0313 H_CPURST#
+VCCP 7 8
9 9 10 10
+VCCP XDP_TCK 11 12 XDP_TMS
11 12 XDP_TDI
13 13 14 14
R0310 1 @ 2 56Ohm XDP_TDO
Default Strapping When Not Used XDP_BPM#0
15
17
15 16 16
18 XDP_BPM#1
17 18
4
XDP_BPM#2 19 20 XDP_BPM#3
RN0302B XDP_BPM#4 19 20 XDP_BPM#5
+VCCP 21 21 22 22
56OHM 23 23 24 24
H_PWRGD R0311 1 @ 2 1KOhm XDP_PWRGD 25 26 XDP_TRST#
25 26
27 27 28 28
XDP_BPM#5 56Ohm 1 2 R0301 D0301 29 30
3
XDP_TDI 56OHM 1 29 30
2 RN0301A 1SS355PT 32 SIDE2 SIDE3 33
XDP_TMS 56OHM 3 4 RN0301B H_PROCHOT_S# 2 1 PWRLIMIT_CPU# 30
A FPC_CON_30P A
XDP_TCK 56OHM 1 2 RN0303A @ @
6
3
XDP_TRST# 56OHM 3 4 RN0303B Q0301A Q0301B GND GND
UM6K1N UM6K1N
2 THRO_CPU 30 5 PWRLIMIT_CPU 88
1
4
GND
Title : CPU PENRYN ULV FSB
GND GND Engineer: Tony Su
ASUSTeK COMPUTER INC
Size Project Name Rev
Custom UX50 1.0a
Date: Tuesday, March 31, 2009 Sheet 3 of 97
5 4 3 2 1
5 4 3 2 1
+VCORE +VCCP
U0301F U0301E U0301D
BD28 AL37 G25 AA15 B42 AM36
VCC101 VCCP21 VSS164 VSS280 VSS1 VSS82
BB26 AN37 G23 AC15 F44 AR35
VCC102 VCCP22 VSS165 VSS281 VSS2 VSS83
BD26 AP38 G21 Y10 D44 AU35
VCC103 VCCP23 VSS166 VSS282 VSS3 VSS84
B22 B32 J25 AD10 D42 AV34
+VCORE +VCORE VCC104 VCCP24 VSS167 VSS283 VSS4 VSS85
B24 C33 J23 AH12 F42 AW35
U0301C VCC105 VCCP25 VSS168 VSS284 VSS5 VSS86
D22 D32 J21 AE15 H42 AW33
VCC106 VCCP26 VSS169 VSS285 VSS6 VSS87
D24 E35 L25 AG15 K42 AY34
VCC107 VCCP27 VSS170 VSS286 VSS7 VSS88
F32 AB28 F24 E33 L23 AJ15 M42 AT36
VCC1 VCC68 VCC108 VCCP28 VSS171 VSS287 VSS8 VSS89
G33 AD30 F22 F34 L21 AH10 P42 AV36
VCC2 VCC69 VCC109 VCCP29 VSS172 VSS288 VSS9 VSS90
H32 AD28 H24 G35 N25 AM12 T42 BA33
VCC3 VCC70 VCC110 VCCP30 VSS173 VSS289 VSS10 VSS91
J33 Y26 H22 F36 N23 AL15 V42 BC33
D VCC4 VCC71 VCC111 VCCP31 VSS174 VSS290 VSS11 VSS92 D
K32 AB26 K24 H36 N21 AN15 Y42 BB36
VCC5 VCC72 VCC112 VCCP32 VSS175 VSS291 VSS12 VSS93
L33 AD26 K22 J35 R25 AR15 AB42 BD36
VCC6 VCC73 VCC113 VCCP33 VSS176 VSS292 VSS13 VSS94
M32 AF30 M24 L35 R23 AM10 AD42 C27
VCC7 VCC74 VCC114 VCCP34 VSS177 VSS293 VSS14 VSS95
N33 AF28 M22 N35 R21 AT12 AF42 C29
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