Service Manuals, User Guides, Schematic Diagrams or docs for : asus Z94_R-1.1
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5 4 3 2 1
Z94 SCHEMATICS : MAIN BOARD REV 1.1
D D
P.01--INDEX (THIS PAGE) P.31--BATLOW/SD#/DCIN
P.02--BLOCK DIAGRAM P.32--CHARGER
P.03--Pentium-M SOCKET479 - 1 P.33--PIC16C54/BAT_IN
P.04--Pentium-M SOCKET479 - 2 P.34--Vcore
P.05--CLOCK GEN ICS950816 P.35--VCCP_1.05V
P.06--SISM661MX (1) HOST/AGP P.36--GPIO LIST
P.07--SISM661MX (2) DDR/VGA/ZIP P.37--POWER FLOW
P.08--SISM661MX (3) PWR P.38--History
P.09--DDR Memory DIMM
P.10--DDR Bypass & Driver
C
P.11--VGA_Connector C
P.12--CRT Connector
P.13--SIS964L - 1 PCI/ZIP/IDE
P.14--SIS964L - 2 LPC/GPIO/AC97
P.15--SIS964L - 3 USB/PWR
P.16--HDD & CDROM CONN/USB
P.17--LAN_RTL8201BL
P.18--CardBus (1)
P.19--CardBus (2)
P.20--Debug Port & Hole & EMI
B
P.21--Switch & MDC B
P.22--PortBar & FWH
P.23--FAN controller
P.24--KBC_KB38857
P.25--Super I/O
P.26--Audio Codec
P.27--Audio AMP/JACK
P.28--Power Sequence
P.29--2.5V/1.8V/1.5V/1.25V
P.30--SYSTEM_3V/5V
A A
Title : INDEX
ASUSTek COMPUTER INC. Engineer: -
Size Project Name Rev
Custom
Z94 2.0
Date: Monday, May 30, 2005 Sheet 1 of 38
5 4 3 2 1
5 4 3 2 1
Power Sequence
1) Power On Button
SYSTEM POWER Pentium M Processor 2) System Power On
+12V CPU CORE V.R. VCCP_1.05V Dothan 400/533 CLOCK GEN 3) System Power OK
DC-IN ICS950816.
+5V VCORE = 0.726V~1.308V 4) CPU VID & VCORE On
+3V 34 35 VCCP = 1.05V +3V
D 5) CPU Power Good D
31 +2.5V
30 5
CHARGE
3 4 HOST BUS
BAT-IN 12 32 AGTL+
400 MHz
33 CRT PORT SIS MEMORY DDR266/333/400
+5V VCCP=1.05V BUS 64 bit SODIMM X 2
+3V +3V SIS DDR CLOCK Switch & LED
+1.8 M661MX MEMORY BUS
BUFFER Board
+3V
+2.5 +2.5V +2.5V
VGA 2.1GB/2.7GB/3.2GB +5V
LVDS VGA CARD Connector
+VDDQ_S=1.5/1.8V +1.25V
LCD & Inverter
+5V SIS AC_BAT_SYS 10 21
9
AC_BAT_SYS +3V 302ELV +12V +5V 6 7 8
+3V +1.8V +3V +1.8V +1.5V
MuTiol BUS
16 Bit dual BUS HYPERZIP Portbar
11 Interface 533MHz 1GB/s connector
+12V
C +5V C
HDD +3V
+12V ODD IDE BUS ATA 66/100/133
16 +VCCP=1.05V
+5V 21
+3V +3V
+3VAUX SIS PCI BUS 133Mb/S
+1.8V 964L
USB 2.0 480 Mb/s +1.8AUX
16 USB Port X1
+5V
USB connector
X 2 13 14 15 AC97 LINK CARDBUS
+5V LAN PHY
11Mb/s RTL8201BL
RICOH
5C811
USB Port X1 +3VAUX
11 --->WLAN +3VAUX +3V
+5V
AC97 +3V 17 18
USB Port X1 26 codec MDC +5V
B
---Port bar AD1888JCP B
21 +5V +5V 17
+3V 21 CARDBUS CARDREADER
SLOT X 1
RJ11 RJ45
LPC 16.6 MB/S VCCCB
VPPCB +3V
20 19
FLASH SIO 25 MIC.
KBC ROM ITE8712F
M38857
+3V +5V 27
24
+3V EAR
22
Speaker AMP
+12V
+5V
+3V
CPU FAN Print port
A KEYBOARD TOUCHPAD
+3V ---Port bar 27 A
+5V 27
+5V
24
24
23 21
Title : BLOCK DIAGROM
ASUSTek COMPUTER INC.
Engineer: -
Size Project Name Rev
Custom
Z94 2.0
Date: Monday, May 30, 2005 Sheet 2 of 38
5 4 3 2 1
5 4 3 2 1
CPU Pin A1 need to be enlarged(M) H_D#[63:0] 6
U26B U26A
6 H_A#[16:3] H_A#16 H_D#15 H_D#47
AA2 A[16]# ADS# N2 H_ADS# 7 COMMON CLOCK -> L6 C25 D[15]# D[47]# Y25
H_A#15 Y3 A10 H_PRDY# 1 T194 TPC28t H_D#14 E23 AA26 H_D#46
H_A#14 A[15]# PRDY# H_PREQ#1 T195 TPC28t WIDTH: 5 mils H_D#13 D[14]# D[46]# H_D#45
H_A#13
AA3
U1
A[14]# PREQ# B10
SPACE >= 1:2 H_D#12
B23
C26
D[13]# D[45]# Y23
V26 H_D#44 DATA GROUP 0,2 -> L6
A[13]# D[12]# D[44]#
H_A#12
H_A#11
Y1 A[12]# BNR# L1 H_BNR# 7 GROUP SPACE >=1:5 H_D#11
H_D#10
E24 D[11]# D[43]# U25 H_D#43
H_D#42
DATA GROUP 1,3 -> L6
Y4 J3 H_BPRI# 7 D24 V24
ADDRESS GROUP 0
A[11]# BPRI# LENGTH: 1" - 6.5"(OPT: 4"+/-0.5") D[10]# D[42]#
SPACE >= 1:3
DATA GROUP 0
H_A#10 H_D#9 H_D#41
2
W2 A[10]# B24 D[9]# D[41]# U26
H_A#9 T4 Breakout Length:<=200 mil H_D#8 C20 AA23 H_D#40
GROUP SPACE >=1:5
DATA GROUP
H_A#8 A[9]# T198 TPC28t H_D#7 D[8]# D[40]# H_D#39
W1 A[8]# DBR# A7 1 (#0011) B20 D[7]# D[39]# R23
H_A#7 H_D#6 H_D#38
H_A#6
V2
R3
A[7]# H_D#5
A21
B26
D[6]# D[38]# R26
R24 H_D#37 LENGTH: 0.5" - 5.5"
A[6]# D[5]# D[37]#
D H_A#5
H_A#4
V3 A[5]#
H_D#4
H_D#3
A24 D[4]# D[36]# V23 H_D#36
H_D#35
(#0012) D
U4 A[4]# DEFER# L4 H_DEFER# 7 B21 D[3]# D[35]# U23
H_A#3 P4 H2 H_D#2 A22 T25 H_D#34
A[3]# DRDY# H_DRDY# 7 D[2]# D[34]#
U3 M2 H_D#1 A25 AA24 H_D#33
6 H_ADSTB#0 ADSTB[0]# DBSY# H_DBSY# 7 D[1]# D[33]#
H_REQ#4 T1 H_D#0 A19 Y26 H_D#32
H_REQ#3 REQ[4]# D[0]# D[32]#
P1 REQ[3]# 6 H_DINV#0 D25 DINV[0]# DINV[2]# T24 H_DINV#2 6
H_REQ#2 T2 C23 W25
REQ[2]# 6 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 6
H_REQ#1 P3 C22 W24
REQ[1]# 6 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 6
H_REQ#0 R2 REQ[0]# H_BR0# H_D#31 H_D#63
N4 H_BR0# 7 K25 AF26
CONTROL
6 H_REQ#[4:0] BR0# +VCCP H_D#30 D[31]# D[63]# H_D#62
N25 D[30]# D[62]# AF22
H_D#29 H26 AF25 H_D#61
H_IERR# H_D#28 D[29]# D[61]# H_D#60
IERR# A4 2 1 M25 D[28]# D[60]# AD21
R282 56Ohm H_D#27 N24 AE21 H_D#59
6 H_A#[31:17] H_A#31 H_D#26 D[27]# D[59]# H_D#58
AF1 L26 AF20
3
A[31]# D[26]# D[58]#
DATA GROUP 1
H_A#30 AE1 B5 H_D#25 J25 AD24 H_D#57
A[30]# INIT# H_INIT# 14 D[25]# D[57]#
H_A#29 H_D#24 H_D#56
DATA GROUP
AF3 A[29]# M23 D[24]# D[56]# AF23
ADDR GROUP 0 -> L6 H_A#28 AD6 H_D#23 J23 AE22 H_D#55
ADDRESS GROUP 1
H_A#27 A[28]# H_D#22 D[23]# D[55]# H_D#54
ADDR GROUP 1 -> L6 AE2 A[27]# LOCK# J2 H_LOCK# 7 G24 D[22]# D[54]# AD23
H_A#26 AD5 H_D#21 F25 AC25 H_D#53
SPACE >= 1:2 H_A#25 A[26]# H_D#20 D[21]# D[53]# H_D#52
AC6 A[25]# H24 D[20]# D[52]# AC22
STROBE SPACE >=1:3 H_A#24 AB4 H_D#19 M26 AC20 H_D#51
H_A#23 A[24]# H_D#18 D[19]# D[51]# H_D#50
AD2 L23 AB24
GROUP SPACE >=1:5 H_A#22 AE4
A[23]# H_D#17 G25
D[18]# D[50]#
AC23 H_D#49
H_A#21 A[22]# H_D#16 D[17]# D[49]# H_D#48
LENGTH: 0.5" - 6.5" H_A#20
AD3
AC3
A[21]# RESET# B11
L2 H_RS#2
H_CPURST# 7 H23
J26
D[16]# D[48]# AB25
AD20
A[20]# RS[2]# 6 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 6
(#0012) H_A#19
H_A#18
AC7 A[19]# RS[1]# K1 H_RS#1
H_RS#0 6 H_DSTBN#1 K24 DSTBN[1]# DSTBN[3]# AE24 H_DSTBN#3 6
AC4 A[18]# RS[0]# H1 6 H_DSTBP#1 L24 DSTBP[1]# DSTBP[3]# AE25 H_DSTBP#3 6
H_A#17 AF4 A[17]# H_RS#[2:0] 7
AE5 M3 SOCKET479P
6 H_ADSTB#1 ADSTB[1]# TRDY# H_TRDY# 7
C C
HIT# K3 H_HIT# 7
H_DPWR# C19 K4
8 H_DPWR# DPWR# HITM# H_HITM# 7
+VCCP
SOCKET479P H_VID5 Same Side w/ CPU
CPU PLL VR_VID5 34
1
H_VID4
H_VID3 VR_VID4 34
R279 +VCCP
CIRCUITS H_VID2 VR_VID3
VR_VID2
34
34
332Ohm 1% Close to
1 CLK_CPU_BCLK H_VID1
VR_VID1 34
2
T99 TPC28t 1 CLK_CPU_BCLK# H_VID0
VR_VID0 34
Pin AD26
T100TPC28t H_CPUPWRGD R237
2
of CPU
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