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DPS/LEVEL 68 &
This manual describes the processors used in the Multics system. These are the
DPS/L68, which refers to the DPS, L68 or older model processors (excluding the GE-645)
and DPS 8M, which refers to the DPS 8 family of Multics processors, i.e. DPS 8/70M, DPS
8/62M and DPS 8/52M. The reader should be familiar with the overall modular
organization of the Multics system and with the philosophy of asynchronous operation. In
addition, this manual presents a discussion of virtual memory addressing concepts
including segmentation and paging.
The manual is intended for use by systems programmers responsible for writing
software to interface with the virtual memory hardware and with the fault and interrupt
portions of the hardware. It should also prove valuable to programmers who must use
machine instructions (particularly language translator implementors) and to those persons
responsible for analyzing crash conditions in system dumps.
This manual includes the processor capabilities, modes of operation, functions, and
detailed descriptions of machine instructions. Data representation, program-addressable
registers, addressing by means of segmentation and paging, faults and interrupts, hardware
ring implementation, and cache operation are also covered.
The information and specifications in this document are subject to change without notice. Consult your
Honeywell Marketing Representative for product or service availability.
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