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                                                                                                                                       August 1996

     N-Channel Logic Level Enhancement Mode Field Effect Transistor

     General Description                                                                Features
     These N-Channel logic level enhancement mode power field
                                                                                          2.8 A, 60 V. RDS(ON) = 0.2  @ VGS = 4.5 V
     effect transistors are produced using Fairchild's proprietary,
     high cell density, DMOS technology.This very high density                                         RDS(ON) = 0.16  @ VGS = 10 V.
     process is especially tailored to minimize on-state resistance,                      High density cell design for extremely low RDS(ON).
     provide superior switching performance, and withstand high
     energy pulses in the avalanche and commutation                                       High power and current handling capability in a widely used
     modes.Thesedevices are particularly suited for low voltage                           surface mount package.
     applications such as DC motor control and DC/DC
     conversion where fast switching, low in-line power loss, and
     resistance to transients are needed.


                                                              D                                                                       D

                                                        G      D               S                                             G                  S

Absolute Maximum Ratings                            T A = 25

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