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N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description Features
These logic level N-Channel enhancement mode power 4 A, 60 V. RDS(ON) = 0.100 @ VGS = 10 V,
field effect transistors are produced using Fairchild's RDS(ON) = 0.120 @ VGS = 4.5 V.
proprietary, high cell density, DMOS technology. This
very high density process is especially tailored to Low drive requirements allowing operation directly from logic
minimize on-state resistance and provide superior drivers. VGS(TH) < 2V.
switching performance, and withstand high energy pulse
in the avalanche and commutation modes. These devices High density cell design for extremely low RDS(ON).
are particularly suited for low voltage applications such as High power and current handling capability in a widely used
DC motor control and DC/DC conversion where fast surface mount package.
switching, low in-line power loss, and resistance to
transients are needed.
SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SO-8 SOT-223 SOIC-16
G D S
SOT-223* G G S
Absolute Maximum Ratings TA = 25oC unless otherwise noted
Symbol Parameter NDT3055L Units
VDSS Drain-Source Voltage 60 V
VGSS Gate-Source Voltage - Continuous
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