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                                                                                                                            March 1996

     N-Channel Logic Level Enhancement Mode Field Effect Transistor
     General Description                                                  Features
     These N-Channel logic level enhancement mode power field               3.2A, 30V. RDS(ON) = 0.09 @ VGS = 4.5V
     effect transistors are produced using Fairchild's proprietary,                    RDS(ON) = 0.06 @ VGS = 10V.
     high cell density, DMOS technology. This very high density
     process is tailored to minimize on-state resistance. These             Proprietary SuperSOTTM-6 package design using copper
     devices are particularly suited for low voltage applications in        lead frame for superior thermal and electrical capabilities.
     notebook computers, portable phones, PCMICA cards, and
     other battery powered circuits where fast switching, and low           High density cell design for extremely low RDS(ON).
     in-line power loss are needed in a very small outline surface          Exceptional on-resistance and maximum DC current
     mount package.                                                         capability.


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Absolute Maximum Ratings T A = 25

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