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                                                                                                                               January 1997

 N-Channel Logic Level Enhancement Mode Field Effect Transistor

  General Description                                                            Features

 SuperSOTTM-3 N-Channel logic level enhancement mode                                1.7A, 30 V, RDS(ON) = 0.125  @ VGS = 4.5 V
 power field effect transistors are produced using Fairchild's                                     RDS(ON) = 0.085  @ VGS = 10 V.
 proprietary, high cell density, DMOS technology. This very high
 density process is especially tailored to minimize on-state                        Industry standard outline SOT-23 surface mount package
 resistance. These devices are particularly suited for low voltage                   using proprietary SuperSOTTM-3 design for superior
 applications in notebook computers, portable phones, PCMCIA                        thermal and electrical capabilities.
 cards, and       other battery powered circuits where fast
 switching, and low in-line power loss are needed in a very small                   High density cell design for extremely low RDS(ON).
 outline surface mount package.
                                                                                    Exceptional on-resistance and maximum DC current
                                                                                    Compact industry standard SOT-23 surface mount


                                                                                                     G                  S

 Absolute Maximum Ratings                    T A = 25

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