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N-channel 100V - 0.030 - 25A - DPAK
Low gate charge STripFETTM II Power MOSFET
General features
Type VDSS RDS(on) ID
STD25NF10L 100V < 0.035 25A
Exceptional dv/dt capability
3
100% avalanche tested 1
Low threshold device
Logic level device DPAK
Description
This Power MOSFET series realized with
STMicroelectronics unique STripFET process has
specifically been designed to minimize input
capacitance and gate charge. It is therefore Internal schematic diagram
suitable as primary switch in advanced high-
efficiency isolated DC-DC converters for Telecom
and Computer application. It is also intended for
any application with low gate charge drive
requirements.
Applications
Switching application
Order codes
Part number Marking Package Packaging
STD25NF10LT4 D25NF10L DPAK Tape & reel
July 2006 Rev 2 1/13
www.st.com 13
Contents STD25NF10L
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) ............................. 6
3 Test circuit ................................................ 8
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Packing mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2/13
STD25NF10L Electrical ratings
1 Electrical ratings
Table 1. Absolute maximum ratings
Symbol Parameter Value Unit
VDS Drain-source voltage (VGS = 0) 100 V
VDGR Drain-gate voltage (RGS = 20 k) 100 V
VGS Gate- source voltage
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