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STS9D8NH3LL
Dual N-channel 30 V - 0.012 - 9 A - SO-8
low on-resistance STripFETTM Power MOSFET
Features
Type VDSS RDS(on) Qg ID
Q1 30V < 0.022 7nC 8A
STS9D8NH3LL
Q2 30V < 0.015 8nC 9A
Optimal RDS(on) x Qg trade-off @ 4.5V
Conduction losses reduced
Switching losses reduced
S0-8
Application
Switching applications
Description Figure 1. Internal schematic diagram
This device uses the latest advanced design rules
of ST's STrip based technology. The Q1 and Q2
transistors, show respectively, the best gate
charge and on-resistance for minimizing the
switching and conduction losses. This application
specific Power MOSFET has been designed to
replace two SO-8 packages in DC-DC converters.
Table 1. Device summary
Order code Marking Package Packaging
STS9D8NH3LL 9D8H3LL- SO-8 Tape & reel
December 2007 Rev 3 1/14
www.st.com 14
Contents STS9D8NH3LL
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) ............................. 5
3 Test circuit ................................................ 8
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2/14
STS9D8NH3LL Electrical ratings
1 Electrical ratings
Table 2. Absolute maximum ratings
Symbol Parameter Type Value Unit
Q1 30 V
VDS Drain-source voltage (vGS = 0)
Q2 30 V
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