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N- and P-Channel
Enhancement-Mode Dual MOSFET
Features General Description
Back to back gate-source Zener diodes
The Supertex TC6215 consists of high voltage, low threshold N-channel
Guaranteed RDS(ON) at 4.0V gate drive
and P-channel MOSFETs in an 8-Lead SOIC (TG) package. Both
Low threshold
MOSFETs have integrated back to back gate-source Zener diode clamps
Low on-resistance
and guaranteed RDS(ON) ratings down to 4.0V gate drive allowing them to
Independent N- and P-channels
be driven directly with standard 5.0V CMOS logic.
Electrically isolated N- and P-channels
Low input capacitance
These low threshold enhancement-mode (normally-off) transistors utilize
Fast switching speeds
an advanced vertical DMOS structure and Supertex's well-proven silicon-
Free from secondary breakdowns
gate manufacturing process. This combination produces devices with the
Low input and output leakage
power handling capabilities of bipolar transistors and with the high input
Applications impedance and positive temperature coefficient inherent in MOS devices.
Characteristic of all MOS structures, these devices are free from thermal
High voltage pulsers
runaway and thermally-induced secondary breakdown.
Amplifiers
Buffers
Supertex's vertical DMOS FETs are ideally suited to a wide range of
Piezoelectric transducer drivers
switching and amplifying applications where very low threshold voltage,
General purpose line drivers
high breakdown voltage, high input impedance, low input capacitance,
Logic level interfaces
and fast switching speeds are desired.
Ordering Information
Package Option BVDSS/BVDGS RDS(ON) (Max)
Device 8-Lead SOIC
4.90x3.90mm body N-Channel P-Channel N-Channel P-Channel
1.75mm height (max) (V) (V) () ()
1.27mm pitch
TC6215 TC6215TG-G 150 -150 4.0 7.0
-G indicates package is RoHS compliant (`Green')
Absolute Maximum Ratings Pin Configuration
DP
Parameter Value DP
DN
Drain-to-source voltage BVDSS DN
Drain-to-gate voltage BVDGS GP
SP
Gate-to-source voltage
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