Service Manuals, User Guides, Schematic Diagrams or docs for : . Various AT7-08011293109137461
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1 2 3 4 5 6 7 8
PCB STACK UP
LAYER 1 : TOP
AT6 BLOCK DIAGRAM
LAYER 2 : SGND1 CPU THERMAL
CPU SENSOR
LAYER 3 : IN1 14.318MHz
A
Yonah/Merom PAG 5
A
LAYER 4 : IN2 479P (uPGA)/35W
LAYER 5 : VCC PAG 3,4 CLK_CPU_BCLK,CLK_CPU_BCLK#
CLK_MCH_BCLK,CLK_MCH_BCLK# CLOCK GEN
LAYER 6 : IN3 DREFCLK,DREFCLK#
ICS954206AG
56pins
HyperThansport I/O
LAYER 7 : SGND2 BUS
DREFSSCLK,DREFSSCLK#
PAG 2
LAYER 8 : BOT
Option for 17" only
PCI-Express 16X NVDIA G3-64 for 15.4"
NORTH BRIDGE NVDIA G3-128 for 17" HDMI CON
DDRII-SODIMM1 DDRII 533,667 MHz Calistoga 820p FCBGA PAG PAG 20
14,15,16,17,18,19
TV_OUT PAG 12,13
945PM/GM/GMZ
Cable VGA
TV_OUT
Docking RJ-45
B
DDRII-SODIMM2 DDRII 533,667 MHz 1466p BGA CRT/S-VIDEO B
CIR/Pwr btn CRT_OUT PAG 25
SPDIF Out PAG 12,13
PAG
Stereo MIC 6,7,8,9,10,11 LVDS(2 Channel) Panel Connector
Headphone Jack 15" / 17" PAG 20
USB Port DMI LINK NBSRCCLK, NBSRCCLK#
VOL Cntr
PAG 38 USB2.0
Option for 17" only 0,1,2
5 3 4,6,7
SOUTH BRIDGE
SYSTEM CHARGER(MAX8724) SATA2 Bluetooth USB2.0 I/O Ports Camera Mini PCI-E Card x1
SATA - HDD ICH-7m
PAG 39
PAG 35
PAG 35 X3 PAG 31 X1 PAG 28 Express Card x1
82801GBM Cable Docking x1
PCI BUS / 33MHz
SYSTEM POWER MAX8743A
SATA0 150MB 652P BGA
PAG 40 SATA - HDD PCI-E
PAG 31
C C
DDR II SMDDR_VTERM Azalia
PATA (66/100/133)
1.8V/1.8VSUS(MAX8632)
PAG 41 PATA- CD-ROM PAG 21,22,23,24 Mini PCI-E LAN Express RICOH
PAG 31 Card
PCI Express
Intel Ekron Card RICOH 832
Conexant Mini Card
82562GT/82573L
(NEW CARD)
VCCP +1.5V AND
Two-element Venice AMOM (Wireless (10/100/GagaLAN)
GMCH 1.05V(MAX8743) LPC LAN/WAN) PAG 26,27
PAG 42 microphone CX20549-12
PAG 32 PAG 33,34 PAG 35
PAG 28 PAG 28
Keyboard
VGACORE(1.025V)MAX1992 Touch Pad PAG 36 ENE KBC Audio Jacks IEEE1394 Memory
CardReader
PAG 43 (Phone/SPDIF/ RJ45 CONN
KB3920 Bx MIC) SIM CARD
CIR PAG 36
PAG 28
PAG 26 PAG 27
CPU CORE MAX8771 PAG 32 PAG 33
PAG 44 Capacitive Sense PAG 37
SW PAG 36 AUDIO MDC DAA PCI ROUTING
IDSEL INTERUPT DEVICE
TABLE
Amplifier
X-Bus
D
REQ0# / GNT0# AD21 INTA#,INTB# RICOH832 D
PAG 30 PAG 29
FAN Flash Jack to PROJECT : AT6
MODEM RJ 11 Quanta Computer Inc.
Speaker
PAG 38 PAG 37 PAG 30 PAG 33 Size Document Number Rev
Custom BLOCK DIAGRAM 1A
NB5/RD1/HW2
Date: Tuesday, August 01, 2006 Sheet 1 of 45
1 2 3 4 5 6 7 8
A B C D E
FSC FSB FSA CPU SRC PCI DOT L40
ACB2012L-120-T
1
0
0
0
0
1
1
1
1
100
133
166
100
100
100
33
33
33
96
96
96
3V
3V
120 ohms@100Mhz
R327
VDD_SRC_CPU
C385
0.1U/10V
C342
0.1U/10V
2.2/F VDD_A
C343
0.1U/10V
C384
0.1U/10V
C407
10U/6.3V
25 mils
02
0 1 0 200 100 33 96 5,8,10,12,13,14,15,16,20,21,22,23,24,25,28,31,32,35,36,37,40,45 3V
0 0 0 266 100 33 96 +1.05V C410 C408
3,4,6,9,10,21,24,42 +1.05V
0.1U/10V 10U/6.3V
1 0 0 333 100 33 96 VDD_A
4 Close to IC <500mils 4
1 1 0 400 100 33 96 C370 33P/50V CG_XIN
1 1 1 200 100 33 96 Place these termination to close CK410M.
2
37
38
Y4 CL=20 - 22P U21
25 mils 14.318MHZ 50 52 14M_REF R292 33/F
VDDA
GNDA
XTAL_IN REF0 14M_ICH 23
L35 MV_Change to CH6102M9900 RP16
1
ACB2012L-120-T C365 33P/50V CG_XOUT 49 44 RHCLK_CPU 1 2 33X2
XTAL_OUT CPU0 CLK_CPU_BCLK 3
VDD_PCI 3V R273 10K 43 RHCLK_CPU# 3 4 C394
3V CPU0# CLK_CPU_BCLK# 3
RP17 *10P/50V
120 ohms@100Mhz C346 C340 C344 23,44 VR_PWRGD_CK410# VR_PWRGD_CK410# 10 41 RHCLK_MCH 1 2 33X2
Vtt_PwrGd#/PD CPU1 CLK_MCH_BCLK 6
0.1U/10V 0.1U/10V 10U/10V 23 PM_STPPCI# PM_STPPCI# 55 40 RHCLK_MCH# 3 4
PCI/SRC_STOP# CPU1# CLK_MCH_BCLK# 6
23 PM_STPCPU# PM_STPCPU# 54 RP18
CPU_STOP# R_CLK_PCIE_VGA
CPU2_ITP/SRC7 36 1 2 33X2 CLK_PCIE_VGA 14 Place these termination
R267 2.2/F VDD_48 CGCLK_SMB 35 R_CLK_PCIE_VGA# 3 4
12,13,32 CGCLK_SMB CPU2#_ITP/SRC7# CLK_PCIE_VGA# 14
CGDAT_SMB RP19
C341 C337 12,13,32 CGDAT_SMB CLK_PCIE_MINI_ 2 33X2
to close CK410M.
0.1U/10V 10U/10V
46 SCLK CK-410M SRC6 33
CLK_PCIE_MINI_#
1 CLK_PCIE_MINI 32
CLK_CPU_BCLK R300 49.9/F
47 SDATA SRC6# 32 3 4 CLK_PCIE_MINI# 32
CLK_BSEL0 R290 2.2K RP20 CLK_CPU_BCLK# R301 49.9/F
23 CLKUSB_48 R286 33 USB_48 12 31 RSRC_MCH 1 2 33X2
FSA/USB_48MHz SRC5 CLK_PCIE_3GPLL 8
CLK_BSEL1 16 30 RSRC_MCH# 3 4 CLK_MCH_BCLK R302 49.9/F
FSB/TEST_MODE SRC5# CLK_PCIE_3GPLL# 8
R268 1 VDD_REF CLK_BSEL2 R718 4.7K 53 RP15 CLK_MCH_BCLK# R303 49.9/F
FSC/REF1 RSRC_SATA
SRC4_SATA 26 3 4 33X2 CLK_PCIE_SATA 21
C383 C326 VDD_REF 48 27 RSRC_SATA# 1 2 CLK_PCIE_VGA R304 49.9/F
VDD_REF SRC4#_SATA CLK_PCIE_SATA# 21
0.1U/10V 10U/6.3V VDD_SRC_CPU 42 RP14 CLK_PCIE_VGA# R305 49.9/F
VDD_CPU CLK_PCIE_NEW
SRC3 24 3 4 33X2 CLK_PCIE_NEW_C 35
VDD_PCI 1 25 CLK_PCIE_NEW# 1 2
VDD_PCI_1 SRC3# CLK_PCIE_NEW_C# 35
7 RP13
VDD_PCI_2 RSRC_ICH
3
SRC2 22 3 4 33X2 CLK_PCIE_ICH 22
3
VDD_SRC_CPU 21 23 RSRC_ICH# 1 2 CLK_PCIE_3GPLL R308 49.9/F
VDD_SRC0 SRC2# CLK_PCIE_ICH# 22
3V 28 RP12 CLK_PCIE_3GPLL# R309 49.9/F
VDD_SRC1 RSRC1_LAN
34 VDD_SRC2 SRC1 19 3 4 33X2 CLK_PCIE_LAN 33
20 RSRC1_LAN# 1 2 CLK_PCIE_SATA R263 49.9/F
SRC1# CLK_PCIE_LAN# 33
VDD_48 11 RP11 CLK_PCIE_SATA# R264 49.9/F
VDD_48 R_DREFSSCLK
SRC0/DREFSSCLK 17 3 4 33X2 DREFSSCLK 8
Iref=5mA, R295 475/F IREF 39 18 R_DREFSSCLK# 1 2
Ioh=4*Iref IREF SRC0#/DREFSSCLK# DREFSSCLK# 8
Q16 R275 R285 CLK_PCIE_MINI R306 49.9/F
2
RHU002N06 10K 10K 5 R_PCLK_KB3920 R270 33 CLK_PCIE_MINI# R307 49.9/F
PCI5 PCLK_LPC_KB3920 37
4 R_PCLK_5C832 R269 33
PCI4 PCI_CLK_5C832 26
3 1 CGDAT_SMB RP10 3
GND_PCI_1
GND_PCI_2
23,33,35 PDAT_SMB PCI3
GND_SRC
GND_CPU
GND_REF
DREFCLK 1 2 R_DOT96 14 56 PCLK_MINI_LPC R293 33 CLK_PCIE_ICH R259 49.9/F
8 DREFCLK DOT96MHz PCI2 PCLK_LPC_DEBUG 32
GND_48
DREFCLK# 3 4 R_DOT96# 15 9 R_PCLK_ICH R272 33 CLK_PCIE_ICH# R260 49.9/F
8 DREFCLK# DOT96MHz# PCIF1/100_96M# PCLK_ICH 22
8 R_PCLK_SIO
PCIF0/ITP_EN
33X2
3V
SMbus address D2 /IDT ICS954206AG-T CLK_PCIE_LAN R257 49.9/F
13
51
2
6
29
45
Q17 R266 *10K CLK_PCIE_LAN# R258 49.9/F
3V
2
RHU002N06
R271 10K
3 1 CGCLK_SMB ITP_EN=0 Assertion=
23,33,35 PCLK_SMB
CLK_PCIE_NEW_C R261 49.9/F
SRC7 CLK_PCIE_NEW_C# R262 49.9/F
CYP CY28442 /56pins
ICS954206AGT /56pins R278 *10K DREFSSCLK R255 49.9/F
3V
DREFSSCLK# R256 49.9/F
FSB Frequency Select R279 10K
DREFCLK R265 49.9/F
2 DREFCLK# R254 49.9/F 2
R405=0
DREFSSCLK Frequency Select.
R406=1K "0" : 96MHz "1" : 100MHz
+1.05V R409 56/F
CPU DRIVEN R413=0
R405 0 CLK_BSEL0 R410 0
(default)
3 CPU_BSEL0 MCH_BSEL0 8 R414=1K
R406 1K R416=0
R417=1K
PCLK_LPC_DEBUG
PCLK_LPC_DEBUG 32
R405=NO STUFF PCLK_LPC_KB3920
PCLK_LPC_KB3920 37
+1.05V R414 1K PCI_CLK_5C832
PCI_CLK_5C832 26
R409=56/F PCLK_ICH
PCLK_ICH 22
R413 0 CLK_BSEL1 R411 0
FSB R413=NO STUFF
3 CPU_BSEL1 MCH_BSEL1 8
R412 *0
Freq 533 C338 C335 C336 C393
R412=0
(Mhz) *33P/50V *33P/50V *33P/50V *33P/50V
R416=NO STUFF
R419=0
+1.05V R417 1K R405=NO STUFF
R409=56/F
R416 0 CLK_BSEL2 R291 0
3 CPU_BSEL2 MCH_BSEL2 8
1 R413=NO STUFF 1
R419 *0 667
R414=1K
R416=NO STUFF
R419=0 PROJECT : AT6
Quanta Computer Inc.
Size Document Number Rev
Custom CLOCK GENERATOR 2A
NB5/RD1/HW2
Date: Tuesday, August 01, 2006 Sheet 2 of 45
A B C D E
5 4 3 2 1
T135
U46A
03
6 H_A#[31:3] +1.05V
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