Service Manuals, User Guides, Schematic Diagrams or docs for : . Various Div Laptop Schema`s Toshiba Satelite Pro L40
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5 4 3 2 1
TERESA Block Diagram
FAN + SENSOR
ADM1032ARMZ
PAGE 4
CLOCK GEN
CPU ICS954310
D D
T2060 PAGE 5
4xx,5xx Series DISCHARGER
PAGE 2,3 CIRCUIT
PAGE 37
FSB Power On Sequence
533MHz PAGE 40
DC/BATT IN
LVDS & INV GMCH-M Dual Channel DDR2 PAGE 41
DDR2-533MHz
PAGE 12
Calistoga SO-DIMM X 2 CPU VCORE
CRT 943GML
B0:02G010009121
PAGE 14,15,16 PAGE 50
PAGE 13
PAGE 6,7,8,9,10,11
C
SYSTEM PWR C
DMI Interface
PAGE 51
T/P
BAT & CHARGER
PAGE 30
PAGE 57
PCIE *1 MINI CARD
KEYPAD WLAN
PAGE 26
MATRIX BTO
PAGE 29 LPC
EC IT8511E
INSTANT KEY
33MHz ICH7-M PCIE *1
NEW
Azalia
PAGE 38
PAGE 29,30 CARD
PCI PAGE 25 BTO
33MHz
B0:02G010008811
B LED Control PAGE
B
17,18,19,20
PAGE 30,38
USB 10/100 LAN
ISA SATA IDE RTL8100CL
PAGE 34,35
ROM
PAGE 24 PCMCIA
HDD
CardBus PAGE 44 BTO
(SATA) R5C847
PAGE 43,44 BTO
MEDIA CARD SLOT
MIC PHONE JACK PAGE 28
PAGE 33 BTO
PAGE 23
USB 2.0
Azalia Codec CON X3
HEADPHONE JACK ODD
AD1986A PAGE 36
PAGE 22
PAGE 21,22,23 PAGE 28
A A
SPEAKER AUDIO AMP
PAGE 22 PAGE 22
MDC
PAGE 35 BTO
Title : BLOCK DIAGRAM
ASUSALPHATeK COMPUTER INC. Engineer: Horng Chou
Size Project Name Rev
Custom TERESA 1.1
Date: Monday, February 05, 2007 Sheet 1 of 57
5 4 3 2 1
5 4 3 2 1
6 H_A#[16..3]
6 H_REQ#[4..0]
6 H_A#[31..17]
T202
H_D#[0..63] 6
1
D U201A D
H_A#3 J4 H1 H_ADS#
A[3]# ADS# H_ADS# 6
H_A#4 L4 E2 H_BNR# U201B
A[4]# BNR# H_BNR# 6
H_A#5 M3 G5 H_BPRI# H_D#0 E22 AA23 H_D#32
A[5]# BPRI# H_BPRI# 6 D[0]# D[32]#
H_A#6 K5 H_D#1 F24 AB24 H_D#33
H_A#7 A[6]# H_DEFER# H_D#2 D[1]# D[33]# H_D#34
M1 A[7]# DEFER# H5 H_DEFER# 6 E26 D[2]# D[34]# V24
ADDR GROUP 0
H_A#8 N2 F21 H_DRDY# H_D#3 H22 V26 H_D#35
A[8]# DRDY# H_DRDY# 6 D[3]# D[35]#
H_A#9 J1 E1 H_DBSY# H_D#4 F23 W25 H_D#36
DATA GRP 2
A[9]# DBSY# H_DBSY# 6 D[4]# D[36]#
DATA GRP 0
H_A#10 N3 H_D#5 G25 U23 H_D#37
H_A#11 A[10]# H_BR0# R201 H_D#6 D[5]# D[37]# H_D#38
P5 A[11]# BR0# F1 H_BR0# 6 E25 D[6]# D[38]# U25
H_A#12 P2 56Ohm H_D#7 E23 U22 H_D#39
H_A#13 A[12]# H_IERR# H_D#8 D[7]# D[39]# H_D#40
L1 D20 1 2 +VCCP_AGTL+ K24 AB25
CONTROL
H_A#14 A[13]# IERR# H_INIT# H_D#9 D[8]# D[40]# H_D#41
P4 A[14]# INIT# B3 H_INIT# 17 G24 D[9]# D[41]# W22
H_A#15 P1 H_D#10 J24 Y23 H_D#42
H_A#16 A[15]# H_LOCK# H_D#11 D[10]# D[42]# H_D#43
R1 A[16]# LOCK# H4 H_LOCK# 6 J23 D[11]# D[43]# AA26
H_ADSTB#0 L2 2 1 H_D#12 H26 Y26 H_D#44
6 H_ADSTB#0 ADSTB[0]# +VCCP_AGTL+ D[12]# D[44]#
B1 H_CPURST# H_D#13 F26 Y22 H_D#45
RESET# H_CPURST# 6 D[13]# D[45]#
1
H_REQ#0 K3 F3 H_RS#0 R202 H_D#14 K22 AC26 H_D#46
REQ[0]# RS[0]# H_RS#0 6 D[14]# D[46]#
H_REQ#1 H2 F4 H_RS#1 54.9Ohm @ H_D#15 H25 AA24 H_D#47
REQ[1]# RS[1]# H_RS#1 6 D[15]# D[47]#
H_REQ#2 K2 G3 H_RS#2 H_DSTBN#0 H23 W24 H_DSTBN#2
REQ[2]# RS[2]# H_RS#2 6 T201 6 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 6
H_REQ#3 J3 G2 H_TRDY# H_DSTBP#0 G22 Y25 H_DSTBP#2
REQ[3]# TRDY# H_TRDY# 6 6 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 6
H_REQ#4 L5 H_DINV#0 J26 V23 H_DINV#2
REQ[4]# 6 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 6
G6 H_HIT#
HIT# H_HIT# 6
H_A#17 Y2 E4 H_HITM#
A[17]# HITM# H_HITM# 6
H_A#18 U5 H_D#16 N22 AC22 H_D#48
H_A#19 A[18]# H_D#17 D[16]# D[48]# H_D#49
R3 AD4 K25 AC23 Layout Note:
A[19]# BPM[0]# D[17]# D[49]#
ADDR GROUP 1
H_A#20 W6 AD3 H_D#18 P26 AB22 H_D#50 Comp0,2 connect with Z0=27.4 ohm,
A[20]# BPM[1]# D[18]# D[50]#
XDP/ITP SIGNALS
C H_A#21 U4 AD1 H_D#19 R23 AA21 H_D#51 make trace length shorter than 0.5". C
H_A#22 A[21]# BPM[2]# +VCCP_AGTL+ H_D#20 D[19]# D[51]# H_D#52
Y5 A[22]# BPM[3]# AC4 L25 D[20]# D[52]# AB21 Comp1,3 connect with Z0=54.9 ohm,
DATA GRP 1
H_A#23 U2 AC2 PRDY# 1 T203 H_D#21 L22 AC25 H_D#53
DATA GRP 3
H_A#24 A[23]# PRDY# H_PREQ# 1 R203 56Ohm@ H_D#22 D[21]# D[53]# H_D#54 make trace length shorter than 0.5".
R4 A[24]# PREQ# AC1 2 L23 D[22]# D[54]# AD20
H_A#25 T5 AC5 H_TCK 1 R204 2 56Ohm H_D#23 M23 AE22 H_D#55 Comp[3:0] at least 25 mils away from
H_A#26 A[25]# TCK H_TDI R205 56Ohm H_D#24 D[23]# D[55]# H_D#56 any other toggling signal.
T3 A[26]# TDI AA6 1 2 P25 D[24]# D[56]# AF23
H_A#27 W3 AB3 H_TDO 1 R206 2 56Ohm@ H_D#25 P22 AD24 H_D#57 27.4 ohm connects with an ~18mil
H_A#28 A[27]# TDO H_TMS R207 56Ohm GND H_D#26 D[25]# D[57]# H_D#58
W5 A[28]# TMS AB5 1 2 P23 D[26]# D[58]# AE21 wide trace to comp0.
H_A#29 Y4 AB6 H_TRST# 1 R208 2 56Ohm H_D#27 T24 AD21 H_D#59 54.9 ohm connect with 5mil-wide
H_A#30 A[29]# TRST# CPU_DBR# T204 +VCCP_AGTL+ H_D#28 D[27]# D[59]# H_D#60
W2 A[30]# DBR# C20 1 R24 D[28]# D[60]# AE25 to comp1
H_A#31 Y1 TPC28T H_D#29 L26 AF25 H_D#61
H_ADSTB#1 A[31]# H_PROCHOT_S# H_D#30 D[29]# D[61]# H_D#62
6 H_ADSTB#1 V4 ADSTB[1]# PROCHOT# D21 T25 D[30]# D[62]# AF22
2
A24 CPU_THRM_DA H_D#31 N24 AF26 H_D#63
THERMDA CPU_THRM_DA 4 D[31]# D[63]#
THERM
H_A20M# A6 A25 CPU_THRM_DC R209 H_DSTBN#1 M24 AD23 H_DSTBN#3
17 H_A20M# A20M# THERMDC CPU_THRM_DC 4 6 H_DSTBN#1 DSTBN[1]# DSTBN[3]# H_DSTBN#3 6
H_FERR# A5 1KOhm H_DSTBP#1 N25 AE24 H_DSTBP#3
17 H_FERR# FERR# 6 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 6
H_IGNNE# C4 C7 PM_THRMTRIP# 1% H_DINV#1 M26 AC20 H_DINV#3
17 H_IGNNE# IGNNE# THERMTRIP# PM_THRMTRIP# 4,17 6 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 6
1
H_STPCLK# D5 GTL_REF AD26 R26 H_COMP0 R210 1 2 27.4Ohm 1%
17 H_STPCLK# STPCLK# GTLREF COMP[0]
H_INTR C6 <500 mil (55 Ohm) MISC U26 H_COMP1 R211 1 2 54.9Ohm 1% GND
HCLK
17 H_INTR LINT0 COMP[1]
2
H_NMI B4 A22 CLK_CPU_BCLK U1 H_COMP2 R212 1 2 27.4Ohm 1%
17 H_NMI LINT1 BCLK[0] CLK_CPU_BCLK 5 T/B trace 5 COMP[2]
1
H_SMI# A3 A21 CLK_CPU_BCLK# C201 R213 @ R214 1 2 TEST1 C26 V1 H_COMP3 R215 1 2 54.9Ohm 1%
17 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 5 TEST1 COMP[3]
0.1UF/10V 2KOhm Space 25 1KOhm
AA1 @ 1% R216 1 2 TEST2 D25 E5 H_DPRSTP#
H_DPRSTP# 17,50
2
RSVD[1] 51Ohm TEST2 DPRSTP# H_DPSLP#
AA4 T22 B5 H_DPSLP# 17
1
RSVD[2] RSVD[12] GND DPSLP# H_DPWR#
AB2 RSVD[3] RSVD[A2] A2 DPWR# D24 H_DPWR# 6
AA3 CPU_BSEL0 B22 D6 H_PWRGD
RSVD[4] 5 CPU_BSEL0 BSEL[0] PWRGOOD H_PWRGD 17
M4 D2 GND GND CPU_BSEL1 B23 D7 1
5 CPU_BSEL1
RESERVED
RSVD[5] RSVD[13] CPU_BSEL2 BSEL[1] SLP# T205
B N5 RSVD[6] RSVD[14] F6 5 CPU_BSEL2 C21 BSEL[2] PSI# AE6 B
T2 D3 H_CPUSLP#
RSVD[7] RSVD[15] H_CPUSLP# 6,17
V3 C1 For Celeron M PM_PSI#
RSVD[8] RSVD[16] PM_PSI# 50
B2 RSVD[9] RSVD[17] AF1 (070122)Change CPU Socket
C3 RSVD[10] RSVD[18] D22 into PN=12G011204796
RSVD[19] C23 BCLK
B25 RSVD[11] RSVD[20] C24 FSB BSEL2BSEL1BSEL0
133MHz 533MHz L L H
(070122)Change CPU Socket
into PN=12G011204796
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