Service Manuals, User Guides, Schematic Diagrams or docs for : . Various Div Laptop Schema`s Toshiba Satelite Pro L450
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A B C D E
1 1
NBWAA
2
Low Cost Los Angeles 10L 2
LA-5821P REV 1.0 Schematics
3
Intel Penryn/ Cantiga/ ICH9M 3
2008-08-10 Rev. 1.0
4 4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/07/28 Deciphered Date 2010/07/28 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NBWAA LA5821P M/B
Date: Thursday, August 06, 2009 Sheet 1 of 41
A B C D E
A B C D E
Compal Confidential
Model Name : NBWAA Intel Penryn Processor Thermal Sensor Clock Generator
Fan Control EMC1402-1 SLG8SP556VTR
File Name : LA-5821P page 5
uPGA-478 Package page 5 page 17
1
(Socket P) page 5,6,7
1
FSB
H_A#(3..35) 667/800/1066MHz H_D#(0..63)
CRT Memory BUS(DDRII)
page 18 200pin DDRII-SO-DIMM X2
Intel Cantiga Dual Channel BANK 0, 1, 2, 3 page 15,16
LCD Conn. GM45/GL40
page 18 1.8V DDRII 533/667/800
HDMI Conn. Level Shifter uFCBGA-1329
page 19 page 19
page 8,9,10,11,12,13,14
2
DMI x 4 C-Link 2
PCIeMini Card
USB USB/B USB conn
WLAN 5V 480MHz USB port 0,1 USB port 3
USB port 7 PCIe 1x [2,4,5] USB page 24 page 24
page 25
1.5V 2.5GHz(250MB/s)
5V 480MHz
PCIe port 4 Int. Camera
page 25 Intel ICH9-M USB port 11
page 18,25
BGA-676
RJ45 PCIe 1x SATA port 1 SATA HDD
page 26 RTL8103EL 10/100M 1.5V 2.5GHz(250MB/s) page 19,20,21,22 5V 1.5GHz(150MB/s) page 24
PCIe port 3 page 26
SATA port 4 SATA ODD
5V 1.5GHz(150MB/s) page 24
USB
RTS5159-VDD 3IN1 5V 480MHz
3 3
USB port 10 page 29
3.3V 33 MHz
LPC BUS
HD Audio 3.3V 24.576MHz/48Mhz
MDC 1.5 Conn HDA Codec
ALC272
Debug Port ENE KB926 D3 page 25 page 27
NBWAA Sub-boards page 31 page 30
RTC CKT.
page 21
USB/B AMP.
page 24
Touch Pad SPI ROM Int. TPA6017
DC/DC Interface CKT. Int.KBD MIC CONN MIC CONN HP CONN
page 31 page 31 page 31 page 28 page 28 page 28 page 28
page 33 Power/B
page 32
4 SPK CONN 4
page 28
Power Circuit DC/DC CS/B
page 31
page 34~40
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/07/28 Deciphered Date 2010/07/28 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NBWAA LA5821P M/B
Date: Thursday, August 06, 2009 Sheet 2 of 41
A B C D E
5 4 3 2 1
DESIGN CURRENT 0.1A +3VL
B+
Ipeak=5A, Imax=3.5A, Iocp min=7.9 DESIGN CURRENT 5A +5VALW
SBPWR_EN#
N-CHANNEL DESIGN CURRENT 2mA +5V_SB
D 2N7002DW D
SUSP
N-CHANNEL DESIGN CURRENT 4A +5VS
SI4800
TPS51125RGER DESIGN CURRENT 0.5A
DIODE FUSE
+HDMI_5V_OUT
PMEG2010AEH 1.1A_6V
Ipeak=5A, Imax=3.5A, Iocp min=7.7 DESIGN CURRENT 5A +3VALW
WOL_EN#
P-CHANNEL DESIGN CURRENT 330mA +3V_LAN
AO-3413
SBPWR_EN#
C N-CHANNEL DESIGN CURRENT 225mA +3V_SB C
SI3456
SUSP
N-CHANNEL DESIGN CURRENT 4A +3VS
SI4800 UMA_ENVDD
P-CHANNEL DESIGN CURRENT 1.5A +LCD_VDD
AO-3413
VR_ON
DESIGN CURRENT 47A +CPU_CORE
ISL6262ACRZ-T
SYSON
Ipeak=8A, Imax=5.6A, Iocp min=19.8 DESIGN CURRENT 10A +1.8V
TPS51117RGYR
SUSP
B B
DESIGN CURRENT 1.5A +0.9VS
APL5331KAC
SUSP#
Ipeak=5A, Imax=3.5A, Iocp min=16.5 DESIGN CURRENT 4A +1.5VS
TPS51124RGER Ipeak=10A, Imax=7A, Iocp min=16.5 DESIGN CURRENT 10.2A +1.05VS
A A
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/07/28 Deciphered Date 2010/07/28 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power Tree
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NBWAA LA5821P M/B
Date: Thursday, August 06, 2009 Sheet 3 of 41
5 4 3 2 1
A B C D E
Voltage Rails SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5#
Power Plane Description S1 S3 S5 G3 Full ON HIGH HIGH HIGH HIGH
VIN Adapter power supply (19V) ON ON ON OFF S1(Power On Suspend) LOW HIGH HIGH HIGH
1 1
B+ AC or battery power rail for power circuit. ON ON ON ON
S3 (Suspend to RAM) LOW LOW HIGH HIGH
+CPU_CORE Core voltage for CPU ON OFF OFF OFF
+0.9VS 0.9V switched power rail for DDR terminator ON OFF OFF OFF S4 (Suspend to Disk) LOW LOW LOW HIGH
+1.05VS 1.05V switched power rail ON OFF OFF OFF
S5 (Soft OFF) LOW LOW LOW LOW
+1.5VS 1.5V switched power rail ON OFF OFF OFF
+1.8V 1.8V power rail for DDR ON ON OFF OFF G3 LOW LOW LOW LOW
+3VALW 3.3V always on power rail ON ON ON OFF
+3VL 3.3V always on power rail ON ON ON ON
+3V_SB 3.3V power rail for LAN ON ON OFF OFF
+3V_LAN 3.3V power rail for LAN ON ON OFF OFF
+3V_WLAN 3.3V power rail for LAN ON ON OFF OFF BTO Option Table
+3VS 3.3V switched power rail ON OFF OFF OFF
+5VALW 5V always on power rail ON ON ON OFF
Function North Bridge RJ11 CAMERA MIC HDMI
+5VL 5V always on power rail ON ON ON ON
2
+5V_SB 5V power rail for SB ON ON OFF OFF description GM GL Y 2
+5VS 5V switched power rail ON OFF OFF OFF
explain GM45 GL40 MODEM CAMERA MIC HDMI Non-HDMI
+VSB VSB always on power rail ON ON ON OFF
GM45R3@ GL40R3@
+RTCVCC RTC power ON ON ON ON BTO GM45R1@ GL40R1@ MDC@ CAM@ MIC@ IHDMI@ NIHDMI@
+CPU_CORE Core voltage for VGA chip ON ON OFF OFF
+VGA_PCIE_1.1VS 1.1V switched power rail for VGA PCIE ON ON OFF OFF
+1.8VS 1.8V power rail for VRAM ON ON OFF OFF
External PCI Devices
EC SM Bus1 address EC SM Bus2 address
3 3
Power Device Address Power Device Address
+3VL EC KB926 D3 +3VS EC KB926 D3
+3VL Smart Battery 0001 011X b CPU THM Sen
+3VS SMSC SMC1402 0100 110x b
+3VL FUN/B (CAP Sensor)
ICH9M SM Bus address
Power Device Address
+3V_SB ICH9M
Clock Generator 1101 001Xb
4 +3VS (SLG8SP556V) 4
+3VS DDR DIMM0 1001 000Xb
+3VS DDR DIMM1 1001 010Xb
+3VS Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/07/28 Deciphered Date 2010/07/28 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
NBWAA LA5821P M/B
Date: Thursday, August 06, 2009 Sheet 4 of 41
A B C D E
5 4 3 2 1
@
8 H_A#[3..16] +3VS
JCPUA
H_A#3 J4 H1
A[3]# ADS# H_ADS# 8
ADDR GROUP_0
H_A#4 L5 E2
A[4]# BNR# H_BNR# 8
H_A#5 L4 G5
A[5]# BPRI# H_BPRI# 8
H_A#6 K5 1
0.1U_0402_16V4Z
H_A#7 A[6]#
M3 A[7]# DEFER# H5 H_DEFER# 8
H_A#8 N2 F21 C1
A[8]# DRDY# H_DRDY# 8
H_A#9 J1 E1 U1
A[9]# DBSY# H_DBSY# 8 2
H_A#10 N3
H_A#11 A[10]#
P5 A[11]# BR0# F1 H_BR0# 8
H_A#12 P2 1 8
A[12]# VDD SMCLK EC_SMB_CK2 30
CONTROL
D H_A#13 L2 D20 H_IERR# R1 1 2 56_0402_5% +1.05VS D
H_A#14 A[13]# IERR# H_INIT# H_THERMDA
P4 A[14]# INIT# B3 H_INIT# 21 2 DP SMDATA 7 EC_SMB_DA2 30
H_A#15 P1 C2
H_A#16 A[15]# H_THERMDC
R1 A[16]# LOCK# H4 H_LOCK# 8 1 2 3 DN ALERT# 6 1 2 +3VS
M1 2200P_0402_50V7K R2 10K_0402_5%
8 H_ADSTB#0 ADSTB[0]#
C1 H_RESET# CPU_THERM# 4 5 @ Reserve for source control
RESET# H_RESET# 8 THERM# GND
8 H_REQ#0 K3 REQ[0]# RS[0]# F3 H_RS#0 8
H2 F4 if use XDP,these resistor are 51ohm +1.05VS R3
8 H_REQ#1 REQ[1]# RS[1]# H_RS#1 8
8 H_REQ#2 K2 REQ[2]# RS[2]# G3 H_RS#2 8 +3VS 1 2
J3 G2 XDP_TDO 1 2 10K_0402_5% EMC1402-1-ACZL-TR_MSOP8
8 H_REQ#3 REQ[3]# TRDY# H_TRDY# 8
8 H_REQ#4 L1 REQ[4]#
R14 54.9_0402_1% Address:0100_1100 EMC1402-1
G6 XDP_TMS 1 2 Address:0100_1101 EMC1402-2
8 H_A#[17..35] HIT# H_HIT# 8
H_A#17 Y2 E4 R4 54.9_0402_1%
A[17]# HITM# H_HITM# 8
H_A#18 U5 XDP_TDI 1 2
H_A#19 A[18]# R5 54.9_0402_1%
R3 A[19]# BPM[0]# AD4
ADDR GROUP_1
H_A#20 W6 AD3
H_A#21 A[20]# BPM[1]# XDP_TCK
U4 AD1 1 2
H_A#22
H_A#23
Y5
A[21]#
A[22]#
BPM[2]#
BPM[3]# AC4
XDP_TRST#
R6 54.9_0402_1%
+5VS
FAN Control Circuit
U1 AC2 1 2
XDP/ITP SIGNALS
H_A#24 A[23]# PRDY# R7 54.9_0402_1%
R4 A[24]# PREQ# AC1
H_A#25 T5 A[25]# TCK AC5 XDP_TCK 1A
H_A#26 T3 AA6 XDP_TDI
H_A#27 A[26]# TDI XDP_TDO
W2 A[27]# TDO AB3 PAD T13
1
H_A#28 W5 AB5 XDP_TMS +1.05VS 1 2
H_A#29 A[28]# TMS XDP_TRST# R8 @ 56_0402_5%
Y4 A[29]# TRST# AB6 1SS355_SOD323-2
H_A#30 U2 C20 XDP_DBRESET# 1 2 2
A[30]# DBR# XDP_DBRESET# 22
H_A#31 V4 R9 56_0402_5% @ D1
A[31]#
2
JFAN
B
B
H_A#32 W3 C3
2
H_A#33 A[32]# 10U_0805_10V4Z +FAN1
AA4 A[33]# THERMAL 1
1 1
E
C H_A#34 AB2 H_PROCHOT# 3 1 2 C
A[34]# OCP# 22 2
1
C
H_A#35 AA3 D21 H_PROCHOT# Q6 2 3
A[35]# PROCHOT# H_THERMDA @ MMBT3904_SOT23 U2 3
8 H_ADSTB#1 V1 ADSTB[1]# THERMDA A24
B25 H_THERMDC PROCHOT# PU: 68Ohm near CPU and MVP6. 1 8 D2 C4 4
H_A20M# THERMDC EN GND @ @ 1000P_0402_25V8J GND
21 H_A20M# A6 A20M# 56Ohm near CPU if no used. 2 VIN GND 7 5 GND
1
ICH
H_FERR# A5 C7 +FAN1 3 6
21 H_FERR# H_THERMTRIP# 9,21
2
H_IGNNE# FERR# THERMTRIP# VOUT GND
21 H_IGNNE# C4 IGNNE# 30 EN_DFAN1 4 VSET GND 5 ACES_85204-0300N
1 BAS16_SOT23-3
21 H_STPCLK#
H_STPCLK# D5 STPCLK#
10mil APL5607KI-TRG_SO8 @
H_INTR C6 H CLK C5
21 H_INTR LINT0
H_NMI B4 A22 H_THERMDA, H_THERMDC routing together, 10U_0805_10V4Z R10 10K_0402_5%
21 H_NMI LINT1 BCLK[0] CLK_CPU_BCLK 17 2
H_SMI# A3 A21 2 1 +3VS
21 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 17 Trace width / Spacing = 10 / 10 mil
M4 RSVD[01] FAN_SPEED1 30
N5 RSVD[02] 2
T2 RSVD[03]
V3 C6
RSVD[04]
B2 0.01U_0402_16V7K
RESERVED
RSVD[05] 1 @
D2 RSVD[06]
D22 RSVD[07]
Reserve for D3 RSVD[08]
F6
debug RSVD[09]
close to South
Bridge
Penryn
H_FERR# 2 1
B C596 180P_0402_50V8J B
H_SMI# 2 1
C597 180P_0402_50V8J
H_INIT# 2 1
C598 180P_0402_50V8J
H_NMI 2 1
C599 180P_0402_50V8J
H_A20M# 2 1
C600 180P_0402_50V8J
H_INTR 2 1
C601 180P_0402_50V8J
H_IGNNE# 2 1
C602 180P_0402_50V8J
H_STPCLK# 2 1
C603 180P_0402_50V8J
Reserve for
debug
close to CPU
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