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Spec. No.: EN05-v2-0.2
Version: 1
Total pages: 26
Date: 2003-Jan-21
AU OPTRONICS CORPORATION
Product Specifications
17.0" SXGA Color TFT-LCD Module
Model Name: M170EN05
V.2
DDBU Marketing Division / AU Optronics Croporation
Customer Checked & Approved by
(C) Copyright AU Optronics, Inc.
January, 2002 All Rights Reserved. M170EN05 v.1 Ver0.2
No Reproduction and Redistribution Allowed.
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Product Specifications
17.0" SXGA Color TFT-LCD Module
Model Name: M170EN05
V.2
( ) Preliminary Specifications
() Final Specifications
Note: This Specification is subject to change without notice.
(C) Copyright AU Optronics, Inc. 1/26
January, 2002 All Rights Reserved. M170EN05 v.2 Ver0.2
No Reproduction and Redistribution Allowed.
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i Contents
ii Record of Revision
1.0 Handling Precautions
2.0 General Description
2.1 Display Characteristics
2.2 Functional Block Diagram
2.3 Optical Characteristics
2.4 Pixel format image
3.0 Electrical characteristics
3.1 Absolute Maximum Ratings
3.2 Connectors
3.3 Signal Pin
3.4 Signal Description
3.5 Signal Electrical Characteristics
3.6 Interface Timing
3.6.1 Timing Characteristics
3.6.2 Timing Definition
3.7 Power Consumption
3.8 Power ON/OFF Sequence
4.0 Backlight Characteristics
4.1 Signal for Lamp connector
4.2 Parameter guide line for CCFL Inverter
5.0 Vibration, shock and drop
5.1 Vibration and shock
5.2 Drop test
6.0 Environment
6.1 Temperature and humidity
6.1.1 Operating conditions
6.1.2 Shipping conditions
6.2 Atmospheric pressure
6.3 Thermal shock
(C) Copyright AU Optronics, Inc. 2/26
January, 2002 All Rights Reserved. M170EN05 v.2 Ver0.2
No Reproduction and Redistribution Allowed.
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7.0 Reliability
7.1 Failure criteria
7.2 Failure rate
7.2.1 Usage
7.2.2 Components de-rating
7.3 CCFL life
7.4 ON/OFF cycle
8.0 Safety
8.1 Sharp edge requirement
8.2 Material
8.2.1 Toxicity
8.2.2 Flammability
8.3 Capacitors
8.4 Hazardous voltage
9.0 Other requirements
9.1 Smoke free design
9.2 National test lab requirement
10.0 Mechanical Characteristics
(C) Copyright AU Optronics, Inc. 3/26
January, 2002 All Rights Reserved. M170EN05 v.2 Ver0.2
No Reproduction and Redistribution Allowed.
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ii Record of Revision
Version and Date Page Old description New Description Remark
0.1 2002/09/18 All First Edition for Customer All
0.2 2003/01/21 19 Power sequence Power sequence Update
(C) Copyright AU Optronics, Inc. 4/26
January, 2002 All Rights Reserved. M170EN05 v.2 Ver0.2
No Reproduction and Redistribution Allowed.
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1.0 Handling Precautions
1) Since front polarizer is easily damaged, pay attention not to scratch it.
2) Be sure to turn off power supply when inserting or disconnecting from input connector.
3) Wipe off water drop immediately. Long contact with water may cause discoloration or spots.
4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.
5) Since the panel is made of glass, it may break or crack if dropped or bumped on hard surface.
6) Since CMOS LSI is used in this module, take care of static electricity and insure human earth when
handling.
7) Do not open nor modify the Module Assembly.
8) Do not press the reflector sheet at the back of the module to any directions.
9) At the insertion or removal of the Signal Interface Connector, be sure not to rotate nor tilt the Interface
Connector of the TFT-LCD module.
10) After installation of the TFT-LCD module into an enclosure (LCD monitor housing, for example), do not
twist nor bend the TFT -LCD module even momentary. At designing the enclosure, it should be taken
into consideration that no bending/twisting forces are applied to the TFT -LCD module from outside.
Otherwise the TFT -LCD module may be damaged.
(C) Copyright AU Optronics, Inc. 5/26
January, 2002 All Rights Reserved. M170EN05 v.2 Ver0.2
No Reproduction and Redistribution Allowed.
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General Description
This specification applies to the 17.0 inch Color TFT-LCD Module M170EN05.
The display supports the SXGA (1280(H) x 1024(V)) screen format and 262k colors (RGB 6-bits data).
All input signals are 2 Channel LVDS interface compatible.
This module does not contain an inverter card for backlight.
2.1 Display Characteristics
The following items are characteristics summary on the table under 25 condition:
ITEMS Unit SPECIFICATIONS
Screen Diagonal [mm] 432(17.0")
Active Area [mm] 337.920 (H) x 270.336(V)
Pixels H x V 1280(x3) x 1024
Pixel Pitch [mm] 0.264 (per one triad) x 0.264
Pixel Arrangement R.G.B. Vertical Stripe
Display Mode Normally White
White Luminance [cd/m2] 260 (center) @ 7mA
Contrast Ratio 450 : 1 (Typ)
Optical Response Time [msec] 16 (Typ)
Color Saturation 72% NTSC
Nominal Input Voltage VDD [Volt] +5.0 V
Power Consumption [Watt] 25W (typ)
(VDD line + CCFL line) (w/o Inverter, All black pattern)
Weight [Grams] 2000 (Typ)
Physical Size [mm] 358.5(W) x 296.5(H) x 19.0(D)
Electrical Interface Even/Odd R/G/B data, 3 sync signal,
Clock
Support Color 262k colors (RGB 6-bit data )
Temperature Range
Operating [oC] 0 to +50
Storage (Shipping) [oC] -20 to +60
(C) Copyright AU Optronics, Inc. 6/26
January, 2002 All Rights Reserved. M170EN05 v.2 Ver0.2
No Reproduction and Redistribution Allowed.
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2.2 Functional Block Diagram
The following diagram shows the functional block of the 17.0 inches Color TFT-LCD Module:
AU ASIC
G1
Timing
Y-Driver IC
LVDS Controller TFT-LCD
LVDS 1280*(3)*1024
Connector
Receiver Pixels
RSDS
+ 5V Transmitte
X-Driver IC
G1024
D1 D3840
4 CCFL
DC/DC Gamma
Converter Correction
DC POWER
Inverter
JAE FI-X30S-HF JST BHR-04VS-1
Mating Type: JAE FI-X30S-H Mating Type: SM04(4.0)B-BHS-1-TB
(C) Copyright AU Optronics, Inc. 7/26
January, 2002 All Rights Reserved. M170EN05 v.2 Ver0.2
No Reproduction and Redistribution Allowed.
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2.3 Optical Characteristics
The optical characteristics are measured under stable conditions at 25 (Room Temperature) :
Item Unit Conditions Min. Typ. Max.
Horizontal (Right) 60 70
-
CR = 10 (Left) 60 70
Vertical (Up) 60 70
-
CR = 10 (Down) 60 70
Viewing Angle [degree]
Horizontal (Right) 70 80 -
CR = 5 (Left) 70 80 -
Vertical (Up) 70 80 -
CR = 5 (Down) 70 80 -
Contrast ratio Normal Direction 250 450 -
Raising Time - 4 5
Response Time (Note 1) [msec] Falling Time - 12 20
Raising + Falling - 16 25
Red x 0.61 0.64 0.67
Red y 0.31 0.34 0.37
Color / Chromaticity Green x 0.26 0.29 0.32
Coordinates (CIE) Green y 0.58 0.61 0.64
Blue x 0.11 0.14 0.17
Blue y 0.04 0.07 0.10
White x 0.28 0.31 0.34
Color Coordinates (CIE) White
White y 0.30 0.33 0.36
White Luminance @ CCFL 7.0mA [cd/m2]
200 260 -
(center)
Luminance Uniformity (Note 2) [%] 75 80 -
TCO99 1.5.2B luminance uniformity
1.7
(Note 3)
Crosstalk (in 75Hz) (Note 4) [%] 1.5
Equipment Pattern Generator, Power Supply, Digital Voltmeter, Luminance meter (PR 880, BM-5A)
Aperture 1 with 100cm VD or 2 with 50cm viewing distance
Test Point Center (ISO point 22)
Environment < 1 lux
LCD Module
PR-880 /
BM5A /
BM7
measuring distance
Module Driving Equipment
(C) Copyright AU Optronics, Inc. 8/26
January, 2002 All Rights Reserved. M170EN05 v.2 Ver0.2
No Reproduction and Redistribution Allowed.
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Note 1: Definition of Response time:
The output signals of photodetector are measured when the input signals are changed from " Black" to " White"
(falling time), and from "White" to " Black" (rising time), respectively. The response time is interval between the 10%
and 90% of amplitudes.
TrR TrD
100
90
10
0
Note 2: Brightness uniformity of these 9 points is defined as below:
90 % 50 % 10 %
10 %
50 %
90 %
Minimum Luminance in 9 Points (1-9)
Uniformity = ----------------------------------------
Maximum Luminance in 9 Points (1-9)
Note 3: TCO '99 Certification Requirements and test methods for environmental labeling of Display Report No. 2
defines Luminance uniformity as below:
((Lmax,+30deg. / Lmin,+30deg.) + (Lmax,-30deg. / Lmin,-30deg.)) / 2
This panel is compatible with TCO99 approbation in luminance uniformity <1.7, luminance contrast >0.5
(C) Copyright AU Optronics, Inc. 9/26
January, 2002 All Rights Reserved. M170EN05 v.2 Ver0.2
No Reproduction and Redistribution Allowed.
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Note 4:
1/2 1/6 2/3 1/2 1/3 1/6
1/6
A A' 1/6
1/3
1/2 1/2
B B'
2/3
184 gray level 184 gray level
0 gray level
Unit: percentage of dimension of display area
l LA-LA' l / LA x 100%= 1.5% max., LA and LB are brightness at location A and B
l LB-LB' l / LB x 100%= 1.5% max., LA' and LB' are brightness at location A' and B'
2.4: Pixel format image
Following figure shows the relationship of the input signals and LCD pixel format.
1 2 1279 1280
1st Line R G B R G B R GB R G B
1024th R G B R G B R GB R G B
(C) Copyright AU Optronics, Inc. 10/26
January, 2002 All Rights Reserved. M170EN05 v.2 Ver0.2
No Reproduction and Redistribution Allowed.
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3.0 Electrical characteristics
3.1 Absolute Maximum Ratings
Absolute maximum ratings of the module is as following:
Item Symbol Min Max Unit Conditions
Logic/LCD Drive Voltage VIN -0.3 +5.5 [Volt]
Select LVDS data order SELLVDS NC NC [Volt]
CCFL Inrush current ICFLL - 38 [mA]
CCFL Current ICFL - 7.6 [mA] rms
Operating Temperature TOP 0 +50 [oC] Note 1
Operating Humidity HOP 8 95 [%RH] Note 1
o
Storage Temperature TST -20 +60 [ C] Note 1
Storage Humidity HST 8 95 [%RH] Note 1
Note 1 : Maximum Wet-Bulb should be 39 and No condensation.
Relative Humidity %
Twb=39
T=40 ,H=95%
100
95
80
T=50 ,H=55%
60
T=60 ,H=39%
Storage T=65 ,H=29%
40 Operation range
range
20 Storage
range
5
0 -20 0 50 60
o
Temperature C
(C) Copyright AU Optronics, Inc. 11/26
January, 2002 All Rights Reserved. M170EN05 v.2 Ver0.2
No Reproduction and Redistribution Allowed.
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3.2 Connectors
Physical interface is described as for the connector on module.
These connectors are capable of accommodating the following signals and will be following components.
Connector Name / Designation Interface Connector / Interface card
Manufacturer JAE or compatible
Type Part Number FI-X30S-HF
Mating Housing Part Number FI-X30S-H
Connector Name / Designation Lamp Connector / Backlight lamp
Manufacturer JST
Type Part Number BHR-04VS-1
Mating Type Part Number SM04(4.0)B-BHS-1-TB
3.3 Signal Pin
Pin# Signal Name Pin# Signal Name
1 RxO0- 2 RxO0+
3 RxO1- 4 RxO1+
5 RxO2- 6 RxO2+
7 GND 8 RxOC-
9 RxOC+ 10 RxO3-
11 RxO3+ 12 RxE0-
13 RxE0+ 14 GND
15 RxE1- 16 RxE1+
17 GND 18 RxE2-
19 RxE2+ 20 RxEC-
21 RxEC+ 22 RxE3-
23 RxE3+ 24 GND
25 NC 26 NC
27 NC 28 Power
29 Power 30 Power
(C) Copyright AU Optronics, Inc. 12/26
January, 2002 All Rights Reserved. M170EN05 v.2 Ver0.2
No Reproduction and Redistribution Allowed.
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3.4 Signal Description
The module using a pair of LVDS receiver SN75LVDS82 (Texas Instruments) or compatible. LVDS is a
differential signal technology for LCD interface and high speed data transfer device. Transmitter shall be
SN75LVDS83(negative edge sampling) or compatible. The first LVDS port(RxOxxx) transmits odd pixels
while the second LVDS port(RxExxx) transmits even pixels.
PIN # SIGNAL NAME DESCRIPTION
1 RxO0- Negative LVDS differential data input (Odd data)
2 RxO0+ Positive LVDS differential data input (Odd data)
3 RxO1- Negative LVDS differential data input (Odd data)
4 RxO1+
Positive LVDS differential data input (Odd data)
5 RxO2- Negative LVDS differential data input (Odd data, H-Sync,V-Sync,DSPTMG)
6 RxO2+ Positive LVDS differential data input (Odd data, H-Sync,V-Sync,DSPTMG)
7 GND Power Ground
8 RxOC- Negative LVDS differential clock input (Odd clock)
9 RxOC+ Positive LVDS differential clock input (Odd clock)
10 RxO3- Negative LVDS differential data input (Odd data)
11 RxO3+ Positive LVDS differential data input (Odd data)
12 RxE0- Negative LVDS differential data input (Even clock)
13 RxE0+ Positive LVDS differential data input (Even data)
14 GND Power Ground
15 RxE1- Positive LVDS differential data input (Even data)
16 RxE1+ Negative LVDS differential data input (Even data)
17 GND Power Ground
18 RxE2- Negative LVDS differential data input (Even data)
19 RxE2+ Positive LVDS differential data input (Even data)
20 RxEC- Negative LVDS differential clock input (Even clock)
21 RxEC+ Positive LVDS differential clock input (Even clock)
22 RxE3- Negative LVDS differential data input (Even data)
23 RxE3+ Positive LVDS differential data input (Even data)
24 GND Power Ground
25 NC -
26 NC -
27 NC -
28 POWER Power
29 POWER Power
30 POWER Power
Note: Input signals of odd and even clock shall be the same timing.
LVDS DATA Name Description
DSP Display Timing: When the signal is high, the pixel data shall be valid to be displayed
V-S Vertical Sync: Both Positive and Negative polarity are acceptable
H-S Horizontal Sync: Both Positive and Negative polarity are acceptable
(C) Copyright AU Optronics, Inc. 13/26
January, 2002 All Rights Reserved. M170EN05 v.2 Ver0.2
No Reproduction and Redistribution Allowed.
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TI LVDS X'mitter Module LVDS signal
SN75LVDS83 (interface connector pin7)
Signal Name Low(open)
D0 Red0
D1 Red1
D2 Red2
D3 Red3
D4 Red4
D5 Red7
D6 Red5
D7 Green0
D8 Green1
D9 Green2
D10 Green6
D11 Green7
D12 Green3
D13 Green4
D14 Green5
D15 Blue0
D16 Blue6
D17 Blue7
D18 Blue1
D19 Blue2
D20 Blue3
D21 Blue4
D22 Blue5
D23 NA
D24 H Sync
D25 V Sync
D26 Display Timing
D27 Red6
(C) Copyright AU Optronics, Inc. 14/26
January, 2002 All Rights Reserved. M170EN05 v.2 Ver0.2
No Reproduction and Redistribution Allowed.
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8bits input: M170EN05 only catch bit 2 to bit 7 for 6 bit display
6bits input data format marked with ( ).
Note: R/G/B data 7:MSB, R/G/B data 0:LSB
O = "First Pixel Data"
E = "Second Pixel Data"
(C) Copyright AU Optronics, Inc. 15/26
January, 2002 All Rights Reserved. M170EN05 v.2 Ver0.2
No Reproduction and Redistribution Allowed.
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Scaling IC Controller IC Driver IC
8 bits LVDS 8 bits LVDS 8 bits RSDS 6 bits RSDS
6 bits+FRC transmitter Receiver transmitter receiver driver IC
0 0
1 1 open
01
0 2 2
23 01
1 3 3
45 23
2 4 4
67 45
3 5 5
4 6 6
5 7 7
System LVDS interface M170EN05 module
(C) Copyright AU Optronics, Inc. 16/26
January, 2002 All Rights Reserved. M170EN05 v.2 Ver0.2
No Reproduction and Redistribution Allowed.
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3.5 Signal Electrical Characteristics
Input signals shall be low or Hi-Z state when Vin is off
It is recommended to refer the specifications of SN75LVDS82DGG (Texas Instruments) in detail.
Each signal characteristics are as follows;
Parameter Condition Min Max Unit
Differential InputHigh
Vth 100 [mV]
Voltage(Vcm=+1.2V)
Differential Input Low
Vtl -100 [mV]
Voltage(Vcm=+1.2V)
3.6 Interface Timings
Basically, interface timings described here is not actual input timing of LCD module but output timing of
SN75LVDS82DGG (Texas Instruments) or equivalent.
3.6.1 Timing Characteristics
Signal Item Symbol MIN TYP MAX Unit
DTCLK Freq. Fdck 50 67.5 70 MHz
DTCLK Cycle Tck 14.2 14.8 20 ns
+V-Sync Frame Rate 1/Tv 56.25 75 77 Hz
+V-Sync Cycle Tv 13 13.33 17.78 ms
+V-Sync Cycle Tv 1035 1066 2047 lines
+V-Sync Active level Tva 3 3 lines
+V-Sync V-back porch Tvb 7 38 63 lines
+V-Sync V-front porch Tvf 1 1 lines
+DSPTMG V-Line m - 1024 - lines
+H-Sync Scan rate 1/Th - 80.06 - KHz
+H-Sync Cycle Th 800 844 1023 Tck
+H-Sync Active level Tha (*1) 4 56 Tck
+H-Sync Back porch Thb (*1) 4 124 Tck
+H-Sync Front porch Thf 4 24 Tck
+DSPTMG Display Pixels n - 640 - Tck
Note: Typical value refer to VESA STANDARD (*1) Tha+Thb should be less than 1024 Tck.
(C) Copyright AU Optronics, Inc. 17/26
January, 2002 All Rights Reserved. M170EN05 v.2 Ver0.2
No Reproduction and Redistribution Allowed.
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3.6.2 Timing Definition
1688dot
H-Sync
48dot 248dot
112dot
DSPTMG
1280dot
V-Sync
1H 38H
3H
DSPTMG
42H 1024H
3.7 Power Consumption
Input power specifications are as follows;
Symbol Parameter Min Typ Max Units Condition
VDD Logic/LCD Drive 4.5 5 5.5 [Volt]
Voltage
IDD VDD current 950 1200 [mA]
PDD VDD Power 4.75 6.6 [Watt] Vin=5V, All Black Pattern
VDDrp Allowable 100 [mV]
Logic/LCD Drive p-p
Ripple Voltage
VDDns Allowable 100 [mV]
Logic/LCD Drive p-p
Ripple Noise
(C) Copyright AU Optronics, Inc. 18/26
January, 2002 All Rights Reserved. M170EN05 v.2 Ver0.2
No Reproduction and Redistribution Allowed.
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3.8 Power ON/OFF Sequence
Vin power and lamp on/off sequence is as follows. Interface signals are also shown in the chart. Signals from any
system shall be Hi-Z state or low level when Vin is off.
1sec
min.
Vin
10% 90% 90%
0V
10%
15ms max. 50~100ms 10%
Signal 0 min. 0 min.
0V 10% 10%
Lamp 250ms
0 min.
On
0V
250ms
Add white data (the lowest voltage data) at the end data portion while B/L turn-off.
The purpose is to discharge panel residual charges. The white pattern time period is near about 50~100ms
(About 3~6 frame time).
4.0 Backlight Characteristics
4.1 Signal for Lamp connector
Pin # Signal Name
1 Lamp High Voltage
2 Lamp High Voltage
3 No Connection
4 Ground
(C) Copyright AU Optronics, Inc. 19/26
January, 2002 All Rights Reserved. M170EN05 v.2 Ver0.2
No Reproduction and Redistribution Allowed.
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4.2 Parameter guideline for CFL Inverter
Symbol Parameter Min Typ Max Units Condition
[cd/m2 ]
(L63) White Luminance 200 260 - (Ta=25oC)
[mA]
ISCFL CCFL standard current 6.5 7.0 7.5 (Ta=25oC)
rms
[mA]
IRCFL CCFL operation range 3.0 7.0 7.5 (Ta=25oC)
rms
ICFL CCFL Inrush current - 26 34 [mA] Note 1
(Ta=25oC)
fCFL CCFL Frequency 40 50 80 [KHz]
Note 2
ViCFL [Volt] (Ta=0oC)
CCFL Ignition Voltage 1700
(0oC) rms Note 3
ViCFL [Volt] (Ta=25oC)
CCFL Ignition Voltage 1200
(25oC) rms Note 3
TCFL CCFL Dark start time 1.0 sec (Ta=25oC)
CCFL Discharge Voltage [Volt] (Ta=25oC)
VCFL 700 860
(Reference) rms Note 4
(Ta=25oC)
PCFL CCFL Power consumption 19.6 25.8 [Watt]
Note 4
Note 1: Duration=50 [msec]
Note 2: CCFL Frequency should be carefully determined to avoid interference between inverter and TFT LCD
Note 3: CCFL inverter should be able to give out a power that has a generating capacity of over 1700 voltage.
Lamp units need 1700 voltage minimum for ignition
Note 4: Calculator value for reference (ICFL◦ Jabse Service Manual Search 2024 ◦ Jabse Pravopis ◦ onTap.bg ◦ Other service manual resources online : Fixya ◦ eServiceinfo