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T390HVN01.0 SKD Product Specification
Rev.00
Model Name: T390HVN01.0
Issue Date : 2012/3/23
( )Preliminary Specifications
( )Final Specifications
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T390HVN01.0 SKD Product Specification
Rev.00
Contents
No
CONTENTS
RECORD OF REVISIONS
1 GENERAL DESCRIPTION
2 ABSOLUTE MAXIMUM RATINGS
3 ELECTRICAL SPECIFICATION
3-1 ELECTRIACL CHARACTERISTICS
3-2 INTERFACE CONNECTIONS
3-3 SIGNAL TIMING SPECIFICATION
3-4 SIGNAL TIMING WAVEFORM
3-5 COLOR INPUT DATA REFERENCE
3-6 POWER SEQUENCE
3-7 BACKLIGHT POWER SPECIFICATION
4 OPTICAL SPECIFICATION
5 OPEN CELL DRAWING
6 RELIABILITY TEST ITEMS
7 PACKING
7-1 OPEN CELL SHIPPING LABEL
7-2 PACKING PROCESS
7-3 PALLET AND SHIPMENT INFORMATION
8 PRECAUTION
8-1 MOUNTING PRECAUTIONS
8-2 OPERATING PRECAUTIONS
8-3 ELECTROSTATIC DISCHARGE CONTROL
8-4 PRECAUTIONS FOR STRONG LIGHT EXPOSURE
8-5 STORAGE
8-6 HANDLING PRECAUTIONS FOR PROTECT FILM
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T390HVN01.0 SKD Product Specification
Rev.00
Record of Revision
Version Date Page Description
Final 2012/2/14 First release
update 2012/3/23 Update LVDS connector
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T390HVN01.0 SKD Product Specification
Rev.00
1. General Description
This specification applies to the 38.5 inch Color TFT-LCD SKD model T390HVN01.0. This LCD Open Cell Unit
has a TFT active matrix type liquid crystal panel 1,920x1,080 pixels, and diagonal size of 38.5 inch. This module
supports 1,920x1,080 mode. Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged
in vertical stripes. Gray scale or the brightness of the sub-pixel color is determined with a 8-bit gray scale signal for
each dot.
The T390HVN01.0 has been designed to apply the 8-bit 2 channel LVDS interface method. It is intended to
support displays where high brightness, wide viewing angle, high color saturation, and high color depth are very
important.
General Information
Items Specification Unit Note
Active Screen Size 38.5 inch
Display Area 853.92 (H) x 480.33 (V) mm
Outline Dimension 868.72 (H) x 492.83 (V) x 1.36 (D) mm
Driver Element a-Si TFT active matrix
Display Colors 8 bit Colors
Number of Pixels 1,920x1,080 Pixel
Pixel Pitch 0.44475 (H) x 0.44475 (W) mm
Pixel Arrangement RGB vertical stripe
Display Operation Mode Normally Black
Surface Treatment Anti-Glare, 3H Haze=2%
Rotate Function Unachievable Note 1
Display Orientation Signal input with "A" Note 2
Note 1: Rotate Function refers to LCD display could be able to rotate.
Note 2: LCD display as below illustrated when signal input with "A".
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T390HVN01.0 SKD Product Specification
Rev.00
2. Absolute Maximum Ratings
The followings are maximum values which, if exceeded, may cause faulty operation or damage to the unit
Item Symbol Min Max Unit Conditions
Logic/LCD Drive Voltage VDD -0.3 14 VDC Note 1
Input Voltage of Signal Vin -0.3 4 VDC Note 1
o
Operating Temperature TOP 0 +50 [ C] Note 2
Operating Humidity HOP 10 90 [%RH] Note 2
o
Storage Temperature TST -20 +60 [ C] Note 2
Storage Humidity HST 10 90 [%RH] Note 2
o
Panel Surface Temperature PST 65 [ C] Note 3
Note 1: Duration:50 msec.
Note 2 : Maximum Wet-Bulb should be 39 and No condensation.
The relative humidity must not exceed 90% non-condensing at temperatures of 40 or less. At temperatures
greater than 40 , the wet bulb temperature must not exceed 39 .
Note 3: Surface temperature is measured at 50 Dry condition
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T390HVN01.0 SKD Product Specification
Rev.00
3. Electrical Specification
The T390HVN01.0 Open Cell Unit requires power input which is employed to power the LCD electronics and to
drive the TFT array and liquid crystal.
3-1 Electrical Characteristics
3-1.1: DC Characteristics
Value
Parameter Symbol Unit Note
Min. Typ. Max
LCD
Power Supply Input Voltage VDD 10.8 12 13.2 VDC
Power Supply Input Current IDD -- 0.8 1.3 A 1
Inrush Current IRUSH -- -- 4 A 2
Permissible Ripple of Power Supply Input Voltage
VRP -- -- VDD * 5% mVpk-pk 3
Input Differential Voltage VID 200 400 600 mVDC 4
LVDS Differential Input High Threshold Voltage VTH +100 -- +300 mVDC 4
Interface
Differential Input Low Threshold Voltage VTL -300 -- -100 mVDC 4
Input Common Mode Voltage VICM 1.1 1.25 1.4 VDC 4
VIH
CMOS Input High Threshold Voltage 2.7 -- 3.3 VDC 5
(High)
Interface VIL
Input Low Threshold Voltage 0 -- 0.6 VDC 5
(Low)
Backlight Power Consumption PBL 105 117 129 Watt
3-1.2: AC Characteristics
Value
Parameter Symbol Unit Note
Min. Typ. Max
Receiver Clock : Spread Spectrum Fclk Fclk
Fclk_ss -- MHz 6
Modulation range -3% +3%
Receiver Clock : Spread Spectrum
LVDS Fss 30 -- 200 KHz 6
Modulation frequency
Interface
Receiver Data Input Margin
Fclk = 85 MHz tRMG -0.4 -- 0.4 ns 7
Fclk = 65 MHz -0.5 -- 0.5
Note :
1. Test Condition:
(1) VDD = 12.0V
(2) Fv = Type Timing, 60Hz,
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T390HVN01.0 SKD Product Specification
Rev.00
(3) Fclk= Max freq.
(4) Temperature = 25
(5) Typ. Input current : White Pattern
Max. Input current: Heavy loading pattern defined by AUO
>> refer to "Section:3.3 Signal Timing Specification, Typical timing"
2. Measurement condition : Rising time = 400us
9''
*1'
s
3. Test Condition:
(1) The measure point of VRP is in LCM side after connecting the System Board and LCM.
(2) Under Max. Input current spec. condition.
4. VICM = 1.25V
LVDS -
V IC M V TH
|V ID |
V TL
LVDS +
GND
|V ID |
0V
|V ID |
5. The measure points of VIH and VIL are in LCM side after connecting the System Board and LCM.
6. LVDS Receiver Clock SSCG (Spread spectrum clock generator) is defined as below figures.
)66
)FONBVVPD[
)FONBVVPD[
)FON
)FONBVVPLQ
)FONBVVPLQ
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T390HVN01.0 SKD Product Specification
Rev.00
7. Receiver Data Input Margin
Rating
Parameter Symbol Unit Note
Min Type Max
Input Clock Frequency Fclk Fclk (min) -- Fclk (max) MHz T=1/Fclk
Input Data Position0 tRIP1 -|tRMG| 0 |tRMG| ns
Input Data Position1 tRIP0 T/7-|tRMG| T/7 T/7+|tRMG| ns
Input Data Position2 tRIP6 2T/7-|tRMG| 2T/7 2T/7+|tRMG| ns
Input Data Position3 tRIP5 3T/7-|tRMG| 3T/7 3T/7+|tRMG| ns
Input Data Position4 tRIP4 4T/7-|tRMG| 4T/7 4T/7+|tRMG| ns
Input Data Position5 tRIP3 5T/7-|tRMG| 5T/7 5T/7+|tRMG| ns
Input Data Position6 tRIP2 6T/7-|tRMG| 6T/7 6T/7+|tRMG| ns
W5,3
W5,3
W5,3
W5,3
W5,3
W5,3
W5,3
/9'65[
5[ 5[ 5[ 5[ 5[ 5[ 5[ 5[ 5[ 5[ 5[ 5[
,QSXW 'DWD
/9'65[
,QSXW &ORFN 9GLII 9
)FON 7
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T390HVN01.0 SKD Product Specification
Rev.00
3-2 Interface Connections
LVDS interface requirement
Connector : 187059-51221-1 ((P-TWO)
PIN Symbol Description PIN Symbol Description
1 N.C. AUO Internal Use Only 26 N.C. AUO Internal Use Only
2 N.C. AUO Internal Use Only 27 N.C. AUO Internal Use Only
3 N.C. AUO Internal Use Only 28 CH2_0- LVDS Channel 2, Signal 0-
4 N.C. AUO Internal Use Only 29 CH2_0+ LVDS Channel 2, Signal 0+
5 N.C. AUO Internal Use Only 30 CH2_1- LVDS Channel 2, Signal 1-
6 N.C. AUO Internal Use Only 31 CH2_1+ LVDS Channel 2, Signal 1+
Open/High(3.3V) for NS,
7 LVDS_SEL 32 CH2_2- LVDS Channel 2, Signal 2-
Low(GND) for JEIDA
8 N.C. No connection 33 CH2_2+ LVDS Channel 2, Signal 2+
9 N.C. No connection 34 GND Ground
10 N.C. No connection 35 CH2_CLK- LVDS Channel 2, Clock -
11 GND Ground 36 CH2_CLK+ LVDS Channel 2, Clock +
12 CH1_0- LVDS Channel 1, Signal 0- 37 GND Ground
13 CH1_0+ LVDS Channel 1, Signal 0+ 38 CH2_3- LVDS Channel 2, Signal 3-
14 CH1_1- LVDS Channel 1, Signal 1- 39 CH2_3+ LVDS Channel 2, Signal 3+
15 CH1_1+ LVDS Channel 1, Signal 1+ 40 CH2_4- No connection
16 CH1_2- LVDS Channel 1, Signal 2- 41 CH2_4+ No connection
17 CH1_2+ LVDS Channel 1, Signal 2+ 42 N.C. AUO Internal Use Only
18 GND Ground 43 N.C. No connection
19 CH1_CLK- LVDS Channel 1, Clock - 44 GND Ground
20 CH1_CLK+ LVDS Channel 1, Clock + 45 GND Ground
21 GND Ground 46 GND Ground
22 CH1_3- LVDS Channel 1, Signal 3- 47 N.C. No connection
23 CH1_3+ LVDS Channel 1, Signal 3+ 48 VDD Power Supply, +12V DC Regulated
24 CH1_4- No connection 49 VDD Power Supply, +12V DC Regulated
25 CH1_4+ No connection 50 VDD Power Supply, +12V DC Regulated
51 VDD Power Supply, +12V DC Regulated
Note: N.C. : please leave this pin unoccupied. It can not be connected by any signal
(Low/GND/High).
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T390HVN01.0 SKD Product Specification
Rev.00
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